diff --git a/.github/actions/setup_toolchain/action.yml b/.github/actions/setup_toolchain/action.yml
index 67b0adea9..b8bf6e1cc 100644
--- a/.github/actions/setup_toolchain/action.yml
+++ b/.github/actions/setup_toolchain/action.yml
@@ -20,8 +20,7 @@ runs:
if: inputs.toolchain == 'arm-gcc'
uses: carlosperate/arm-none-eabi-gcc-action@v1
with:
-# release: '12.3.Rel1'
- release: '11.2-2022.02'
+ release: '13.3.Rel1'
- name: Pull ESP-IDF docker
if: inputs.toolchain == 'esp-idf'
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index b3a745444..fe4a3f101 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -77,7 +77,7 @@ jobs:
# ---------------------------------------
# Build ESP
# ---------------------------------------
- esp:
+ espressif:
needs: set-matrix
uses: ./.github/workflows/build_util.yml
secrets: inherit
@@ -86,7 +86,7 @@ jobs:
boards: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)['espressif'].board) }}
build-system: 'make'
toolchain: 'esp-idf'
- toolchain_version: 'v5.1.4'
+ toolchain_version: 'v5.3.2'
# ---------------------------------------
# Build RISC-V
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index bb739a085..3f1fd3ccc 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,7 +2,14 @@
-
+
+
+
+
+
+
+
+
@@ -16,6 +23,13 @@
+
+
+
+
+
+
+
@@ -23,6 +37,13 @@
+
+
+
+
+
+
+
@@ -56,6 +77,8 @@
+
+
\ No newline at end of file
diff --git a/lib/tinyusb b/lib/tinyusb
index 3eea46056..2d7d1070f 160000
--- a/lib/tinyusb
+++ b/lib/tinyusb
@@ -1 +1 @@
-Subproject commit 3eea46056ea20aa12b73eea7c01d6c6e5b2d490a
+Subproject commit 2d7d1070fc9eb8db7061b4f0e20408a453df1f7e
diff --git a/ports/espressif/CMakeLists.txt b/ports/espressif/CMakeLists.txt
index 2670a2ae4..f3e31ceef 100644
--- a/ports/espressif/CMakeLists.txt
+++ b/ports/espressif/CMakeLists.txt
@@ -11,6 +11,7 @@ set(SDKCONFIG_DEFAULTS ${CMAKE_CURRENT_LIST_DIR}/sdkconfig.defaults ${CMAKE_CURR
set(SDKCONFIG ${CMAKE_BINARY_DIR}/sdkconfig)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+idf_build_set_property(EXTRA_CMAKE_ARGS -DBOARD=${BOARD}) # Pass BOARD to bootloader
execute_process(COMMAND git describe --dirty --always --tags
OUTPUT_VARIABLE GIT_VERSION)
@@ -23,8 +24,10 @@ string(REPLACE ../ "" GIT_SUBMODULE_VERSIONS ${GIT_SUBMODULE_VERSIONS})
string(REPLACE lib/ "" GIT_SUBMODULE_VERSIONS ${GIT_SUBMODULE_VERSIONS})
string(STRIP ${GIT_SUBMODULE_VERSIONS} GIT_SUBMODULE_VERSIONS)
-add_compile_definitions(UF2_VERSION_BASE="${GIT_VERSION}")
-add_compile_definitions(UF2_VERSION="${GIT_VERSION} - ${GIT_SUBMODULE_VERSIONS}")
+add_compile_definitions(
+ UF2_VERSION_BASE="${GIT_VERSION}"
+ UF2_VERSION="${GIT_VERSION} - ${GIT_SUBMODULE_VERSIONS}"
+ )
cmake_print_variables(GIT_VERSION GIT_SUBMODULE_VERSIONS)
diff --git a/ports/espressif/README.md b/ports/espressif/README.md
index 76e9846d8..08e8ed1dd 100644
--- a/ports/espressif/README.md
+++ b/ports/espressif/README.md
@@ -2,7 +2,7 @@
The project is composed of customizing the 2nd stage bootloader from IDF and UF2 factory application as 3rd stage bootloader.
-**Note**: IDF is actively developed and change very often, TinyUF2 is developed and tested with IDF v5.1.4. Should you have a problem please try to change your IDF version.
+**Note**: IDF is actively developed and change very often, TinyUF2 is developed and tested with IDF v5.3.2. Should you have a problem please try to change your IDF version.
Following boards are supported:
diff --git a/ports/espressif/boards/CMakeLists.txt b/ports/espressif/boards/CMakeLists.txt
index e9ed8a8c5..5b80c35b9 100644
--- a/ports/espressif/boards/CMakeLists.txt
+++ b/ports/espressif/boards/CMakeLists.txt
@@ -1,3 +1,4 @@
idf_component_register(SRCS boards.c board_flash.c ${BOARD_SOURCES}
INCLUDE_DIRS "." "${BOARD}" ${BOARD_INCLUDES} ${TOP}/src
- REQUIRES driver esp_timer app_update spi_flash led_strip lcd ssd1306 XPowersLib tinyusb_src)
+ PRIV_REQUIRES driver usb
+ REQUIRES esp_timer app_update spi_flash led_strip lcd ssd1306 XPowersLib tinyusb_src)
diff --git a/ports/espressif/boards/boards.c b/ports/espressif/boards/boards.c
index 375db464f..5e8c761ce 100644
--- a/ports/espressif/boards/boards.c
+++ b/ports/espressif/boards/boards.c
@@ -27,7 +27,10 @@
#include "freertos/semphr.h"
#include "hal/gpio_ll.h"
-#include "hal/usb_hal.h"
+
+#include "esp_private/usb_phy.h"
+#include "soc/usb_pins.h"
+
#include "soc/usb_periph.h"
#include "esp_private/periph_ctrl.h"
@@ -89,7 +92,6 @@ extern bool board_init_extension();
#endif
extern int main(void);
-static void configure_pins(usb_hal_context_t* usb);
static void internal_timer_cb(void* arg);
//--------------------------------------------------------------------+
@@ -257,16 +259,19 @@ void board_init(void) {
esp_timer_create(&periodic_timer_args, &timer_hdl);
}
+static usb_phy_handle_t phy_hdl;
void board_dfu_init(void) {
- // USB Controller Hal init
- periph_module_reset(PERIPH_USB_MODULE);
- periph_module_enable(PERIPH_USB_MODULE);
-
- usb_hal_context_t hal = {
- .use_external_phy = false // use built-in PHY
+ // Configure USB PHY
+ usb_phy_config_t phy_conf = {
+ .controller = USB_PHY_CTRL_OTG,
+ .target = USB_PHY_TARGET_INT,
+ .otg_mode = USB_OTG_MODE_DEVICE,
+ // https://github.com/hathach/tinyusb/issues/2943#issuecomment-2601888322
+ // Set speed to undefined (auto-detect) to avoid timinng/racing issue with S3 with host such as macOS
+ .otg_speed = USB_PHY_SPEED_UNDEFINED,
};
- usb_hal_init(&hal);
- configure_pins(&hal);
+
+ usb_new_phy(&phy_conf, &phy_hdl);
}
void board_reset(void) {
@@ -345,7 +350,6 @@ void board_timer_stop(void) {
#if CONFIG_IDF_TARGET_ESP32S3
#include "hal/usb_serial_jtag_ll.h"
-#include "hal/usb_fsls_phy_ll.h"
static void hw_cdc_reset_handler(void *arg) {
portBASE_TYPE xTaskWoken = 0;
@@ -389,7 +393,7 @@ static void usb_switch_to_cdc_jtag(void) {
gpio_set_level((gpio_num_t)USBPHY_DP_NUM, 0);
// Initialize CDC+JTAG ISR to listen for BUS_RESET
- usb_fsls_phy_ll_int_jtag_enable(&USB_SERIAL_JTAG);
+ usb_serial_jtag_ll_phy_enable_external(false);
usb_serial_jtag_ll_disable_intr_mask(USB_SERIAL_JTAG_LL_INTR_MASK);
usb_serial_jtag_ll_clr_intsts_mask(USB_SERIAL_JTAG_LL_INTR_MASK);
usb_serial_jtag_ll_ena_intr_mask(USB_SERIAL_JTAG_INTR_BUS_RESET);
@@ -579,32 +583,3 @@ void dotstar_write(uint8_t const rgb[]) {
}
#endif
-
-//--------------------------------------------------------------------+
-// Helper
-//--------------------------------------------------------------------+
-static void configure_pins(usb_hal_context_t* usb) {
- /* usb_periph_iopins currently configures USB_OTG as USB Device.
- * Introduce additional parameters in usb_hal_context_t when adding support
- * for USB Host.
- */
- for (const usb_iopin_dsc_t* iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) {
- if ((usb->use_external_phy) || (iopin->ext_phy_only == 0)) {
- esp_rom_gpio_pad_select_gpio(iopin->pin);
- if (iopin->is_output) {
- esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false);
- } else {
- esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false);
- if ((iopin->pin != GPIO_MATRIX_CONST_ZERO_INPUT) && (iopin->pin != GPIO_MATRIX_CONST_ONE_INPUT)) {
- gpio_ll_input_enable(&GPIO, iopin->pin);
- }
- }
- esp_rom_gpio_pad_unhold(iopin->pin);
- }
- }
-
- if (!usb->use_external_phy) {
- gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
- gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
- }
-}
diff --git a/ports/espressif/bootloader_components/main/CMakeLists.txt b/ports/espressif/bootloader_components/main/CMakeLists.txt
new file mode 100644
index 000000000..7cc560334
--- /dev/null
+++ b/ports/espressif/bootloader_components/main/CMakeLists.txt
@@ -0,0 +1,20 @@
+idf_component_register(SRCS "bootloader_start.c"
+ INCLUDE_DIRS "../../boards/${BOARD}"
+ REQUIRES bootloader bootloader_support hal)
+
+idf_build_get_property(target IDF_TARGET)
+
+# TODO: [ESP32C5] IDF-9197 remove this when beta3 is removed
+if(CONFIG_IDF_TARGET_ESP32C5_MP_VERSION)
+ set(target_folder "esp32c5/mp")
+elseif(CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION)
+ set(target_folder "esp32c5/beta3")
+else()
+ set(target_folder "${target}")
+endif()
+
+# Use the linker script files from the actual bootloader
+set(scripts "${IDF_PATH}/components/bootloader/subproject/main/ld/${target_folder}/bootloader.ld"
+ "${IDF_PATH}/components/bootloader/subproject/main/ld/${target_folder}/bootloader.rom.ld")
+
+target_linker_script(${COMPONENT_LIB} INTERFACE "${scripts}")
diff --git a/ports/espressif/components/bootloader/subproject/main/bootloader_hooks.h b/ports/espressif/bootloader_components/main/bootloader_hooks.h
similarity index 100%
rename from ports/espressif/components/bootloader/subproject/main/bootloader_hooks.h
rename to ports/espressif/bootloader_components/main/bootloader_hooks.h
diff --git a/ports/espressif/components/bootloader/subproject/main/bootloader_start.c b/ports/espressif/bootloader_components/main/bootloader_start.c
similarity index 96%
rename from ports/espressif/components/bootloader/subproject/main/bootloader_start.c
rename to ports/espressif/bootloader_components/main/bootloader_start.c
index 9976f6cd8..22e12b157 100644
--- a/ports/espressif/components/bootloader/subproject/main/bootloader_start.c
+++ b/ports/espressif/bootloader_components/main/bootloader_start.c
@@ -219,14 +219,15 @@ static int selected_boot_partition(const bootloader_state_t *bs) {
#endif
if (boot_index != FACTORY_INDEX) {
- if (UF2_DETECTION_DELAY_MS > 0){
- #if CONFIG_IDF_TARGET_ESP32S3
- // S3 startup with USB JTAG, while delaying here, USB JTAG will be enumerated which can cause confusion when
- // switching to OTG in application. Switch to OTG PHY here to avoid this.
- SET_PERI_REG_MASK(RTC_CNTL_USB_CONF_REG,
- RTC_CNTL_SW_HW_USB_PHY_SEL | RTC_CNTL_SW_USB_PHY_SEL | RTC_CNTL_USB_PAD_ENABLE);
- #endif
+ #if SOC_USB_SERIAL_JTAG_SUPPORTED
+ // startup with USB JTAG, while delaying here, USB JTAG will be enumerated which can cause confusion when
+ // switching to OTG in application. Switch to OTG PHY here to avoid this.
+ uint32_t const rtc_cntl_usb_conf = READ_PERI_REG(RTC_CNTL_USB_CONF_REG);
+ SET_PERI_REG_MASK(RTC_CNTL_USB_CONF_REG,
+ RTC_CNTL_SW_HW_USB_PHY_SEL | RTC_CNTL_SW_USB_PHY_SEL | RTC_CNTL_USB_PAD_ENABLE);
+ #endif
+ if (UF2_DETECTION_DELAY_MS > 0){
board_led_on();
}
@@ -245,13 +246,12 @@ static int selected_boot_partition(const bootloader_state_t *bs) {
} while (UF2_DETECTION_DELAY_MS > (esp_log_early_timestamp() - tm_start) );
if (UF2_DETECTION_DELAY_MS > 0){
- #if CONFIG_IDF_TARGET_ESP32S3
- CLEAR_PERI_REG_MASK(RTC_CNTL_USB_CONF_REG,
- RTC_CNTL_SW_HW_USB_PHY_SEL | RTC_CNTL_SW_USB_PHY_SEL | RTC_CNTL_USB_PAD_ENABLE);
- #endif
-
board_led_off();
}
+
+ #if SOC_USB_SERIAL_JTAG_SUPPORTED
+ WRITE_PERI_REG(RTC_CNTL_USB_CONF_REG, rtc_cntl_usb_conf);
+ #endif
}
#if PIN_DOUBLE_RESET_RC
diff --git a/ports/espressif/components/bootloader/CMakeLists.txt b/ports/espressif/components/bootloader/CMakeLists.txt
deleted file mode 100644
index b17b6e7ef..000000000
--- a/ports/espressif/components/bootloader/CMakeLists.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-idf_component_register(PRIV_REQUIRES partition_table esptool_py)
-
-# Do not generate flash file when building bootloader or is in early expansion of the build
-if(BOOTLOADER_BUILD OR NOT CONFIG_APP_BUILD_BOOTLOADER)
- return()
-endif()
-
-add_dependencies(bootloader partition_table_bin)
-
-# When secure boot is enabled, do not flash bootloader along with invocation of `idf.py flash`
-if(NOT CONFIG_SECURE_BOOT)
- set(flash_bootloader FLASH_IN_PROJECT)
-endif()
-
-esptool_py_custom_target(bootloader-flash bootloader "bootloader")
-esptool_py_flash_target_image(bootloader-flash bootloader
- ${CONFIG_BOOTLOADER_OFFSET_IN_FLASH}
- "${BOOTLOADER_BUILD_DIR}/bootloader.bin")
-
-# Also attach an image to the project flash target
-if(NOT CONFIG_SECURE_BOOT)
- esptool_py_flash_target_image(flash bootloader
- ${CONFIG_BOOTLOADER_OFFSET_IN_FLASH}
- "${BOOTLOADER_BUILD_DIR}/bootloader.bin")
-endif()
diff --git a/ports/espressif/components/bootloader/Kconfig.projbuild b/ports/espressif/components/bootloader/Kconfig.projbuild
deleted file mode 100644
index 5a61b1210..000000000
--- a/ports/espressif/components/bootloader/Kconfig.projbuild
+++ /dev/null
@@ -1,1082 +0,0 @@
-menu "Bootloader config"
-
- config BOOTLOADER_OFFSET_IN_FLASH
- hex
- default 0x1000 if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2
- default 0x0
- help
- Offset address that 2nd bootloader will be flashed to.
- The value is determined by the ROM bootloader.
- It's not configurable in ESP-IDF.
-
- choice BOOTLOADER_COMPILER_OPTIMIZATION
- prompt "Bootloader optimization Level"
- default BOOTLOADER_COMPILER_OPTIMIZATION_SIZE
- help
- This option sets compiler optimization level (gcc -O argument)
- for the bootloader.
-
- - The default "Size" setting will add the -0s flag to CFLAGS.
- - The "Debug" setting will add the -Og flag to CFLAGS.
- - The "Performance" setting will add the -O2 flag to CFLAGS.
- - The "None" setting will add the -O0 flag to CFLAGS.
-
- Note that custom optimization levels may be unsupported.
-
- config BOOTLOADER_COMPILER_OPTIMIZATION_SIZE
- bool "Size (-Os)"
- config BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG
- bool "Debug (-Og)"
- config BOOTLOADER_COMPILER_OPTIMIZATION_PERF
- bool "Optimize for performance (-O2)"
- config BOOTLOADER_COMPILER_OPTIMIZATION_NONE
- bool "Debug without optimization (-O0)"
- endchoice
-
- choice BOOTLOADER_LOG_LEVEL
- bool "Bootloader log verbosity"
- default BOOTLOADER_LOG_LEVEL_INFO
- help
- Specify how much output to see in bootloader logs.
-
- config BOOTLOADER_LOG_LEVEL_NONE
- bool "No output"
- config BOOTLOADER_LOG_LEVEL_ERROR
- bool "Error"
- config BOOTLOADER_LOG_LEVEL_WARN
- bool "Warning"
- config BOOTLOADER_LOG_LEVEL_INFO
- bool "Info"
- config BOOTLOADER_LOG_LEVEL_DEBUG
- bool "Debug"
- config BOOTLOADER_LOG_LEVEL_VERBOSE
- bool "Verbose"
- endchoice
-
- config BOOTLOADER_LOG_LEVEL
- int
- default 0 if BOOTLOADER_LOG_LEVEL_NONE
- default 1 if BOOTLOADER_LOG_LEVEL_ERROR
- default 2 if BOOTLOADER_LOG_LEVEL_WARN
- default 3 if BOOTLOADER_LOG_LEVEL_INFO
- default 4 if BOOTLOADER_LOG_LEVEL_DEBUG
- default 5 if BOOTLOADER_LOG_LEVEL_VERBOSE
-
- config BOOTLOADER_SPI_CUSTOM_WP_PIN
- bool "Use custom SPI Flash WP Pin when flash pins set in eFuse (read help)"
- depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_QIO || ESPTOOLPY_FLASHMODE_QOUT)
- default y if BOOTLOADER_SPI_WP_PIN != 7 # backwards compatibility, can remove in IDF 5
- default n
- help
- This setting is only used if the SPI flash pins have been overridden by setting the eFuses
- SPI_PAD_CONFIG_xxx, and the SPI flash mode is QIO or QOUT.
-
- When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
- ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The same pin is also used
- for external SPIRAM if it is enabled.
-
- If this config item is set to N (default), the correct WP pin will be automatically used for any
- Espressif chip or module with integrated flash. If a custom setting is needed, set this config item to
- Y and specify the GPIO number connected to the WP.
-
- config BOOTLOADER_SPI_WP_PIN
- int "Custom SPI Flash WP Pin"
- range 0 33
- default 7
- depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_QIO || ESPTOOLPY_FLASHMODE_QOUT)
- #depends on BOOTLOADER_SPI_CUSTOM_WP_PIN # backwards compatibility, can uncomment in IDF 5
- help
- The option "Use custom SPI Flash WP Pin" must be set or this value is ignored
-
- If burning a customized set of SPI flash pins in eFuse and using QIO or QOUT mode for flash, set this
- value to the GPIO number of the SPI flash WP pin.
-
- choice BOOTLOADER_VDDSDIO_BOOST
- bool "VDDSDIO LDO voltage"
- default BOOTLOADER_VDDSDIO_BOOST_1_9V
- depends on SOC_CONFIGURABLE_VDDSDIO_SUPPORTED
- help
- If this option is enabled, and VDDSDIO LDO is set to 1.8V (using eFuse
- or MTDI bootstrapping pin), bootloader will change LDO settings to
- output 1.9V instead. This helps prevent flash chip from browning out
- during flash programming operations.
-
- This option has no effect if VDDSDIO is set to 3.3V, or if the internal
- VDDSDIO regulator is disabled via eFuse.
-
- config BOOTLOADER_VDDSDIO_BOOST_1_8V
- bool "1.8V"
- depends on !ESPTOOLPY_FLASHFREQ_80M
- config BOOTLOADER_VDDSDIO_BOOST_1_9V
- bool "1.9V"
- endchoice
-
- config BOOTLOADER_FACTORY_RESET
- bool "GPIO triggers factory reset"
- default N
- select BOOTLOADER_RESERVE_RTC_MEM if SOC_RTC_FAST_MEM_SUPPORTED
- help
- Allows to reset the device to factory settings:
- - clear one or more data partitions;
- - boot from "factory" partition.
- The factory reset will occur if there is a GPIO input held at the configured level while
- device starts up. See settings below.
-
- config BOOTLOADER_NUM_PIN_FACTORY_RESET
- int "Number of the GPIO input for factory reset"
- depends on BOOTLOADER_FACTORY_RESET
- range 0 39 if IDF_TARGET_ESP32
- range 0 44 if IDF_TARGET_ESP32S2
- default 4
- help
- The selected GPIO will be configured as an input with internal pull-up enabled (note that on some SoCs.
- not all pins have an internal pull-up, consult the hardware datasheet for details.) To trigger a factory
- reset, this GPIO must be held high or low (as configured) on startup.
-
- choice BOOTLOADER_FACTORY_RESET_PIN_LEVEL
- bool "Factory reset GPIO level"
- depends on BOOTLOADER_FACTORY_RESET
- default BOOTLOADER_FACTORY_RESET_PIN_LOW
- help
- Pin level for factory reset, can be triggered on low or high.
-
- config BOOTLOADER_FACTORY_RESET_PIN_LOW
- bool "Reset on GPIO low"
-
- config BOOTLOADER_FACTORY_RESET_PIN_HIGH
- bool "Reset on GPIO high"
- endchoice
-
- config BOOTLOADER_OTA_DATA_ERASE
- bool "Clear OTA data on factory reset (select factory partition)"
- depends on BOOTLOADER_FACTORY_RESET
- help
- The device will boot from "factory" partition (or OTA slot 0 if no factory partition is present) after a
- factory reset.
-
- config BOOTLOADER_DATA_FACTORY_RESET
- string "Comma-separated names of partitions to clear on factory reset"
- depends on BOOTLOADER_FACTORY_RESET
- default "nvs"
- help
- Allows customers to select which data partitions will be erased while factory reset.
-
- Specify the names of partitions as a comma-delimited with optional spaces for readability. (Like this:
- "nvs, phy_init, ...")
- Make sure that the name specified in the partition table and here are the same.
- Partitions of type "app" cannot be specified here.
-
- config BOOTLOADER_APP_TEST
- bool "GPIO triggers boot from test app partition"
- default N
- depends on !BOOTLOADER_APP_ANTI_ROLLBACK
- help
- Allows to run the test app from "TEST" partition.
- A boot from "test" partition will occur if there is a GPIO input pulled low while device starts up.
- See settings below.
-
- config BOOTLOADER_NUM_PIN_APP_TEST
- int "Number of the GPIO input to boot TEST partition"
- depends on BOOTLOADER_APP_TEST
- range 0 39
- default 18
- help
- The selected GPIO will be configured as an input with internal pull-up enabled.
- To trigger a test app, this GPIO must be pulled low on reset.
- After the GPIO input is deactivated and the device reboots, the old application will boot.
- (factory or OTA[x]).
- Note that GPIO34-39 do not have an internal pullup and an external one must be provided.
-
- choice BOOTLOADER_APP_TEST_PIN_LEVEL
- bool "App test GPIO level"
- depends on BOOTLOADER_APP_TEST
- default BOOTLOADER_APP_TEST_PIN_LOW
- help
- Pin level for app test, can be triggered on low or high.
-
- config BOOTLOADER_APP_TEST_PIN_LOW
- bool "Enter test app on GPIO low"
-
- config BOOTLOADER_APP_TEST_PIN_HIGH
- bool "Enter test app on GPIO high"
- endchoice
-
- config BOOTLOADER_HOLD_TIME_GPIO
- int "Hold time of GPIO for reset/test mode (seconds)"
- depends on BOOTLOADER_FACTORY_RESET || BOOTLOADER_APP_TEST
- default 5
- help
- The GPIO must be held low continuously for this period of time after reset
- before a factory reset or test partition boot (as applicable) is performed.
-
- config BOOTLOADER_REGION_PROTECTION_ENABLE
- bool "Enable protection for unmapped memory regions"
- default y
- help
- Protects the unmapped memory regions of the entire address space from unintended accesses.
- This will ensure that an exception will be triggered whenever the CPU performs a memory
- operation on unmapped regions of the address space.
-
- config BOOTLOADER_WDT_ENABLE
- bool "Use RTC watchdog in start code"
- default y
- help
- Tracks the execution time of startup code.
- If the execution time is exceeded, the RTC_WDT will restart system.
- It is also useful to prevent a lock up in start code caused by an unstable power source.
- NOTE: Tracks the execution time starts from the bootloader code - re-set timeout, while selecting the
- source for slow_clk - and ends calling app_main.
- Re-set timeout is needed due to WDT uses a SLOW_CLK clock source. After changing a frequency slow_clk a
- time of WDT needs to re-set for new frequency.
- slow_clk depends on RTC_CLK_SRC (INTERNAL_RC or EXTERNAL_CRYSTAL).
-
- config BOOTLOADER_WDT_DISABLE_IN_USER_CODE
- bool "Allows RTC watchdog disable in user code"
- depends on BOOTLOADER_WDT_ENABLE
- default n
- help
- If this option is set, the ESP-IDF app must explicitly reset, feed, or disable the rtc_wdt in
- the app's own code.
- If this option is not set (default), then rtc_wdt will be disabled by ESP-IDF before calling
- the app_main() function.
-
- Use function rtc_wdt_feed() for resetting counter of rtc_wdt.
- Use function rtc_wdt_disable() for disabling rtc_wdt.
-
- config BOOTLOADER_WDT_TIME_MS
- int "Timeout for RTC watchdog (ms)"
- depends on BOOTLOADER_WDT_ENABLE
- default 9000
- range 0 120000
- help
- Verify that this parameter is correct and more then the execution time.
- Pay attention to options such as reset to factory, trigger test partition and encryption on boot
- - these options can increase the execution time.
- Note: RTC_WDT will reset while encryption operations will be performed.
-
- config BOOTLOADER_APP_ROLLBACK_ENABLE
- bool "Enable app rollback support"
- default n
- help
- After updating the app, the bootloader runs a new app with the "ESP_OTA_IMG_PENDING_VERIFY" state set.
- This state prevents the re-run of this app. After the first boot of the new app in the user code, the
- function should be called to confirm the operability of the app or vice versa about its non-operability.
- If the app is working, then it is marked as valid. Otherwise, it is marked as not valid and rolls back to
- the previous working app. A reboot is performed, and the app is booted before the software update.
- Note: If during the first boot a new app the power goes out or the WDT works, then roll back will happen.
- Rollback is possible only between the apps with the same security versions.
-
- config BOOTLOADER_APP_ANTI_ROLLBACK
- bool "Enable app anti-rollback support"
- depends on BOOTLOADER_APP_ROLLBACK_ENABLE
- default n
- help
- This option prevents rollback to previous firmware/application image with lower security version.
-
- config BOOTLOADER_APP_SECURE_VERSION
- int "eFuse secure version of app"
- depends on BOOTLOADER_APP_ANTI_ROLLBACK
- default 0
- help
- The secure version is the sequence number stored in the header of each firmware.
- The security version is set in the bootloader, version is recorded in the eFuse field
- as the number of set ones. The allocated number of bits in the efuse field
- for storing the security version is limited (see BOOTLOADER_APP_SEC_VER_SIZE_EFUSE_FIELD option).
-
- Bootloader: When bootloader selects an app to boot, an app is selected that has
- a security version greater or equal that recorded in eFuse field.
- The app is booted with a higher (or equal) secure version.
-
- The security version is worth increasing if in previous versions there is
- a significant vulnerability and their use is not acceptable.
-
- Your partition table should has a scheme with ota_0 + ota_1 (without factory).
-
- config BOOTLOADER_APP_SEC_VER_SIZE_EFUSE_FIELD
- int "Size of the efuse secure version field"
- depends on BOOTLOADER_APP_ANTI_ROLLBACK
- range 1 32 if IDF_TARGET_ESP32
- default 32 if IDF_TARGET_ESP32
- range 1 4 if IDF_TARGET_ESP32C2
- default 4 if IDF_TARGET_ESP32C2
- range 1 16
- default 16
- help
- The size of the efuse secure version field.
- Its length is limited to 32 bits for ESP32 and 16 bits for ESP32-S2.
- This determines how many times the security version can be increased.
-
- config BOOTLOADER_EFUSE_SECURE_VERSION_EMULATE
- bool "Emulate operations with efuse secure version(only test)"
- default n
- depends on BOOTLOADER_APP_ANTI_ROLLBACK
- select EFUSE_VIRTUAL
- select EFUSE_VIRTUAL_KEEP_IN_FLASH
- help
- This option allows to emulate read/write operations with all eFuses and efuse secure version.
- It allows to test anti-rollback implementation without permanent write eFuse bits.
- There should be an entry in partition table with following details: `emul_efuse, data, efuse, , 0x2000`.
-
- This option enables: EFUSE_VIRTUAL and EFUSE_VIRTUAL_KEEP_IN_FLASH.
-
- config BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP
- bool "Skip image validation when exiting deep sleep"
- # note: dependencies for this config item are different to other "skip image validation"
- # options, allowing to turn on "allow insecure options" and have secure boot with
- # "skip validation when existing deep sleep". Keeping this to avoid a breaking change,
- # but - as noted in help - it invalidates the integrity of Secure Boot checks
- depends on SOC_RTC_FAST_MEM_SUPPORTED && ((SECURE_BOOT && SECURE_BOOT_INSECURE) || !SECURE_BOOT)
- default n
- select BOOTLOADER_RESERVE_RTC_MEM
- help
- This option disables the normal validation of an image coming out of
- deep sleep (checksums, SHA256, and signature). This is a trade-off
- between wakeup performance from deep sleep, and image integrity checks.
-
- Only enable this if you know what you are doing. It should not be used
- in conjunction with using deep_sleep() entry and changing the active OTA
- partition as this would skip the validation upon first load of the new
- OTA partition.
-
- It is possible to enable this option with Secure Boot if "allow insecure
- options" is enabled, however it's strongly recommended to NOT enable it as
- it may allow a Secure Boot bypass.
-
- config BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON
- bool "Skip image validation from power on reset (READ HELP FIRST)"
- # only available if both Secure Boot and Check Signature on Boot are disabled
- depends on !SECURE_SIGNED_ON_BOOT
- default n
- help
- Some applications need to boot very quickly from power on. By default, the entire app binary
- is read from flash and verified which takes up a significant portion of the boot time.
-
- Enabling this option will skip validation of the app when the SoC boots from power on.
- Note that in this case it's not possible for the bootloader to detect if an app image is
- corrupted in the flash, therefore it's not possible to safely fall back to a different app
- partition. Flash corruption of this kind is unlikely but can happen if there is a serious
- firmware bug or physical damage.
-
- Following other reset types, the bootloader will still validate the app image. This increases
- the chances that flash corruption resulting in a crash can be detected following soft reset, and
- the bootloader will fall back to a valid app image. To increase the chances of successfully recovering
- from a flash corruption event, keep the option BOOTLOADER_WDT_ENABLE enabled and consider also enabling
- BOOTLOADER_WDT_DISABLE_IN_USER_CODE - then manually disable the RTC Watchdog once the app is running.
- In addition, enable both the Task and Interrupt watchdog timers with reset options set.
-
- config BOOTLOADER_SKIP_VALIDATE_ALWAYS
- bool "Skip image validation always (READ HELP FIRST)"
- # only available if both Secure Boot and Check Signature on Boot are disabled
- depends on !SECURE_SIGNED_ON_BOOT
- default n
- select BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP if SOC_RTC_FAST_MEM_SUPPORTED
- select BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON
- help
- Selecting this option prevents the bootloader from ever validating the app image before
- booting it. Any flash corruption of the selected app partition will make the entire SoC
- unbootable.
-
- Although flash corruption is a very rare case, it is not recommended to select this option.
- Consider selecting "Skip image validation from power on reset" instead. However, if boot time
- is the only important factor then it can be enabled.
-
- config BOOTLOADER_RESERVE_RTC_SIZE
- hex
- depends on SOC_RTC_FAST_MEM_SUPPORTED
- default 0x10 if BOOTLOADER_RESERVE_RTC_MEM
- default 0
- help
- Reserve RTC FAST memory for Skip image validation. This option in bytes.
- This option reserves an area in the RTC FAST memory (access only PRO_CPU).
- Used to save the addresses of the selected application.
- When a wakeup occurs (from Deep sleep), the bootloader retrieves it and
- loads the application without validation.
-
- config BOOTLOADER_CUSTOM_RESERVE_RTC
- bool "Reserve RTC FAST memory for custom purposes"
- depends on SOC_RTC_FAST_MEM_SUPPORTED
- select BOOTLOADER_RESERVE_RTC_MEM
- default n
- help
- This option allows the customer to place data in the RTC FAST memory,
- this area remains valid when rebooted, except for power loss.
- This memory is located at a fixed address and is available
- for both the bootloader and the application.
- (The application and bootloader must be compiled with the same option).
- The RTC FAST memory has access only through PRO_CPU.
-
- config BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE
- hex "Size in bytes for custom purposes"
- default 0
- depends on BOOTLOADER_CUSTOM_RESERVE_RTC
- help
- This option reserves in RTC FAST memory the area for custom purposes.
- If you want to create your own bootloader and save more information
- in this area of memory, you can increase it. It must be a multiple of 4 bytes.
- This area (rtc_retain_mem_t) is reserved and has access from the bootloader and an application.
-
- config BOOTLOADER_RESERVE_RTC_MEM
- bool
- depends on SOC_RTC_FAST_MEM_SUPPORTED
- help
- This option reserves an area in RTC FAST memory for the following features:
- - "Skip image validation when exiting deep sleep"
- - "Reserve RTC FAST memory for custom purposes"
- - "GPIO triggers factory reset"
-
- config BOOTLOADER_FLASH_XMC_SUPPORT
- bool "Enable the support for flash chips of XMC (READ HELP FIRST)"
- default y
- help
- Perform the startup flow recommended by XMC. Please consult XMC for the details of this flow.
- XMC chips will be forbidden to be used, when this option is disabled.
-
- DON'T DISABLE THIS UNLESS YOU KNOW WHAT YOU ARE DOING.
-
-endmenu # Bootloader
-
-
-menu "Security features"
-
- # These three are the actual options to check in code,
- # selected by the displayed options
- config SECURE_SIGNED_ON_BOOT
- bool
- default y
- depends on SECURE_BOOT || SECURE_SIGNED_ON_BOOT_NO_SECURE_BOOT
-
- config SECURE_SIGNED_ON_UPDATE
- bool
- default y
- depends on SECURE_BOOT || SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
-
- config SECURE_SIGNED_APPS
- bool
- default y
- select MBEDTLS_ECP_DP_SECP256R1_ENABLED
- select MBEDTLS_ECP_C
- select MBEDTLS_ECDH_C
- select MBEDTLS_ECDSA_C
- depends on SECURE_SIGNED_ON_BOOT || SECURE_SIGNED_ON_UPDATE
-
- config SECURE_BOOT_V2_RSA_SUPPORTED
- bool
- default y
- # RSA secure boot is supported in ESP32 revision >= v3.0
- depends on (IDF_TARGET_ESP32 && ESP32_REV_MIN_FULL >= 300) || SOC_SECURE_BOOT_V2_RSA
-
- config SECURE_BOOT_V2_ECC_SUPPORTED
- bool
- default y
- depends on SOC_SECURE_BOOT_V2_ECC
-
- config SECURE_BOOT_V1_SUPPORTED
- bool
- default y
- depends on SOC_SECURE_BOOT_V1
-
- config SECURE_BOOT_V2_PREFERRED
- bool
- default y
- depends on ESP32_REV_MIN_FULL >= 300
-
- config SECURE_BOOT_V2_ECDSA_ENABLED
- bool
- default y if SECURE_BOOT_V2_ENABLED && SECURE_BOOT_V2_ECC_SUPPORTED
-
- config SECURE_BOOT_V2_RSA_ENABLED
- bool
- default y if SECURE_BOOT_V2_ENABLED && SECURE_BOOT_V2_RSA_SUPPORTED
-
- config SECURE_BOOT_FLASH_ENC_KEYS_BURN_TOGETHER
- bool
- default y if SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK && SECURE_BOOT && SECURE_FLASH_ENC_ENABLED
- # ESP32-C2 has one key block for SB and FE keys. These keys must be burned at the same time.
-
- config SECURE_SIGNED_APPS_NO_SECURE_BOOT
- bool "Require signed app images"
- depends on !SECURE_BOOT
- help
- Require apps to be signed to verify their integrity.
-
- This option uses the same app signature scheme as hardware secure boot, but unlike hardware secure boot it
- does not prevent the bootloader from being physically updated. This means that the device can be secured
- against remote network access, but not physical access. Compared to using hardware Secure Boot this option
- is much simpler to implement.
-
- choice SECURE_SIGNED_APPS_SCHEME
- bool "App Signing Scheme"
- depends on SECURE_BOOT || SECURE_SIGNED_APPS_NO_SECURE_BOOT
- default SECURE_SIGNED_APPS_ECDSA_SCHEME if SECURE_BOOT_V1_ENABLED
- default SECURE_SIGNED_APPS_RSA_SCHEME if SECURE_BOOT_V2_RSA_SUPPORTED
- default SECURE_SIGNED_APPS_ECDSA_V2_SCHEME if SECURE_BOOT_V2_ECC_SUPPORTED
- help
- Select the Secure App signing scheme. Depends on the Chip Revision.
- There are two secure boot versions:
-
- 1. Secure boot V1
- - Legacy custom secure boot scheme. Supported in ESP32 SoC.
-
- 2. Secure boot V2
- - RSA based secure boot scheme.
- Supported in ESP32-ECO3 (ESP32 Chip Revision 3 onwards), ESP32-S2, ESP32-C3, ESP32-S3 SoCs.
-
- - ECDSA based secure boot scheme. Supported in ESP32-C2 SoC.
-
- config SECURE_SIGNED_APPS_ECDSA_SCHEME
- bool "ECDSA"
- depends on SECURE_BOOT_V1_SUPPORTED && (SECURE_SIGNED_APPS_NO_SECURE_BOOT || SECURE_BOOT_V1_ENABLED)
- help
- Embeds the ECDSA public key in the bootloader and signs the application with an ECDSA key.
- Refer to the documentation before enabling.
-
- config SECURE_SIGNED_APPS_RSA_SCHEME
- bool "RSA"
- depends on SECURE_BOOT_V2_RSA_SUPPORTED && (SECURE_SIGNED_APPS_NO_SECURE_BOOT || SECURE_BOOT_V2_ENABLED)
- help
- Appends the RSA-3072 based Signature block to the application.
- Refer to before enabling.
-
- config SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
- bool "ECDSA (V2)"
- depends on SECURE_BOOT_V2_ECC_SUPPORTED && (SECURE_SIGNED_APPS_NO_SECURE_BOOT || SECURE_BOOT_V2_ENABLED)
- help
- For Secure boot V2 (e.g., ESP32-C2 SoC), appends ECDSA based signature block to the application.
- Refer to documentation before enabling.
-
- endchoice
-
- choice SECURE_BOOT_ECDSA_KEY_LEN_SIZE
- bool "ECDSA key size"
- depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
- default SECURE_BOOT_ECDSA_KEY_LEN_256_BITS
- help
- Select the ECDSA key size. Two key sizes are supported
-
- - 192 bit key using NISTP192 curve
- - 256 bit key using NISTP256 curve (Recommended)
-
- The advantage of using 256 bit key is the extra randomness which makes it difficult to be
- bruteforced compared to 192 bit key.
- At present, both key sizes are practically implausible to bruteforce.
-
- config SECURE_BOOT_ECDSA_KEY_LEN_192_BITS
- bool "Using ECC curve NISTP192"
- depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
-
- config SECURE_BOOT_ECDSA_KEY_LEN_256_BITS
- bool "Using ECC curve NISTP256 (Recommended)"
- depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME
-
- endchoice
-
- config SECURE_SIGNED_ON_BOOT_NO_SECURE_BOOT
- bool "Bootloader verifies app signatures"
- default n
- depends on SECURE_SIGNED_APPS_NO_SECURE_BOOT && SECURE_SIGNED_APPS_ECDSA_SCHEME
- help
- If this option is set, the bootloader will be compiled with code to verify that an app is signed before
- booting it.
-
- If hardware secure boot is enabled, this option is always enabled and cannot be disabled.
- If hardware secure boot is not enabled, this option doesn't add significant security by itself so most
- users will want to leave it disabled.
-
- config SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
- bool "Verify app signature on update"
- default y
- depends on SECURE_SIGNED_APPS_NO_SECURE_BOOT
- help
- If this option is set, any OTA updated apps will have the signature verified before being considered valid.
-
- When enabled, the signature is automatically checked whenever the esp_ota_ops.h APIs are used for OTA
- updates, or esp_image_format.h APIs are used to verify apps.
-
- If hardware secure boot is enabled, this option is always enabled and cannot be disabled.
- If hardware secure boot is not enabled, this option still adds significant security against network-based
- attackers by preventing spoofing of OTA updates.
-
- config SECURE_BOOT
- bool "Enable hardware Secure Boot in bootloader (READ DOCS FIRST)"
- default n
- # Secure boot is not supported for ESP32-C3 revision < v0.3
- depends on SOC_SECURE_BOOT_SUPPORTED && !(IDF_TARGET_ESP32C3 && ESP32C3_REV_MIN_FULL < 3)
- select ESPTOOLPY_NO_STUB if !IDF_TARGET_ESP32 && !IDF_TARGET_ESP32S2
- help
- Build a bootloader which enables Secure Boot on first boot.
-
- Once enabled, Secure Boot will not boot a modified bootloader. The bootloader will only load a partition
- table or boot an app if the data has a verified digital signature. There are implications for reflashing
- updated apps once secure boot is enabled.
-
- When enabling secure boot, JTAG and ROM BASIC Interpreter are permanently disabled by default.
-
- choice SECURE_BOOT_VERSION
- bool "Select secure boot version"
- default SECURE_BOOT_V2_ENABLED if SECURE_BOOT_V2_PREFERRED
- depends on SECURE_BOOT
- help
- Select the Secure Boot Version. Depends on the Chip Revision.
- Secure Boot V2 is the new RSA / ECDSA based secure boot scheme.
-
- - RSA based scheme is supported in ESP32 (Revision 3 onwards), ESP32-S2, ESP32-C3 (ECO3), ESP32-S3.
- - ECDSA based scheme is supported in ESP32-C2 SoC.
-
- Please note that, RSA or ECDSA secure boot is property of specific SoC based on its HW design, supported
- crypto accelerators, die-size, cost and similar parameters. Please note that RSA scheme has requirement
- for bigger key sizes but at the same time it is comparatively faster than ECDSA verification.
-
- Secure Boot V1 is the AES based (custom) secure boot scheme supported in ESP32 SoC.
-
- config SECURE_BOOT_V1_ENABLED
- bool "Enable Secure Boot version 1"
- depends on SECURE_BOOT_V1_SUPPORTED
- help
- Build a bootloader which enables secure boot version 1 on first boot.
- Refer to the Secure Boot section of the ESP-IDF Programmer's Guide for this version before enabling.
-
- config SECURE_BOOT_V2_ENABLED
- bool "Enable Secure Boot version 2"
- depends on SECURE_BOOT_V2_RSA_SUPPORTED || SECURE_BOOT_V2_ECC_SUPPORTED
- help
- Build a bootloader which enables Secure Boot version 2 on first boot.
- Refer to Secure Boot V2 section of the ESP-IDF Programmer's Guide for this version before enabling.
-
- endchoice
-
- choice SECURE_BOOTLOADER_MODE
- bool "Secure bootloader mode"
- depends on SECURE_BOOT_V1_ENABLED
- default SECURE_BOOTLOADER_ONE_TIME_FLASH
-
- config SECURE_BOOTLOADER_ONE_TIME_FLASH
- bool "One-time flash"
- help
- On first boot, the bootloader will generate a key which is not readable externally or by software. A
- digest is generated from the bootloader image itself. This digest will be verified on each subsequent
- boot.
-
- Enabling this option means that the bootloader cannot be changed after the first time it is booted.
-
- config SECURE_BOOTLOADER_REFLASHABLE
- bool "Reflashable"
- help
- Generate a reusable secure bootloader key, derived (via SHA-256) from the secure boot signing key.
-
- This allows the secure bootloader to be re-flashed by anyone with access to the secure boot signing
- key.
-
- This option is less secure than one-time flash, because a leak of the digest key from one device
- allows reflashing of any device that uses it.
-
- endchoice
-
- config SECURE_BOOT_BUILD_SIGNED_BINARIES
- bool "Sign binaries during build"
- depends on SECURE_SIGNED_APPS
- default y
- help
- Once secure boot or signed app requirement is enabled, app images are required to be signed.
-
- If enabled (default), these binary files are signed as part of the build process. The file named in
- "Secure boot private signing key" will be used to sign the image.
-
- If disabled, unsigned app/partition data will be built. They must be signed manually using espsecure.py.
- Version 1 to enable ECDSA Based Secure Boot and Version 2 to enable RSA based Secure Boot.
- (for example, on a remote signing server.)
-
- config SECURE_BOOT_SIGNING_KEY
- string "Secure boot private signing key"
- depends on SECURE_BOOT_BUILD_SIGNED_BINARIES
- default "secure_boot_signing_key.pem"
- help
- Path to the key file used to sign app images.
-
- Key file is an ECDSA private key (NIST256p curve) in PEM format for Secure Boot V1.
- Key file is an RSA private key in PEM format for Secure Boot V2.
-
- Path is evaluated relative to the project directory.
-
- You can generate a new signing key by running the following command:
- espsecure.py generate_signing_key secure_boot_signing_key.pem
-
- See the Secure Boot section of the ESP-IDF Programmer's Guide for this version for details.
-
- config SECURE_BOOT_VERIFICATION_KEY
- string "Secure boot public signature verification key"
- depends on SECURE_SIGNED_APPS && SECURE_SIGNED_APPS_ECDSA_SCHEME && !SECURE_BOOT_BUILD_SIGNED_BINARIES
- default "signature_verification_key.bin"
- help
- Path to a public key file used to verify signed images.
- Secure Boot V1: This ECDSA public key is compiled into the bootloader and/or
- app, to verify app images.
-
- Key file is in raw binary format, and can be extracted from a
- PEM formatted private key using the espsecure.py
- extract_public_key command.
-
- Refer to the Secure Boot section of the ESP-IDF Programmer's Guide for this version before enabling.
-
- config SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE
- bool "Enable Aggressive key revoke strategy"
- depends on SECURE_BOOT && SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY
- default N
- help
- If this option is set, ROM bootloader will revoke the public key digest burned in efuse block
- if it fails to verify the signature of software bootloader with it.
- Revocation of keys does not happen when enabling secure boot. Once secure boot is enabled,
- key revocation checks will be done on subsequent boot-up, while verifying the software bootloader
-
- This feature provides a strong resistance against physical attacks on the device.
-
- NOTE: Once a digest slot is revoked, it can never be used again to verify an image
- This can lead to permanent bricking of the device, in case all keys are revoked
- because of signature verification failure.
-
- choice SECURE_BOOTLOADER_KEY_ENCODING
- bool "Hardware Key Encoding"
- depends on SECURE_BOOTLOADER_REFLASHABLE
- default SECURE_BOOTLOADER_KEY_ENCODING_256BIT
- help
-
- In reflashable secure bootloader mode, a hardware key is derived from the signing key (with SHA-256) and
- can be written to eFuse with espefuse.py.
-
- Normally this is a 256-bit key, but if 3/4 Coding Scheme is used on the device then the eFuse key is
- truncated to 192 bits.
-
- This configuration item doesn't change any firmware code, it only changes the size of key binary which is
- generated at build time.
-
- config SECURE_BOOTLOADER_KEY_ENCODING_256BIT
- bool "No encoding (256 bit key)"
-
- config SECURE_BOOTLOADER_KEY_ENCODING_192BIT
- bool "3/4 encoding (192 bit key)"
-
- endchoice
-
- config SECURE_BOOT_INSECURE
- bool "Allow potentially insecure options"
- depends on SECURE_BOOT
- default N
- help
- You can disable some of the default protections offered by secure boot, in order to enable testing or a
- custom combination of security features.
-
- Only enable these options if you are very sure.
-
- Refer to the Secure Boot section of the ESP-IDF Programmer's Guide for this version before enabling.
-
- config SECURE_FLASH_ENC_ENABLED
- bool "Enable flash encryption on boot (READ DOCS FIRST)"
- default N
- select SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE
- help
- If this option is set, flash contents will be encrypted by the bootloader on first boot.
-
- Note: After first boot, the system will be permanently encrypted. Re-flashing an encrypted
- system is complicated and not always possible.
-
- Read https://docs.espressif.com/projects/esp-idf/en/latest/security/flash-encryption.html
- before enabling.
-
- choice SECURE_FLASH_ENCRYPTION_KEYSIZE
- bool "Size of generated AES-XTS key"
- default SECURE_FLASH_ENCRYPTION_AES128
- depends on SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS && SECURE_FLASH_ENC_ENABLED
- help
- Size of generated AES-XTS key.
-
- - AES-128 uses a 256-bit key (32 bytes) derived from 128 bits (16 bytes) burned in half Efuse key block.
- Internally, it calculates SHA256(128 bits)
- - AES-128 uses a 256-bit key (32 bytes) which occupies one Efuse key block.
- - AES-256 uses a 512-bit key (64 bytes) which occupies two Efuse key blocks.
-
- This setting is ignored if either type of key is already burned to Efuse before the first boot.
- In this case, the pre-burned key is used and no new key is generated.
-
- config SECURE_FLASH_ENCRYPTION_AES128_DERIVED
- bool "AES-128 key derived from 128 bits (SHA256(128 bits))"
- depends on SOC_FLASH_ENCRYPTION_XTS_AES_128_DERIVED
-
- config SECURE_FLASH_ENCRYPTION_AES128
- bool "AES-128 (256-bit key)"
- depends on SOC_FLASH_ENCRYPTION_XTS_AES_128 && !(IDF_TARGET_ESP32C2 && SECURE_BOOT)
-
- config SECURE_FLASH_ENCRYPTION_AES256
- bool "AES-256 (512-bit key)"
- depends on SOC_FLASH_ENCRYPTION_XTS_AES_256
- endchoice
-
- choice SECURE_FLASH_ENCRYPTION_MODE
- bool "Enable usage mode"
- depends on SECURE_FLASH_ENC_ENABLED
- default SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
- help
- By default Development mode is enabled which allows ROM download mode to perform flash encryption
- operations (plaintext is sent to the device, and it encrypts it internally and writes ciphertext
- to flash.) This mode is not secure, it's possible for an attacker to write their own chosen plaintext
- to flash.
-
- Release mode should always be selected for production or manufacturing. Once enabled it's no longer
- possible for the device in ROM Download Mode to use the flash encryption hardware.
-
- When EFUSE_VIRTUAL is enabled, SECURE_FLASH_ENCRYPTION_MODE_RELEASE is not available.
- For CI tests we use IDF_CI_BUILD to bypass it ("export IDF_CI_BUILD=1").
- We do not recommend bypassing it for other purposes.
-
- Refer to the Flash Encryption section of the ESP-IDF Programmer's Guide for details.
-
- config SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
- bool "Development (NOT SECURE)"
- select SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC
-
- config SECURE_FLASH_ENCRYPTION_MODE_RELEASE
- bool "Release"
- select PARTITION_TABLE_MD5 if !APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS
- depends on !EFUSE_VIRTUAL || IDF_CI_BUILD
-
- endchoice
-
- config SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
- bool
- default y if (SOC_EFUSE_DIS_ICACHE || IDF_TARGET_ESP32) && SECURE_FLASH_ENC_ENABLED
-
- menu "Potentially insecure options"
- visible if SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT || SECURE_BOOT_INSECURE || SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT # NOERROR
-
- # NOTE: Options in this menu NEED to have SECURE_BOOT_INSECURE
- # and/or SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT in "depends on", as the menu
- # itself doesn't enable/disable its children (if it's not set,
- # it's possible for the insecure menu to be disabled but the insecure option
- # to remain on which is very bad.)
-
- config SECURE_BOOT_ALLOW_ROM_BASIC
- bool "Leave ROM BASIC Interpreter available on reset"
- depends on (SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT) && IDF_TARGET_ESP32
- default N
- help
- By default, the BASIC ROM Console starts on reset if no valid bootloader is
- read from the flash.
-
- When either flash encryption or secure boot are enabled, the default is to
- disable this BASIC fallback mode permanently via eFuse.
-
- If this option is set, this eFuse is not burned and the BASIC ROM Console may
- remain accessible. Only set this option in testing environments.
-
- config SECURE_BOOT_ALLOW_JTAG
- bool "Allow JTAG Debugging"
- depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
- select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
- default N
- help
- If not set (default), the bootloader will permanently disable JTAG (across entire chip) on first boot
- when either secure boot or flash encryption is enabled.
-
- Setting this option leaves JTAG on for debugging, which negates all protections of flash encryption
- and some of the protections of secure boot.
-
- Only set this option in testing environments.
-
- config SECURE_BOOT_ALLOW_SHORT_APP_PARTITION
- bool "Allow app partition length not 64KB aligned"
- depends on SECURE_BOOT_INSECURE || SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT
- help
- If not set (default), app partition size must be a multiple of 64KB. App images are padded to 64KB
- length, and the bootloader checks any trailing bytes after the signature (before the next 64KB
- boundary) have not been written. This is because flash cache maps entire 64KB pages into the address
- space. This prevents an attacker from appending unverified data after the app image in the flash,
- causing it to be mapped into the address space.
-
- Setting this option allows the app partition length to be unaligned, and disables padding of the app
- image to this length. It is generally not recommended to set this option, unless you have a legacy
- partitioning scheme which doesn't support 64KB aligned partition lengths.
-
- config SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS
- bool "Allow additional read protecting of efuses"
- depends on SECURE_BOOT_INSECURE && SECURE_BOOT_V2_ENABLED
- help
- If not set (default, recommended), on first boot the bootloader will burn the WR_DIS_RD_DIS
- efuse when Secure Boot is enabled. This prevents any more efuses from being read protected.
-
- If this option is set, it will remain possible to write the EFUSE_RD_DIS efuse field after Secure
- Boot is enabled. This may allow an attacker to read-protect the BLK2 efuse (for ESP32) and
- BLOCK4-BLOCK10 (i.e. BLOCK_KEY0-BLOCK_KEY5)(for other chips) holding the public key digest, causing an
- immediate denial of service and possibly allowing an additional fault injection attack to
- bypass the signature protection.
-
- NOTE: Once a BLOCK is read-protected, the application will read all zeros from that block
-
- NOTE: If "UART ROM download mode (Permanently disabled (recommended))" or
- "UART ROM download mode (Permanently switch to Secure mode (recommended))" is set,
- then it is __NOT__ possible to read/write efuses using espefuse.py utility.
- However, efuse can be read/written from the application
-
- config SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS
- bool "Leave unused digest slots available (not revoke)"
- depends on SECURE_BOOT_INSECURE && SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS
- default N
- help
- If not set (default), during startup in the app all unused digest slots will be revoked.
- To revoke unused slot will be called esp_efuse_set_digest_revoke(num_digest) for each digest.
- Revoking unused digest slots makes ensures that no trusted keys can be added later by an attacker.
- If set, it means that you have a plan to use unused digests slots later.
-
- config SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC
- bool "Leave UART bootloader encryption enabled"
- depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
- select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
- default N
- help
- If not set (default), the bootloader will permanently disable UART bootloader encryption access on
- first boot. If set, the UART bootloader will still be able to access hardware encryption.
-
- It is recommended to only set this option in testing environments.
-
- config SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC
- bool "Leave UART bootloader decryption enabled"
- depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && IDF_TARGET_ESP32
- default N
- help
- If not set (default), the bootloader will permanently disable UART bootloader decryption access on
- first boot. If set, the UART bootloader will still be able to access hardware decryption.
-
- Only set this option in testing environments. Setting this option allows complete bypass of flash
- encryption.
-
- config SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE
- bool "Leave UART bootloader flash cache enabled"
- depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && (IDF_TARGET_ESP32 || SOC_EFUSE_DIS_DOWNLOAD_ICACHE || SOC_EFUSE_DIS_DOWNLOAD_DCACHE) # NOERROR
- default N
- select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
- help
- If not set (default), the bootloader will permanently disable UART bootloader flash cache access on
- first boot. If set, the UART bootloader will still be able to access the flash cache.
-
- Only set this option in testing environments.
-
- config SECURE_FLASH_REQUIRE_ALREADY_ENABLED
- bool "Require flash encryption to be already enabled"
- depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
- default N
- help
- If not set (default), and flash encryption is not yet enabled in eFuses, the 2nd stage bootloader
- will enable flash encryption: generate the flash encryption key and program eFuses.
- If this option is set, and flash encryption is not yet enabled, the bootloader will error out and
- reboot.
- If flash encryption is enabled in eFuses, this option does not change the bootloader behavior.
-
- Only use this option in testing environments, to avoid accidentally enabling flash encryption on
- the wrong device. The device needs to have flash encryption already enabled using espefuse.py.
-
- config SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE
- bool "Skip write-protection of DIS_CACHE (DIS_ICACHE, DIS_DCACHE)"
- default n
- depends on SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
- help
- If not set (default, recommended), on the first boot the bootloader will burn the write-protection of
- DIS_CACHE(for ESP32) or DIS_ICACHE/DIS_DCACHE(for other chips) eFuse when Flash Encryption is enabled.
- Write protection for cache disable efuse prevents the chip from being blocked if it is set by accident.
- App and bootloader use cache so disabling it makes the chip useless for IDF.
- Due to other eFuses are linked with the same write protection bit (see the list below) then
- write-protection will not be done if these SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC,
- SECURE_BOOT_ALLOW_JTAG or SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE options are selected
- to give a chance to turn on the chip into the release mode later.
-
- List of eFuses with the same write protection bit:
- ESP32: MAC, MAC_CRC, DISABLE_APP_CPU, DISABLE_BT, DIS_CACHE, VOL_LEVEL_HP_INV.
-
- ESP32-C3: DIS_ICACHE, DIS_USB_JTAG, DIS_DOWNLOAD_ICACHE, DIS_USB_SERIAL_JTAG,
- DIS_FORCE_DOWNLOAD, DIS_TWAI, JTAG_SEL_ENABLE, DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT.
-
- ESP32-C6: SWAP_UART_SDIO_EN, DIS_ICACHE, DIS_USB_JTAG, DIS_DOWNLOAD_ICACHE,
- DIS_USB_SERIAL_JTAG, DIS_FORCE_DOWNLOAD, DIS_TWAI, JTAG_SEL_ENABLE,
- DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT.
-
- ESP32-H2: DIS_ICACHE, DIS_USB_JTAG, POWERGLITCH_EN, DIS_FORCE_DOWNLOAD, SPI_DOWNLOAD_MSPI_DIS,
- DIS_TWAI, JTAG_SEL_ENABLE, DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT.
-
- ESP32-S2: DIS_ICACHE, DIS_DCACHE, DIS_DOWNLOAD_ICACHE, DIS_DOWNLOAD_DCACHE,
- DIS_FORCE_DOWNLOAD, DIS_USB, DIS_TWAI, DIS_BOOT_REMAP, SOFT_DIS_JTAG,
- HARD_DIS_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT.
-
- ESP32-S3: DIS_ICACHE, DIS_DCACHE, DIS_DOWNLOAD_ICACHE, DIS_DOWNLOAD_DCACHE,
- DIS_FORCE_DOWNLOAD, DIS_USB_OTG, DIS_TWAI, DIS_APP_CPU, DIS_PAD_JTAG,
- DIS_DOWNLOAD_MANUAL_ENCRYPT, DIS_USB_JTAG, DIS_USB_SERIAL_JTAG, STRAP_JTAG_SEL, USB_PHY_SEL.
- endmenu # Potentially Insecure
-
- config SECURE_FLASH_CHECK_ENC_EN_IN_APP
- bool "Check Flash Encryption enabled on app startup"
- depends on SECURE_FLASH_ENC_ENABLED
- default y
- help
- If set (default), in an app during startup code,
- there is a check of the flash encryption eFuse bit is on
- (as the bootloader should already have set it).
- The app requires this bit is on to continue work otherwise abort.
-
- If not set, the app does not care if the flash encryption eFuse bit is set or not.
-
- config SECURE_ROM_DL_MODE_ENABLED
- bool
- default y if SOC_SUPPORTS_SECURE_DL_MODE && !SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
-
- choice SECURE_UART_ROM_DL_MODE
- bool "UART ROM download mode"
- default SECURE_ENABLE_SECURE_ROM_DL_MODE if SECURE_ROM_DL_MODE_ENABLED # NOERROR
- default SECURE_INSECURE_ALLOW_DL_MODE
- depends on SECURE_BOOT_V2_ENABLED || SECURE_FLASH_ENC_ENABLED
- depends on !(IDF_TARGET_ESP32 && ESP32_REV_MIN_FULL < 300)
-
- config SECURE_DISABLE_ROM_DL_MODE
- bool "UART ROM download mode (Permanently disabled (recommended))"
- help
- If set, during startup the app will burn an eFuse bit to permanently disable the UART ROM
- Download Mode. This prevents any future use of esptool.py, espefuse.py and similar tools.
-
- Once disabled, if the SoC is booted with strapping pins set for ROM Download Mode
- then an error is printed instead.
-
- It is recommended to enable this option in any production application where Flash
- Encryption and/or Secure Boot is enabled and access to Download Mode is not required.
-
- It is also possible to permanently disable Download Mode by calling
- esp_efuse_disable_rom_download_mode() at runtime.
-
- config SECURE_ENABLE_SECURE_ROM_DL_MODE
- bool "UART ROM download mode (Permanently switch to Secure mode (recommended))"
- depends on SOC_SUPPORTS_SECURE_DL_MODE
- select ESPTOOLPY_NO_STUB
- help
- If set, during startup the app will burn an eFuse bit to permanently switch the UART ROM
- Download Mode into a separate Secure Download mode. This option can only work if
- Download Mode is not already disabled by eFuse.
-
- Secure Download mode limits the use of Download Mode functions to update SPI config,
- changing baud rate, basic flash write and a command to return a summary of currently
- enabled security features (`get_security_info`).
-
- Secure Download mode is not compatible with the esptool.py flasher stub feature,
- espefuse.py, read/writing memory or registers, encrypted download, or any other
- features that interact with unsupported Download Mode commands.
-
- Secure Download mode should be enabled in any application where Flash Encryption
- and/or Secure Boot is enabled. Disabling this option does not immediately cancel
- the benefits of the security features, but it increases the potential "attack
- surface" for an attacker to try and bypass them with a successful physical attack.
-
- It is also possible to enable secure download mode at runtime by calling
- esp_efuse_enable_rom_secure_download_mode()
-
- Note: Secure Download mode is not available for ESP32 (includes revisions till ECO3).
-
- config SECURE_INSECURE_ALLOW_DL_MODE
- bool "UART ROM download mode (Enabled (not recommended))"
- help
- This is a potentially insecure option.
- Enabling this option will allow the full UART download mode to stay enabled.
- This option SHOULD NOT BE ENABLED for production use cases.
- endchoice
-endmenu # Security features
diff --git a/ports/espressif/components/bootloader/project_include.cmake b/ports/espressif/components/bootloader/project_include.cmake
deleted file mode 100644
index a1f3d247e..000000000
--- a/ports/espressif/components/bootloader/project_include.cmake
+++ /dev/null
@@ -1,153 +0,0 @@
-set(BOOTLOADER_OFFSET ${CONFIG_BOOTLOADER_OFFSET_IN_FLASH})
-
-# Do not generate flash file when building bootloader
-if(BOOTLOADER_BUILD OR NOT CONFIG_APP_BUILD_BOOTLOADER)
- return()
-endif()
-
-# Glue to build the bootloader subproject binary as an external
-# cmake project under this one
-#
-#
-idf_build_get_property(build_dir BUILD_DIR)
-set(BOOTLOADER_BUILD_DIR "${build_dir}/bootloader")
-set(BOOTLOADER_ELF_FILE "${BOOTLOADER_BUILD_DIR}/bootloader.elf")
-set(bootloader_binary_files
- "${BOOTLOADER_ELF_FILE}"
- "${BOOTLOADER_BUILD_DIR}/bootloader.bin"
- "${BOOTLOADER_BUILD_DIR}/bootloader.map"
- )
-
-idf_build_get_property(project_dir PROJECT_DIR)
-
-# There are some additional processing when CONFIG_SECURE_SIGNED_APPS. This happens
-# when either CONFIG_SECURE_BOOT_V1_ENABLED or CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES.
-# For both cases, the user either sets binaries to be signed during build or not
-# using CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES.
-#
-# Regardless, pass the main project's keys (signing/verification) to the bootloader subproject
-# via config.
-if(CONFIG_SECURE_SIGNED_APPS)
- add_custom_target(gen_secure_boot_keys)
-
- if(CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME)
- set(secure_apps_signing_version "1")
- elseif(CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME OR CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME)
- set(secure_apps_signing_version "2")
- endif()
-
- if(CONFIG_SECURE_BOOT_V1_ENABLED)
- # Check that the configuration is sane
- if((CONFIG_SECURE_BOOTLOADER_REFLASHABLE AND CONFIG_SECURE_BOOTLOADER_ONE_TIME_FLASH) OR
- (NOT CONFIG_SECURE_BOOTLOADER_REFLASHABLE AND NOT CONFIG_SECURE_BOOTLOADER_ONE_TIME_FLASH))
- fail_at_build_time(bootloader "Invalid bootloader target: bad sdkconfig?")
- endif()
-
- if(CONFIG_SECURE_BOOTLOADER_REFLASHABLE)
- set(bootloader_binary_files
- ${bootloader_binary_files}
- "${BOOTLOADER_BUILD_DIR}/bootloader-reflash-digest.bin"
- "${BOOTLOADER_BUILD_DIR}/secure-bootloader-key-192.bin"
- "${BOOTLOADER_BUILD_DIR}/secure-bootloader-key-256.bin"
- )
- endif()
- endif()
-
- # Since keys are usually given relative to main project dir, get the absolute paths to the keys
- # for use by the bootloader subproject. Replace the values in config with these absolute paths,
- # so that bootloader subproject does not need to assume main project dir to obtain path to the keys.
- if(CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES)
- get_filename_component(secure_boot_signing_key
- "${CONFIG_SECURE_BOOT_SIGNING_KEY}"
- ABSOLUTE BASE_DIR "${project_dir}")
-
- if(NOT EXISTS ${secure_boot_signing_key})
- # If the signing key is not found, create a phony gen_secure_boot_signing_key target that
- # fails the build. fail_at_build_time causes a cmake run next time
- # (to pick up a new signing key if one exists, etc.)
- if(CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME)
- fail_at_build_time(gen_secure_boot_signing_key
- "Secure Boot Signing Key ${CONFIG_SECURE_BOOT_SIGNING_KEY} does not exist. Generate using:"
- "\tespsecure.py generate_signing_key --version ${secure_apps_signing_version} \
- ${CONFIG_SECURE_BOOT_SIGNING_KEY}")
- else()
- if(CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_192_BITS)
- set(scheme "ecdsa192")
- elseif(CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_256_BITS)
- set(scheme "ecdsa256")
- endif()
- fail_at_build_time(gen_secure_boot_signing_key
- "Secure Boot Signing Key ${CONFIG_SECURE_BOOT_SIGNING_KEY} does not exist. Generate using:"
- "\tespsecure.py generate_signing_key --version ${secure_apps_signing_version} \
- --scheme ${scheme} ${CONFIG_SECURE_BOOT_SIGNING_KEY}")
- endif()
- else()
- add_custom_target(gen_secure_boot_signing_key)
- endif()
-
- set(SECURE_BOOT_SIGNING_KEY ${secure_boot_signing_key}) # needed by some other components
- set(sign_key_arg "-DSECURE_BOOT_SIGNING_KEY=${secure_boot_signing_key}")
- set(ver_key_arg)
-
- add_dependencies(gen_secure_boot_keys gen_secure_boot_signing_key)
- elseif(CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME)
-
- get_filename_component(secure_boot_verification_key
- ${CONFIG_SECURE_BOOT_VERIFICATION_KEY}
- ABSOLUTE BASE_DIR "${project_dir}")
-
- if(NOT EXISTS ${secure_boot_verification_key})
- # If the verification key is not found, create a phony gen_secure_boot_verification_key target that
- # fails the build. fail_at_build_time causes a cmake run next time
- # (to pick up a new verification key if one exists, etc.)
- fail_at_build_time(gen_secure_boot_verification_key
- "Secure Boot Verification Public Key ${CONFIG_SECURE_BOOT_VERIFICATION_KEY} does not exist."
- "\tThis can be extracted from the private signing key."
- "\tSee docs/security/secure-boot-v1.rst for details.")
- else()
- add_custom_target(gen_secure_boot_verification_key)
- endif()
-
- set(sign_key_arg)
- set(ver_key_arg "-DSECURE_BOOT_VERIFICATION_KEY=${secure_boot_verification_key}")
-
- add_dependencies(gen_secure_boot_keys gen_secure_boot_verification_key)
- endif()
-else()
- set(sign_key_arg)
- set(ver_key_arg)
-endif()
-
-idf_build_get_property(idf_path IDF_PATH)
-idf_build_get_property(idf_target IDF_TARGET)
-idf_build_get_property(sdkconfig SDKCONFIG)
-idf_build_get_property(python PYTHON)
-idf_build_get_property(extra_cmake_args EXTRA_CMAKE_ARGS)
-
-externalproject_add(bootloader
- SOURCE_DIR "${CMAKE_CURRENT_LIST_DIR}/subproject"
- BINARY_DIR "${BOOTLOADER_BUILD_DIR}"
- CMAKE_ARGS -DSDKCONFIG=${sdkconfig} -DIDF_PATH=${idf_path} -DIDF_TARGET=${idf_target}
- -DPYTHON_DEPS_CHECKED=1 -DPYTHON=${python}
- -DEXTRA_COMPONENT_DIRS=${CMAKE_CURRENT_LIST_DIR}
- -DPROJECT_SOURCE_DIR=${PROJECT_SOURCE_DIR}
- -DBOARD=${BOARD}
- ${sign_key_arg} ${ver_key_arg}
- ${extra_cmake_args}
- INSTALL_COMMAND ""
- BUILD_ALWAYS 1 # no easy way around this...
- BUILD_BYPRODUCTS ${bootloader_binary_files}
- )
-
-if(CONFIG_SECURE_SIGNED_APPS)
- add_dependencies(bootloader gen_secure_boot_keys)
-endif()
-
-# this is a hack due to an (annoying) shortcoming in cmake, it can't
-# extend the 'clean' target to the external project
-# see thread: https://cmake.org/pipermail/cmake/2016-December/064660.html
-#
-# So for now we just have the top-level build remove the final build products...
-set_property(DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" APPEND PROPERTY
- ADDITIONAL_CLEAN_FILES
- ${bootloader_binary_files})
diff --git a/ports/espressif/components/bootloader/sdkconfig.rename b/ports/espressif/components/bootloader/sdkconfig.rename
deleted file mode 100644
index bdcfe3648..000000000
--- a/ports/espressif/components/bootloader/sdkconfig.rename
+++ /dev/null
@@ -1,25 +0,0 @@
-# sdkconfig replacement configurations for deprecated options formatted as
-# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
-
-CONFIG_LOG_BOOTLOADER_LEVEL CONFIG_BOOTLOADER_LOG_LEVEL
-CONFIG_LOG_BOOTLOADER_LEVEL_NONE CONFIG_BOOTLOADER_LOG_LEVEL_NONE
-CONFIG_LOG_BOOTLOADER_LEVEL_ERROR CONFIG_BOOTLOADER_LOG_LEVEL_ERROR
-CONFIG_LOG_BOOTLOADER_LEVEL_WARN CONFIG_BOOTLOADER_LOG_LEVEL_WARN
-CONFIG_LOG_BOOTLOADER_LEVEL_INFO CONFIG_BOOTLOADER_LOG_LEVEL_INFO
-CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG
-CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE
-
-CONFIG_APP_ROLLBACK_ENABLE CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE
-CONFIG_APP_ANTI_ROLLBACK CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
-CONFIG_APP_SECURE_VERSION CONFIG_BOOTLOADER_APP_SECURE_VERSION
-CONFIG_APP_SECURE_VERSION_SIZE_EFUSE_FIELD CONFIG_BOOTLOADER_APP_SEC_VER_SIZE_EFUSE_FIELD
-CONFIG_EFUSE_SECURE_VERSION_EMULATE CONFIG_BOOTLOADER_EFUSE_SECURE_VERSION_EMULATE
-
-CONFIG_FLASH_ENCRYPTION_ENABLED CONFIG_SECURE_FLASH_ENC_ENABLED
-CONFIG_FLASH_ENCRYPTION_INSECURE CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
-CONFIG_FLASH_ENCRYPTION_UART_BOOTLOADER_ALLOW_ENCRYPT CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC
-CONFIG_FLASH_ENCRYPTION_UART_BOOTLOADER_ALLOW_DECRYPT CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC
-CONFIG_FLASH_ENCRYPTION_UART_BOOTLOADER_ALLOW_CACHE CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE
-
-# Secure Boot Scheme
-CONFIG_SECURE_BOOT_ENABLED CONFIG_SECURE_BOOT_V1_ENABLED
diff --git a/ports/espressif/components/bootloader/subproject/.gitignore b/ports/espressif/components/bootloader/subproject/.gitignore
deleted file mode 100644
index 278a862ae..000000000
--- a/ports/espressif/components/bootloader/subproject/.gitignore
+++ /dev/null
@@ -1,2 +0,0 @@
-build
-sdkconfig
diff --git a/ports/espressif/components/bootloader/subproject/CMakeLists.txt b/ports/espressif/components/bootloader/subproject/CMakeLists.txt
deleted file mode 100644
index 2daf4d90e..000000000
--- a/ports/espressif/components/bootloader/subproject/CMakeLists.txt
+++ /dev/null
@@ -1,238 +0,0 @@
-cmake_minimum_required(VERSION 3.16)
-
-if(NOT SDKCONFIG)
- message(FATAL_ERROR "Bootloader subproject expects the SDKCONFIG variable to be passed "
- "in by the parent build process.")
-endif()
-
-if(NOT IDF_PATH)
- message(FATAL_ERROR "Bootloader subproject expects the IDF_PATH variable to be passed "
- "in by the parent build process.")
-endif()
-
-if(NOT IDF_TARGET)
- message(FATAL_ERROR "Bootloader subproject expects the IDF_TARGET variable to be passed "
- "in by the parent build process.")
-endif()
-
-# A number of these components are implemented as config-only when built in the bootloader
-set(COMPONENTS
- bootloader
- esptool_py
- esp_hw_support
- esp_system
- freertos
- hal
- partition_table
- soc
- bootloader_support
- log
- spi_flash
- micro-ecc
- main
- efuse
- esp_system
- newlib)
-
-# Make EXTRA_COMPONENT_DIRS variable to point to the bootloader_components directory
-# of the project being compiled
-set(PROJECT_EXTRA_COMPONENTS "${PROJECT_SOURCE_DIR}/bootloader_components")
-if(EXISTS ${PROJECT_EXTRA_COMPONENTS})
- list(APPEND EXTRA_COMPONENT_DIRS "${PROJECT_EXTRA_COMPONENTS}")
-endif()
-
-# Consider each directory in project's bootloader_components as a component to be compiled
-file(GLOB proj_components RELATIVE ${PROJECT_EXTRA_COMPONENTS} ${PROJECT_EXTRA_COMPONENTS}/*)
-foreach(component ${proj_components})
- # Only directories are considered as components
- if(IS_DIRECTORY ${curdir}/${child})
- list(APPEND COMPONENTS ${component})
- endif()
-endforeach()
-
-set(BOOTLOADER_BUILD 1)
-include("${IDF_PATH}/tools/cmake/project.cmake")
-set(common_req log esp_rom esp_common esp_hw_support newlib)
-idf_build_set_property(__COMPONENT_REQUIRES_COMMON "${common_req}")
-idf_build_set_property(__OUTPUT_SDKCONFIG 0)
-project(bootloader)
-
-idf_build_set_property(COMPILE_DEFINITIONS "BOOTLOADER_BUILD=1" APPEND)
-idf_build_set_property(COMPILE_OPTIONS "-fno-stack-protector" APPEND)
-
-idf_component_get_property(main_args esptool_py FLASH_ARGS)
-idf_component_get_property(sub_args esptool_py FLASH_SUB_ARGS)
-
-# String for printing flash command
-string(REPLACE ";" " " esptoolpy_write_flash
- "${ESPTOOLPY} --port=(PORT) --baud=(BAUD) ${main_args} "
- "write_flash ${sub_args}")
-
-string(REPLACE ";" " " espsecurepy "${ESPSECUREPY}")
-string(REPLACE ";" " " espefusepy "${ESPEFUSEPY}")
-
-# Suppress warning: "Manually-specified variables were not used by the project: SECURE_BOOT_SIGNING_KEY"
-set(ignore_signing_key "${SECURE_BOOT_SIGNING_KEY}")
-
-if(CONFIG_SECURE_BOOTLOADER_REFLASHABLE)
- if(CONFIG_SECURE_BOOTLOADER_KEY_ENCODING_192BIT)
- set(key_digest_len 192)
- else()
- set(key_digest_len 256)
- endif()
-
- get_filename_component(bootloader_digest_bin
- "bootloader-reflash-digest.bin"
- ABSOLUTE BASE_DIR "${CMAKE_BINARY_DIR}")
-
- get_filename_component(secure_bootloader_key
- "secure-bootloader-key-${key_digest_len}.bin"
- ABSOLUTE BASE_DIR "${CMAKE_BINARY_DIR}")
-
- add_custom_command(OUTPUT "${secure_bootloader_key}"
- COMMAND ${ESPSECUREPY} digest_private_key
- --keylen "${key_digest_len}"
- --keyfile "${SECURE_BOOT_SIGNING_KEY}"
- "${secure_bootloader_key}"
- VERBATIM)
-
- if(CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES)
- add_custom_target(gen_secure_bootloader_key ALL DEPENDS "${secure_bootloader_key}")
- else()
- if(NOT EXISTS "${secure_bootloader_key}")
- message(FATAL_ERROR
- "No pre-generated key for a reflashable secure bootloader is available, "
- "due to signing configuration."
- "\nTo generate one, you can use this command:"
- "\n\t${espsecurepy} generate_flash_encryption_key ${secure_bootloader_key}"
- "\nIf a signing key is present, then instead use:"
- "\n\t${espsecurepy} digest_private_key "
- "--keylen (192/256) --keyfile KEYFILE "
- "${secure_bootloader_key}")
- endif()
- add_custom_target(gen_secure_bootloader_key)
- endif()
-
- add_custom_command(OUTPUT "${bootloader_digest_bin}"
- COMMAND ${CMAKE_COMMAND} -E echo "DIGEST ${bootloader_digest_bin}"
- COMMAND ${ESPSECUREPY} digest_secure_bootloader --keyfile "${secure_bootloader_key}"
- -o "${bootloader_digest_bin}" "${CMAKE_BINARY_DIR}/bootloader.bin"
- MAIN_DEPENDENCY "${CMAKE_BINARY_DIR}/.bin_timestamp"
- DEPENDS gen_secure_bootloader_key gen_project_binary
- VERBATIM)
-
- add_custom_target(gen_bootloader_digest_bin ALL DEPENDS "${bootloader_digest_bin}")
-endif()
-
-if(CONFIG_SECURE_BOOT_V2_ENABLED)
- if(CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES)
- get_filename_component(secure_boot_signing_key
- "${SECURE_BOOT_SIGNING_KEY}" ABSOLUTE BASE_DIR "${project_dir}")
-
- if(NOT EXISTS "${secure_boot_signing_key}")
- message(FATAL_ERROR
- "Secure Boot Signing Key Not found."
- "\nGenerate the Secure Boot V2 RSA-PSS 3072 Key."
- "\nTo generate one, you can use this command:"
- "\n\t${espsecurepy} generate_signing_key --version 2 ${SECURE_BOOT_SIGNING_KEY}")
- endif()
-
- set(bootloader_unsigned_bin "bootloader-unsigned.bin")
- add_custom_command(OUTPUT ".signed_bin_timestamp"
- COMMAND ${CMAKE_COMMAND} -E copy "${CMAKE_BINARY_DIR}/${PROJECT_BIN}"
- "${CMAKE_BINARY_DIR}/${bootloader_unsigned_bin}"
- COMMAND ${ESPSECUREPY} sign_data --version 2 --keyfile "${secure_boot_signing_key}"
- -o "${CMAKE_BINARY_DIR}/${PROJECT_BIN}" "${CMAKE_BINARY_DIR}/${bootloader_unsigned_bin}"
- COMMAND ${CMAKE_COMMAND} -E echo "Generated signed binary image ${build_dir}/${PROJECT_BIN}"
- "from ${CMAKE_BINARY_DIR}/${bootloader_unsigned_bin}"
- COMMAND ${CMAKE_COMMAND} -E md5sum "${CMAKE_BINARY_DIR}/${PROJECT_BIN}"
- > "${CMAKE_BINARY_DIR}/.signed_bin_timestamp"
- DEPENDS "${build_dir}/.bin_timestamp"
- VERBATIM
- COMMENT "Generated the signed Bootloader")
- else()
- add_custom_command(OUTPUT ".signed_bin_timestamp"
- VERBATIM
- COMMENT "Bootloader generated but not signed")
- endif()
-
- add_custom_target(gen_signed_bootloader ALL DEPENDS "${build_dir}/.signed_bin_timestamp")
-endif()
-
-if(CONFIG_SECURE_BOOTLOADER_ONE_TIME_FLASH)
- add_custom_command(TARGET bootloader.elf POST_BUILD
- COMMAND ${CMAKE_COMMAND} -E echo
- "=============================================================================="
- COMMAND ${CMAKE_COMMAND} -E echo
- "Bootloader built. Secure boot enabled, so bootloader not flashed automatically."
- COMMAND ${CMAKE_COMMAND} -E echo
- "One-time flash command is:"
- COMMAND ${CMAKE_COMMAND} -E echo
- "\t${esptoolpy_write_flash} ${BOOTLOADER_OFFSET} ${CMAKE_BINARY_DIR}/bootloader.bin"
- COMMAND ${CMAKE_COMMAND} -E echo
- "* IMPORTANT: After first boot, BOOTLOADER CANNOT BE RE-FLASHED on same device"
- VERBATIM)
-elseif(CONFIG_SECURE_BOOTLOADER_REFLASHABLE)
- add_custom_command(TARGET bootloader.elf POST_BUILD
- COMMAND ${CMAKE_COMMAND} -E echo
- "=============================================================================="
- COMMAND ${CMAKE_COMMAND} -E echo
- "Bootloader built and secure digest generated."
- COMMAND ${CMAKE_COMMAND} -E echo
- "Secure boot enabled, so bootloader not flashed automatically."
- COMMAND ${CMAKE_COMMAND} -E echo
- "Burn secure boot key to efuse using:"
- COMMAND ${CMAKE_COMMAND} -E echo
- "\t${espefusepy} burn_key secure_boot_v1 ${secure_bootloader_key}"
- COMMAND ${CMAKE_COMMAND} -E echo
- "First time flash command is:"
- COMMAND ${CMAKE_COMMAND} -E echo
- "\t${esptoolpy_write_flash} ${BOOTLOADER_OFFSET} ${CMAKE_BINARY_DIR}/bootloader.bin"
- COMMAND ${CMAKE_COMMAND} -E echo
- "=============================================================================="
- COMMAND ${CMAKE_COMMAND} -E echo
- "To reflash the bootloader after initial flash:"
- COMMAND ${CMAKE_COMMAND} -E echo
- "\t${esptoolpy_write_flash} 0x0 ${bootloader_digest_bin}"
- COMMAND ${CMAKE_COMMAND} -E echo
- "=============================================================================="
- COMMAND ${CMAKE_COMMAND} -E echo
- "* After first boot, only re-flashes of this kind (with same key) will be accepted."
- COMMAND ${CMAKE_COMMAND} -E echo
- "* Not recommended to re-use the same secure boot keyfile on multiple production devices."
- DEPENDS gen_secure_bootloader_key gen_bootloader_digest_bin
- VERBATIM)
-elseif(CONFIG_SECURE_BOOT_V2_ENABLED AND (CONFIG_IDF_TARGET_ESP32S2 OR CONFIG_IDF_TARGET_ESP32C3))
- add_custom_command(TARGET bootloader.elf POST_BUILD
- COMMAND ${CMAKE_COMMAND} -E echo
- "=============================================================================="
- COMMAND ${CMAKE_COMMAND} -E echo
- "Bootloader built. Secure boot enabled, so bootloader not flashed automatically."
- COMMAND ${CMAKE_COMMAND} -E echo
- "To sign the bootloader with additional private keys."
- COMMAND ${CMAKE_COMMAND} -E echo
- "\t${espsecurepy} sign_data -k secure_boot_signing_key2.pem -v 2 \
---append_signatures -o signed_bootloader.bin build/bootloader/bootloader.bin"
- COMMAND ${CMAKE_COMMAND} -E echo
- "Secure boot enabled, so bootloader not flashed automatically."
- COMMAND ${CMAKE_COMMAND} -E echo
- "\t${esptoolpy_write_flash} ${BOOTLOADER_OFFSET} ${CMAKE_BINARY_DIR}/bootloader.bin"
- COMMAND ${CMAKE_COMMAND} -E echo
- "=============================================================================="
- DEPENDS gen_signed_bootloader
- VERBATIM)
-elseif(CONFIG_SECURE_BOOT_V2_ENABLED)
- add_custom_command(TARGET bootloader.elf POST_BUILD
- COMMAND ${CMAKE_COMMAND} -E echo
- "=============================================================================="
- COMMAND ${CMAKE_COMMAND} -E echo
- "Bootloader built. Secure boot enabled, so bootloader not flashed automatically."
- COMMAND ${CMAKE_COMMAND} -E echo
- "Secure boot enabled, so bootloader not flashed automatically."
- COMMAND ${CMAKE_COMMAND} -E echo
- "\t${esptoolpy_write_flash} ${BOOTLOADER_OFFSET} ${CMAKE_BINARY_DIR}/bootloader.bin"
- COMMAND ${CMAKE_COMMAND} -E echo
- "=============================================================================="
- DEPENDS gen_signed_bootloader
- VERBATIM)
-endif()
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/CMakeLists.txt b/ports/espressif/components/bootloader/subproject/components/micro-ecc/CMakeLists.txt
deleted file mode 100644
index 4e630af61..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/CMakeLists.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-# only compile the "uECC_verify_antifault.c" file which includes the "micro-ecc/uECC.c" source file
-idf_component_register(SRCS "uECC_verify_antifault.c"
- INCLUDE_DIRS . micro-ecc)
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/.gitignore b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/.gitignore
deleted file mode 100644
index 96c82b14d..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/.gitignore
+++ /dev/null
@@ -1,8 +0,0 @@
-__build__/
-__pycache__
-*.pyc
-*.pyo
-*.pyd
-*.pyz
-*.egg-info/
-.DS_Store
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/LICENSE.txt b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/LICENSE.txt
deleted file mode 100644
index ab099ae5a..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/LICENSE.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-Copyright (c) 2014, Kenneth MacKay
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
- * Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
- * Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/README.md b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/README.md
deleted file mode 100644
index 111321bf7..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/README.md
+++ /dev/null
@@ -1,41 +0,0 @@
-micro-ecc
-==========
-
-A small and fast ECDH and ECDSA implementation for 8-bit, 32-bit, and 64-bit processors.
-
-The static version of micro-ecc (ie, where the curve was selected at compile-time) can be found in the "static" branch.
-
-Features
---------
-
- * Resistant to known side-channel attacks.
- * Written in C, with optional GCC inline assembly for AVR, ARM and Thumb platforms.
- * Supports 8, 32, and 64-bit architectures.
- * Small code size.
- * No dynamic memory allocation.
- * Support for 5 standard curves: secp160r1, secp192r1, secp224r1, secp256r1, and secp256k1.
- * BSD 2-clause license.
-
-Usage Notes
------------
-### Point Representation ###
-Compressed points are represented in the standard format as defined in http://www.secg.org/sec1-v2.pdf; uncompressed points are represented in standard format, but without the `0x04` prefix. All functions except `uECC_decompress()` only accept uncompressed points; use `uECC_compress()` and `uECC_decompress()` to convert between compressed and uncompressed point representations.
-
-Private keys are represented in the standard format.
-
-### Using the Code ###
-
-I recommend just copying (or symlink) the uECC files into your project. Then just `#include "uECC.h"` to use the micro-ecc functions.
-
-For use with Arduino, you can use the Library Manager to download micro-ecc (**Sketch**=>**Include Library**=>**Manage Libraries**). You can then use uECC just like any other Arduino library (uECC should show up in the **Sketch**=>**Import Library** submenu).
-
-See uECC.h for documentation for each function.
-
-### Compilation Notes ###
-
- * Should compile with any C/C++ compiler that supports stdint.h (this includes Visual Studio 2013).
- * If you want to change the defaults for any of the uECC compile-time options (such as `uECC_OPTIMIZATION_LEVEL`), you must change them in your Makefile or similar so that uECC.c is compiled with the desired values (ie, compile uECC.c with `-DuECC_OPTIMIZATION_LEVEL=3` or whatever).
- * When compiling for a Thumb-1 platform, you must use the `-fomit-frame-pointer` GCC option (this is enabled by default when compiling with `-O1` or higher).
- * When compiling for an ARM/Thumb-2 platform with `uECC_OPTIMIZATION_LEVEL` >= 3, you must use the `-fomit-frame-pointer` GCC option (this is enabled by default when compiling with `-O1` or higher).
- * When compiling for AVR, you must have optimizations enabled (compile with `-O1` or higher).
- * When building for Windows, you will need to link in the `advapi32.lib` system library.
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_arm.inc b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_arm.inc
deleted file mode 100644
index 688fdc75a..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_arm.inc
+++ /dev/null
@@ -1,820 +0,0 @@
-/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_ASM_ARM_H_
-#define _UECC_ASM_ARM_H_
-
-#if (uECC_SUPPORTS_secp256r1 || uECC_SUPPORTS_secp256k1)
- #define uECC_MIN_WORDS 8
-#endif
-#if uECC_SUPPORTS_secp224r1
- #undef uECC_MIN_WORDS
- #define uECC_MIN_WORDS 7
-#endif
-#if uECC_SUPPORTS_secp192r1
- #undef uECC_MIN_WORDS
- #define uECC_MIN_WORDS 6
-#endif
-#if uECC_SUPPORTS_secp160r1
- #undef uECC_MIN_WORDS
- #define uECC_MIN_WORDS 5
-#endif
-
-#if (uECC_PLATFORM == uECC_arm_thumb)
- #define REG_RW "+l"
- #define REG_WRITE "=l"
-#else
- #define REG_RW "+r"
- #define REG_WRITE "=r"
-#endif
-
-#if (uECC_PLATFORM == uECC_arm_thumb || uECC_PLATFORM == uECC_arm_thumb2)
- #define REG_RW_LO "+l"
- #define REG_WRITE_LO "=l"
-#else
- #define REG_RW_LO "+r"
- #define REG_WRITE_LO "=r"
-#endif
-
-#if (uECC_PLATFORM == uECC_arm_thumb2)
- #define RESUME_SYNTAX
-#else
- #define RESUME_SYNTAX ".syntax divided \n\t"
-#endif
-
-#if (uECC_OPTIMIZATION_LEVEL >= 2)
-
-uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
-#if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- #if (uECC_PLATFORM == uECC_arm_thumb) || (uECC_PLATFORM == uECC_arm_thumb2)
- uint32_t jump = (uECC_MAX_WORDS - num_words) * 4 * 2 + 1;
- #else /* ARM */
- uint32_t jump = (uECC_MAX_WORDS - num_words) * 4 * 4;
- #endif
-#endif
- uint32_t carry;
- uint32_t left_word;
- uint32_t right_word;
-
- __asm__ volatile (
- ".syntax unified \n\t"
- "movs %[carry], #0 \n\t"
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "adr %[left], 1f \n\t"
- ".align 4 \n\t"
- "adds %[jump], %[left] \n\t"
- #endif
-
- "ldmia %[lptr]!, {%[left]} \n\t"
- "ldmia %[rptr]!, {%[right]} \n\t"
- "adds %[left], %[right] \n\t"
- "stmia %[dptr]!, {%[left]} \n\t"
-
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "bx %[jump] \n\t"
- #endif
- "1: \n\t"
- REPEAT(DEC(uECC_MAX_WORDS),
- "ldmia %[lptr]!, {%[left]} \n\t"
- "ldmia %[rptr]!, {%[right]} \n\t"
- "adcs %[left], %[right] \n\t"
- "stmia %[dptr]!, {%[left]} \n\t")
-
- "adcs %[carry], %[carry] \n\t"
- RESUME_SYNTAX
- : [dptr] REG_RW_LO (result), [lptr] REG_RW_LO (left), [rptr] REG_RW_LO (right),
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- [jump] REG_RW_LO (jump),
- #endif
- [carry] REG_WRITE_LO (carry), [left] REG_WRITE_LO (left_word),
- [right] REG_WRITE_LO (right_word)
- :
- : "cc", "memory"
- );
- return carry;
-}
-#define asm_add 1
-
-uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
-#if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- #if (uECC_PLATFORM == uECC_arm_thumb) || (uECC_PLATFORM == uECC_arm_thumb2)
- uint32_t jump = (uECC_MAX_WORDS - num_words) * 4 * 2 + 1;
- #else /* ARM */
- uint32_t jump = (uECC_MAX_WORDS - num_words) * 4 * 4;
- #endif
-#endif
- uint32_t carry;
- uint32_t left_word;
- uint32_t right_word;
-
- __asm__ volatile (
- ".syntax unified \n\t"
- "movs %[carry], #0 \n\t"
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "adr %[left], 1f \n\t"
- ".align 4 \n\t"
- "adds %[jump], %[left] \n\t"
- #endif
-
- "ldmia %[lptr]!, {%[left]} \n\t"
- "ldmia %[rptr]!, {%[right]} \n\t"
- "subs %[left], %[right] \n\t"
- "stmia %[dptr]!, {%[left]} \n\t"
-
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "bx %[jump] \n\t"
- #endif
- "1: \n\t"
- REPEAT(DEC(uECC_MAX_WORDS),
- "ldmia %[lptr]!, {%[left]} \n\t"
- "ldmia %[rptr]!, {%[right]} \n\t"
- "sbcs %[left], %[right] \n\t"
- "stmia %[dptr]!, {%[left]} \n\t")
-
- "adcs %[carry], %[carry] \n\t"
- RESUME_SYNTAX
- : [dptr] REG_RW_LO (result), [lptr] REG_RW_LO (left), [rptr] REG_RW_LO (right),
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- [jump] REG_RW_LO (jump),
- #endif
- [carry] REG_WRITE_LO (carry), [left] REG_WRITE_LO (left_word),
- [right] REG_WRITE_LO (right_word)
- :
- : "cc", "memory"
- );
- return !carry; /* Note that on ARM, carry flag set means "no borrow" when subtracting
- (for some reason...) */
-}
-#define asm_sub 1
-
-#endif /* (uECC_OPTIMIZATION_LEVEL >= 2) */
-
-#if (uECC_OPTIMIZATION_LEVEL >= 3)
-
-#if (uECC_PLATFORM != uECC_arm_thumb)
-
-#if uECC_ARM_USE_UMAAL
- #include "asm_arm_mult_square_umaal.inc"
-#else
- #include "asm_arm_mult_square.inc"
-#endif
-
-#if (uECC_OPTIMIZATION_LEVEL == 3)
-
-uECC_VLI_API void uECC_vli_mult(uint32_t *result,
- const uint32_t *left,
- const uint32_t *right,
- wordcount_t num_words) {
- register uint32_t *r0 __asm__("r0") = result;
- register const uint32_t *r1 __asm__("r1") = left;
- register const uint32_t *r2 __asm__("r2") = right;
- register uint32_t r3 __asm__("r3") = num_words;
-
- __asm__ volatile (
- ".syntax unified \n\t"
-#if (uECC_MIN_WORDS == 5)
- FAST_MULT_ASM_5
- #if (uECC_MAX_WORDS > 5)
- FAST_MULT_ASM_5_TO_6
- #endif
- #if (uECC_MAX_WORDS > 6)
- FAST_MULT_ASM_6_TO_7
- #endif
- #if (uECC_MAX_WORDS > 7)
- FAST_MULT_ASM_7_TO_8
- #endif
-#elif (uECC_MIN_WORDS == 6)
- FAST_MULT_ASM_6
- #if (uECC_MAX_WORDS > 6)
- FAST_MULT_ASM_6_TO_7
- #endif
- #if (uECC_MAX_WORDS > 7)
- FAST_MULT_ASM_7_TO_8
- #endif
-#elif (uECC_MIN_WORDS == 7)
- FAST_MULT_ASM_7
- #if (uECC_MAX_WORDS > 7)
- FAST_MULT_ASM_7_TO_8
- #endif
-#elif (uECC_MIN_WORDS == 8)
- FAST_MULT_ASM_8
-#endif
- "1: \n\t"
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1), "+r" (r2)
- : "r" (r3)
- : "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
-}
-#define asm_mult 1
-
-#if uECC_SQUARE_FUNC
-uECC_VLI_API void uECC_vli_square(uECC_word_t *result,
- const uECC_word_t *left,
- wordcount_t num_words) {
- register uint32_t *r0 __asm__("r0") = result;
- register const uint32_t *r1 __asm__("r1") = left;
- register uint32_t r2 __asm__("r2") = num_words;
-
- __asm__ volatile (
- ".syntax unified \n\t"
-#if (uECC_MIN_WORDS == 5)
- FAST_SQUARE_ASM_5
- #if (uECC_MAX_WORDS > 5)
- FAST_SQUARE_ASM_5_TO_6
- #endif
- #if (uECC_MAX_WORDS > 6)
- FAST_SQUARE_ASM_6_TO_7
- #endif
- #if (uECC_MAX_WORDS > 7)
- FAST_SQUARE_ASM_7_TO_8
- #endif
-#elif (uECC_MIN_WORDS == 6)
- FAST_SQUARE_ASM_6
- #if (uECC_MAX_WORDS > 6)
- FAST_SQUARE_ASM_6_TO_7
- #endif
- #if (uECC_MAX_WORDS > 7)
- FAST_SQUARE_ASM_7_TO_8
- #endif
-#elif (uECC_MIN_WORDS == 7)
- FAST_SQUARE_ASM_7
- #if (uECC_MAX_WORDS > 7)
- FAST_SQUARE_ASM_7_TO_8
- #endif
-#elif (uECC_MIN_WORDS == 8)
- FAST_SQUARE_ASM_8
-#endif
-
- "1: \n\t"
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1)
- : "r" (r2)
- : "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
-}
-#define asm_square 1
-#endif /* uECC_SQUARE_FUNC */
-
-#else /* (uECC_OPTIMIZATION_LEVEL > 3) */
-
-uECC_VLI_API void uECC_vli_mult(uint32_t *result,
- const uint32_t *left,
- const uint32_t *right,
- wordcount_t num_words) {
- register uint32_t *r0 __asm__("r0") = result;
- register const uint32_t *r1 __asm__("r1") = left;
- register const uint32_t *r2 __asm__("r2") = right;
- register uint32_t r3 __asm__("r3") = num_words;
-
-#if uECC_SUPPORTS_secp160r1
- if (num_words == 5) {
- __asm__ volatile (
- ".syntax unified \n\t"
- FAST_MULT_ASM_5
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1), "+r" (r2)
- : "r" (r3)
- : "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
- return;
- }
-#endif
-#if uECC_SUPPORTS_secp192r1
- if (num_words == 6) {
- __asm__ volatile (
- ".syntax unified \n\t"
- FAST_MULT_ASM_6
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1), "+r" (r2)
- : "r" (r3)
- : "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
- return;
- }
-#endif
-#if uECC_SUPPORTS_secp224r1
- if (num_words == 7) {
- __asm__ volatile (
- ".syntax unified \n\t"
- FAST_MULT_ASM_7
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1), "+r" (r2)
- : "r" (r3)
- : "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
- return;
- }
-#endif
-#if (uECC_SUPPORTS_secp256r1 || uECC_SUPPORTS_secp256k1)
- if (num_words == 8) {
- __asm__ volatile (
- ".syntax unified \n\t"
- FAST_MULT_ASM_8
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1), "+r" (r2)
- : "r" (r3)
- : "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
- return;
- }
-#endif
-}
-#define asm_mult 1
-
-#if uECC_SQUARE_FUNC
-uECC_VLI_API void uECC_vli_square(uECC_word_t *result,
- const uECC_word_t *left,
- wordcount_t num_words) {
- register uint32_t *r0 __asm__("r0") = result;
- register const uint32_t *r1 __asm__("r1") = left;
- register uint32_t r2 __asm__("r2") = num_words;
-
-#if uECC_SUPPORTS_secp160r1
- if (num_words == 5) {
- __asm__ volatile (
- ".syntax unified \n\t"
- FAST_SQUARE_ASM_5
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1)
- : "r" (r2)
- : "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
- return;
- }
-#endif
-#if uECC_SUPPORTS_secp192r1
- if (num_words == 6) {
- __asm__ volatile (
- ".syntax unified \n\t"
- FAST_SQUARE_ASM_6
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1)
- : "r" (r2)
- : "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
- return;
- }
-#endif
-#if uECC_SUPPORTS_secp224r1
- if (num_words == 7) {
- __asm__ volatile (
- ".syntax unified \n\t"
- FAST_SQUARE_ASM_7
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1)
- : "r" (r2)
- : "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
- return;
- }
-#endif
-#if (uECC_SUPPORTS_secp256r1 || uECC_SUPPORTS_secp256k1)
- if (num_words == 8) {
- __asm__ volatile (
- ".syntax unified \n\t"
- FAST_SQUARE_ASM_8
- RESUME_SYNTAX
- : "+r" (r0), "+r" (r1)
- : "r" (r2)
- : "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
- return;
- }
-#endif
-}
-#define asm_square 1
-#endif /* uECC_SQUARE_FUNC */
-
-#endif /* (uECC_OPTIMIZATION_LEVEL > 3) */
-
-#endif /* uECC_PLATFORM != uECC_arm_thumb */
-
-#endif /* (uECC_OPTIMIZATION_LEVEL >= 3) */
-
-/* ---- "Small" implementations ---- */
-
-#if !asm_add
-uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- uint32_t carry = 0;
- uint32_t left_word;
- uint32_t right_word;
-
- __asm__ volatile (
- ".syntax unified \n\t"
- "1: \n\t"
- "ldmia %[lptr]!, {%[left]} \n\t" /* Load left word. */
- "ldmia %[rptr]!, {%[right]} \n\t" /* Load right word. */
- "lsrs %[carry], #1 \n\t" /* Set up carry flag (carry = 0 after this). */
- "adcs %[left], %[left], %[right] \n\t" /* Add with carry. */
- "adcs %[carry], %[carry], %[carry] \n\t" /* Store carry bit. */
- "stmia %[dptr]!, {%[left]} \n\t" /* Store result word. */
- "subs %[ctr], #1 \n\t" /* Decrement counter. */
- "bne 1b \n\t" /* Loop until counter == 0. */
- RESUME_SYNTAX
- : [dptr] REG_RW (result), [lptr] REG_RW (left), [rptr] REG_RW (right),
- [ctr] REG_RW (num_words), [carry] REG_RW (carry),
- [left] REG_WRITE (left_word), [right] REG_WRITE (right_word)
- :
- : "cc", "memory"
- );
- return carry;
-}
-#define asm_add 1
-#endif
-
-#if !asm_sub
-uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- uint32_t carry = 1; /* carry = 1 initially (means don't borrow) */
- uint32_t left_word;
- uint32_t right_word;
-
- __asm__ volatile (
- ".syntax unified \n\t"
- "1: \n\t"
- "ldmia %[lptr]!, {%[left]} \n\t" /* Load left word. */
- "ldmia %[rptr]!, {%[right]} \n\t" /* Load right word. */
- "lsrs %[carry], #1 \n\t" /* Set up carry flag (carry = 0 after this). */
- "sbcs %[left], %[left], %[right] \n\t" /* Subtract with borrow. */
- "adcs %[carry], %[carry], %[carry] \n\t" /* Store carry bit. */
- "stmia %[dptr]!, {%[left]} \n\t" /* Store result word. */
- "subs %[ctr], #1 \n\t" /* Decrement counter. */
- "bne 1b \n\t" /* Loop until counter == 0. */
- RESUME_SYNTAX
- : [dptr] REG_RW (result), [lptr] REG_RW (left), [rptr] REG_RW (right),
- [ctr] REG_RW (num_words), [carry] REG_RW (carry),
- [left] REG_WRITE (left_word), [right] REG_WRITE (right_word)
- :
- : "cc", "memory"
- );
- return !carry;
-}
-#define asm_sub 1
-#endif
-
-#if !asm_mult
-uECC_VLI_API void uECC_vli_mult(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
-#if (uECC_PLATFORM != uECC_arm_thumb)
- uint32_t c0 = 0;
- uint32_t c1 = 0;
- uint32_t c2 = 0;
- uint32_t k = 0;
- uint32_t i;
- uint32_t t0, t1;
-
- __asm__ volatile (
- ".syntax unified \n\t"
-
- "1: \n\t" /* outer loop (k < num_words) */
- "movs %[i], #0 \n\t" /* i = 0 */
- "b 3f \n\t"
-
- "2: \n\t" /* outer loop (k >= num_words) */
- "movs %[i], %[k] \n\t" /* i = k */
- "subs %[i], %[last_word] \n\t" /* i = k - (num_words - 1) (times 4) */
-
- "3: \n\t" /* inner loop */
- "subs %[t0], %[k], %[i] \n\t" /* t0 = k-i */
-
- "ldr %[t1], [%[right], %[t0]] \n\t" /* t1 = right[k - i] */
- "ldr %[t0], [%[left], %[i]] \n\t" /* t0 = left[i] */
-
- "umull %[t0], %[t1], %[t0], %[t1] \n\t" /* (t0, t1) = left[i] * right[k - i] */
-
- "adds %[c0], %[c0], %[t0] \n\t" /* add low word to c0 */
- "adcs %[c1], %[c1], %[t1] \n\t" /* add high word to c1, including carry */
- "adcs %[c2], %[c2], #0 \n\t" /* add carry to c2 */
-
- "adds %[i], #4 \n\t" /* i += 4 */
- "cmp %[i], %[last_word] \n\t" /* i > (num_words - 1) (times 4)? */
- "bgt 4f \n\t" /* if so, exit the loop */
- "cmp %[i], %[k] \n\t" /* i <= k? */
- "ble 3b \n\t" /* if so, continue looping */
-
- "4: \n\t" /* end inner loop */
-
- "str %[c0], [%[result], %[k]] \n\t" /* result[k] = c0 */
- "mov %[c0], %[c1] \n\t" /* c0 = c1 */
- "mov %[c1], %[c2] \n\t" /* c1 = c2 */
- "movs %[c2], #0 \n\t" /* c2 = 0 */
- "adds %[k], #4 \n\t" /* k += 4 */
- "cmp %[k], %[last_word] \n\t" /* k <= (num_words - 1) (times 4) ? */
- "ble 1b \n\t" /* if so, loop back, start with i = 0 */
- "cmp %[k], %[last_word], lsl #1 \n\t" /* k <= (num_words * 2 - 2) (times 4) ? */
- "ble 2b \n\t" /* if so, loop back, start with i = (k + 1) - num_words */
- /* end outer loop */
-
- "str %[c0], [%[result], %[k]] \n\t" /* result[num_words * 2 - 1] = c0 */
- RESUME_SYNTAX
- : [c0] "+r" (c0), [c1] "+r" (c1), [c2] "+r" (c2),
- [k] "+r" (k), [i] "=&r" (i), [t0] "=&r" (t0), [t1] "=&r" (t1)
- : [result] "r" (result), [left] "r" (left), [right] "r" (right),
- [last_word] "r" ((num_words - 1) * 4)
- : "cc", "memory"
- );
-
-#else /* Thumb-1 */
- uint32_t r4, r5, r6, r7;
-
- __asm__ volatile (
- ".syntax unified \n\t"
- "subs %[r3], #1 \n\t" /* r3 = num_words - 1 */
- "lsls %[r3], #2 \n\t" /* r3 = (num_words - 1) * 4 */
- "mov r8, %[r3] \n\t" /* r8 = (num_words - 1) * 4 */
- "lsls %[r3], #1 \n\t" /* r3 = (num_words - 1) * 8 */
- "mov r9, %[r3] \n\t" /* r9 = (num_words - 1) * 8 */
- "movs %[r3], #0 \n\t" /* c0 = 0 */
- "movs %[r4], #0 \n\t" /* c1 = 0 */
- "movs %[r5], #0 \n\t" /* c2 = 0 */
- "movs %[r6], #0 \n\t" /* k = 0 */
-
- "push {%[r0]} \n\t" /* keep result on the stack */
-
- "1: \n\t" /* outer loop (k < num_words) */
- "movs %[r7], #0 \n\t" /* r7 = i = 0 */
- "b 3f \n\t"
-
- "2: \n\t" /* outer loop (k >= num_words) */
- "movs %[r7], %[r6] \n\t" /* r7 = k */
- "mov %[r0], r8 \n\t" /* r0 = (num_words - 1) * 4 */
- "subs %[r7], %[r0] \n\t" /* r7 = i = k - (num_words - 1) (times 4) */
-
- "3: \n\t" /* inner loop */
- "mov r10, %[r3] \n\t"
- "mov r11, %[r4] \n\t"
- "mov r12, %[r5] \n\t"
- "mov r14, %[r6] \n\t"
- "subs %[r0], %[r6], %[r7] \n\t" /* r0 = k - i */
-
- "ldr %[r4], [%[r2], %[r0]] \n\t" /* r4 = right[k - i] */
- "ldr %[r0], [%[r1], %[r7]] \n\t" /* r0 = left[i] */
-
- "lsrs %[r3], %[r0], #16 \n\t" /* r3 = a1 */
- "uxth %[r0], %[r0] \n\t" /* r0 = a0 */
-
- "lsrs %[r5], %[r4], #16 \n\t" /* r5 = b1 */
- "uxth %[r4], %[r4] \n\t" /* r4 = b0 */
-
- "movs %[r6], %[r3] \n\t" /* r6 = a1 */
- "muls %[r6], %[r5], %[r6] \n\t" /* r6 = a1 * b1 */
- "muls %[r3], %[r4], %[r3] \n\t" /* r3 = b0 * a1 */
- "muls %[r5], %[r0], %[r5] \n\t" /* r5 = a0 * b1 */
- "muls %[r0], %[r4], %[r0] \n\t" /* r0 = a0 * b0 */
-
- /* Add middle terms */
- "lsls %[r4], %[r3], #16 \n\t"
- "lsrs %[r3], %[r3], #16 \n\t"
- "adds %[r0], %[r4] \n\t"
- "adcs %[r6], %[r3] \n\t"
-
- "lsls %[r4], %[r5], #16 \n\t"
- "lsrs %[r5], %[r5], #16 \n\t"
- "adds %[r0], %[r4] \n\t"
- "adcs %[r6], %[r5] \n\t"
-
- "mov %[r3], r10\n\t"
- "mov %[r4], r11\n\t"
- "mov %[r5], r12\n\t"
- "adds %[r3], %[r0] \n\t" /* add low word to c0 */
- "adcs %[r4], %[r6] \n\t" /* add high word to c1, including carry */
- "movs %[r0], #0 \n\t" /* r0 = 0 (does not affect carry bit) */
- "adcs %[r5], %[r0] \n\t" /* add carry to c2 */
-
- "mov %[r6], r14\n\t" /* r6 = k */
-
- "adds %[r7], #4 \n\t" /* i += 4 */
- "cmp %[r7], r8 \n\t" /* i > (num_words - 1) (times 4)? */
- "bgt 4f \n\t" /* if so, exit the loop */
- "cmp %[r7], %[r6] \n\t" /* i <= k? */
- "ble 3b \n\t" /* if so, continue looping */
-
- "4: \n\t" /* end inner loop */
-
- "ldr %[r0], [sp, #0] \n\t" /* r0 = result */
-
- "str %[r3], [%[r0], %[r6]] \n\t" /* result[k] = c0 */
- "mov %[r3], %[r4] \n\t" /* c0 = c1 */
- "mov %[r4], %[r5] \n\t" /* c1 = c2 */
- "movs %[r5], #0 \n\t" /* c2 = 0 */
- "adds %[r6], #4 \n\t" /* k += 4 */
- "cmp %[r6], r8 \n\t" /* k <= (num_words - 1) (times 4) ? */
- "ble 1b \n\t" /* if so, loop back, start with i = 0 */
- "cmp %[r6], r9 \n\t" /* k <= (num_words * 2 - 2) (times 4) ? */
- "ble 2b \n\t" /* if so, loop back, with i = (k + 1) - num_words */
- /* end outer loop */
-
- "str %[r3], [%[r0], %[r6]] \n\t" /* result[num_words * 2 - 1] = c0 */
- "pop {%[r0]} \n\t" /* pop result off the stack */
-
- ".syntax divided \n\t"
- : [r3] "+l" (num_words), [r4] "=&l" (r4),
- [r5] "=&l" (r5), [r6] "=&l" (r6), [r7] "=&l" (r7)
- : [r0] "l" (result), [r1] "l" (left), [r2] "l" (right)
- : "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
-#endif
-}
-#define asm_mult 1
-#endif
-
-#if uECC_SQUARE_FUNC
-#if !asm_square
-uECC_VLI_API void uECC_vli_square(uECC_word_t *result,
- const uECC_word_t *left,
- wordcount_t num_words) {
-#if (uECC_PLATFORM != uECC_arm_thumb)
- uint32_t c0 = 0;
- uint32_t c1 = 0;
- uint32_t c2 = 0;
- uint32_t k = 0;
- uint32_t i, tt;
- uint32_t t0, t1;
-
- __asm__ volatile (
- ".syntax unified \n\t"
-
- "1: \n\t" /* outer loop (k < num_words) */
- "movs %[i], #0 \n\t" /* i = 0 */
- "b 3f \n\t"
-
- "2: \n\t" /* outer loop (k >= num_words) */
- "movs %[i], %[k] \n\t" /* i = k */
- "subs %[i], %[last_word] \n\t" /* i = k - (num_words - 1) (times 4) */
-
- "3: \n\t" /* inner loop */
- "subs %[tt], %[k], %[i] \n\t" /* tt = k-i */
-
- "ldr %[t1], [%[left], %[tt]] \n\t" /* t1 = left[k - i] */
- "ldr %[t0], [%[left], %[i]] \n\t" /* t0 = left[i] */
-
- "umull %[t0], %[t1], %[t0], %[t1] \n\t" /* (t0, t1) = left[i] * right[k - i] */
-
- "cmp %[i], %[tt] \n\t" /* (i < k - i) ? */
- "bge 4f \n\t" /* if i >= k - i, skip */
- "adds %[c0], %[c0], %[t0] \n\t" /* add low word to c0 */
- "adcs %[c1], %[c1], %[t1] \n\t" /* add high word to c1, including carry */
- "adcs %[c2], %[c2], #0 \n\t" /* add carry to c2 */
-
- "4: \n\t"
- "adds %[c0], %[c0], %[t0] \n\t" /* add low word to c0 */
- "adcs %[c1], %[c1], %[t1] \n\t" /* add high word to c1, including carry */
- "adcs %[c2], %[c2], #0 \n\t" /* add carry to c2 */
-
- "adds %[i], #4 \n\t" /* i += 4 */
- "cmp %[i], %[k] \n\t" /* i >= k? */
- "bge 5f \n\t" /* if so, exit the loop */
- "subs %[tt], %[k], %[i] \n\t" /* tt = k - i */
- "cmp %[i], %[tt] \n\t" /* i <= k - i? */
- "ble 3b \n\t" /* if so, continue looping */
-
- "5: \n\t" /* end inner loop */
-
- "str %[c0], [%[result], %[k]] \n\t" /* result[k] = c0 */
- "mov %[c0], %[c1] \n\t" /* c0 = c1 */
- "mov %[c1], %[c2] \n\t" /* c1 = c2 */
- "movs %[c2], #0 \n\t" /* c2 = 0 */
- "adds %[k], #4 \n\t" /* k += 4 */
- "cmp %[k], %[last_word] \n\t" /* k <= (num_words - 1) (times 4) ? */
- "ble 1b \n\t" /* if so, loop back, start with i = 0 */
- "cmp %[k], %[last_word], lsl #1 \n\t" /* k <= (num_words * 2 - 2) (times 4) ? */
- "ble 2b \n\t" /* if so, loop back, start with i = (k + 1) - num_words */
- /* end outer loop */
-
- "str %[c0], [%[result], %[k]] \n\t" /* result[num_words * 2 - 1] = c0 */
- RESUME_SYNTAX
- : [c0] "+r" (c0), [c1] "+r" (c1), [c2] "+r" (c2),
- [k] "+r" (k), [i] "=&r" (i), [tt] "=&r" (tt), [t0] "=&r" (t0), [t1] "=&r" (t1)
- : [result] "r" (result), [left] "r" (left), [last_word] "r" ((num_words - 1) * 4)
- : "cc", "memory"
- );
-
-#else
- uint32_t r3, r4, r5, r6, r7;
-
- __asm__ volatile (
- ".syntax unified \n\t"
- "subs %[r2], #1 \n\t" /* r2 = num_words - 1 */
- "lsls %[r2], #2 \n\t" /* r2 = (num_words - 1) * 4 */
- "mov r8, %[r2] \n\t" /* r8 = (num_words - 1) * 4 */
- "lsls %[r2], #1 \n\t" /* r2 = (num_words - 1) * 8 */
- "mov r9, %[r2] \n\t" /* r9 = (num_words - 1) * 8 */
- "movs %[r2], #0 \n\t" /* c0 = 0 */
- "movs %[r3], #0 \n\t" /* c1 = 0 */
- "movs %[r4], #0 \n\t" /* c2 = 0 */
- "movs %[r5], #0 \n\t" /* k = 0 */
-
- "push {%[r0]} \n\t" /* keep result on the stack */
-
- "1: \n\t" /* outer loop (k < num_words) */
- "movs %[r6], #0 \n\t" /* r6 = i = 0 */
- "b 3f \n\t"
-
- "2: \n\t" /* outer loop (k >= num_words) */
- "movs %[r6], %[r5] \n\t" /* r6 = k */
- "mov %[r0], r8 \n\t" /* r0 = (num_words - 1) * 4 */
- "subs %[r6], %[r0] \n\t" /* r6 = i = k - (num_words - 1) (times 4) */
-
- "3: \n\t" /* inner loop */
- "mov r10, %[r2] \n\t"
- "mov r11, %[r3] \n\t"
- "mov r12, %[r4] \n\t"
- "mov r14, %[r5] \n\t"
- "subs %[r7], %[r5], %[r6] \n\t" /* r7 = k - i */
-
- "ldr %[r3], [%[r1], %[r7]] \n\t" /* r3 = left[k - i] */
- "ldr %[r0], [%[r1], %[r6]] \n\t" /* r0 = left[i] */
-
- "lsrs %[r2], %[r0], #16 \n\t" /* r2 = a1 */
- "uxth %[r0], %[r0] \n\t" /* r0 = a0 */
-
- "lsrs %[r4], %[r3], #16 \n\t" /* r4 = b1 */
- "uxth %[r3], %[r3] \n\t" /* r3 = b0 */
-
- "movs %[r5], %[r2] \n\t" /* r5 = a1 */
- "muls %[r5], %[r4], %[r5] \n\t" /* r5 = a1 * b1 */
- "muls %[r2], %[r3], %[r2] \n\t" /* r2 = b0 * a1 */
- "muls %[r4], %[r0], %[r4] \n\t" /* r4 = a0 * b1 */
- "muls %[r0], %[r3], %[r0] \n\t" /* r0 = a0 * b0 */
-
- /* Add middle terms */
- "lsls %[r3], %[r2], #16 \n\t"
- "lsrs %[r2], %[r2], #16 \n\t"
- "adds %[r0], %[r3] \n\t"
- "adcs %[r5], %[r2] \n\t"
-
- "lsls %[r3], %[r4], #16 \n\t"
- "lsrs %[r4], %[r4], #16 \n\t"
- "adds %[r0], %[r3] \n\t"
- "adcs %[r5], %[r4] \n\t"
-
- /* Add to acc, doubling if necessary */
- "mov %[r2], r10\n\t"
- "mov %[r3], r11\n\t"
- "mov %[r4], r12\n\t"
-
- "cmp %[r6], %[r7] \n\t" /* (i < k - i) ? */
- "bge 4f \n\t" /* if i >= k - i, skip */
- "movs %[r7], #0 \n\t" /* r7 = 0 */
- "adds %[r2], %[r0] \n\t" /* add low word to c0 */
- "adcs %[r3], %[r5] \n\t" /* add high word to c1, including carry */
- "adcs %[r4], %[r7] \n\t" /* add carry to c2 */
- "4: \n\t"
- "movs %[r7], #0 \n\t" /* r7 = 0 */
- "adds %[r2], %[r0] \n\t" /* add low word to c0 */
- "adcs %[r3], %[r5] \n\t" /* add high word to c1, including carry */
- "adcs %[r4], %[r7] \n\t" /* add carry to c2 */
-
- "mov %[r5], r14\n\t" /* r5 = k */
-
- "adds %[r6], #4 \n\t" /* i += 4 */
- "cmp %[r6], %[r5] \n\t" /* i >= k? */
- "bge 5f \n\t" /* if so, exit the loop */
- "subs %[r7], %[r5], %[r6] \n\t" /* r7 = k - i */
- "cmp %[r6], %[r7] \n\t" /* i <= k - i? */
- "ble 3b \n\t" /* if so, continue looping */
-
- "5: \n\t" /* end inner loop */
-
- "ldr %[r0], [sp, #0] \n\t" /* r0 = result */
-
- "str %[r2], [%[r0], %[r5]] \n\t" /* result[k] = c0 */
- "mov %[r2], %[r3] \n\t" /* c0 = c1 */
- "mov %[r3], %[r4] \n\t" /* c1 = c2 */
- "movs %[r4], #0 \n\t" /* c2 = 0 */
- "adds %[r5], #4 \n\t" /* k += 4 */
- "cmp %[r5], r8 \n\t" /* k <= (num_words - 1) (times 4) ? */
- "ble 1b \n\t" /* if so, loop back, start with i = 0 */
- "cmp %[r5], r9 \n\t" /* k <= (num_words * 2 - 2) (times 4) ? */
- "ble 2b \n\t" /* if so, loop back, with i = (k + 1) - num_words */
- /* end outer loop */
-
- "str %[r2], [%[r0], %[r5]] \n\t" /* result[num_words * 2 - 1] = c0 */
- "pop {%[r0]} \n\t" /* pop result off the stack */
-
- ".syntax divided \n\t"
- : [r2] "+l" (num_words), [r3] "=&l" (r3), [r4] "=&l" (r4),
- [r5] "=&l" (r5), [r6] "=&l" (r6), [r7] "=&l" (r7)
- : [r0] "l" (result), [r1] "l" (left)
- : "r8", "r9", "r10", "r11", "r12", "r14", "cc", "memory"
- );
-#endif
-}
-#define asm_square 1
-#endif
-#endif /* uECC_SQUARE_FUNC */
-
-#endif /* _UECC_ASM_ARM_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_arm_mult_square.inc b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_arm_mult_square.inc
deleted file mode 100644
index 8907fc185..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_arm_mult_square.inc
+++ /dev/null
@@ -1,2311 +0,0 @@
-/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_ASM_ARM_MULT_SQUARE_H_
-#define _UECC_ASM_ARM_MULT_SQUARE_H_
-
-#define FAST_MULT_ASM_5 \
- "push {r3} \n\t" \
- "add r0, 12 \n\t" \
- "add r2, 12 \n\t" \
- "ldmia r1!, {r3,r4} \n\t" \
- "ldmia r2!, {r6,r7} \n\t" \
- \
- "umull r11, r12, r3, r6 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r9, r3, r7 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r14, r4, r6 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "umull r12, r14, r4, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adc r10, r10, r14 \n\t" \
- "stmia r0!, {r9, r10} \n\t" \
- \
- "sub r0, 28 \n\t" \
- "sub r2, 20 \n\t" \
- "ldmia r2!, {r6,r7,r8} \n\t" \
- "ldmia r1!, {r5} \n\t" \
- \
- "umull r11, r12, r3, r6 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r9, r3, r7 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r14, r4, r6 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r3, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r5, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "ldmia r1!, {r3} \n\t" \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r4, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r5, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r3, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "ldmia r1!, {r4} \n\t" \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r5, r8 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r3, r7 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r4, r6 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "ldr r9, [r0] \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, #0 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "ldmia r2!, {r6} \n\t" \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r5, r6 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r3, r8 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r4, r7 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "ldr r10, [r0] \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "ldmia r2!, {r7} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r6 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "ldr r11, [r0] \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r14} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r3, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "umull r14, r9, r4, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adc r11, r11, r9 \n\t" \
- "stmia r0!, {r10, r11} \n\t" \
- "pop {r3} \n\t"
-
-#define FAST_MULT_ASM_5_TO_6 \
- "cmp r3, #5 \n\t" \
- "beq 1f \n\t" \
- \
- /* r4 = left high, r5 = right high */ \
- "ldr r4, [r1] \n\t" \
- "ldr r5, [r2] \n\t" \
- \
- "sub r0, #20 \n\t" \
- "sub r1, #20 \n\t" \
- "sub r2, #20 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r4, r8 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r9, r9, r6 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "str r9, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r10, r10, r6 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r9, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "str r10, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r14, r14, r6 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "str r14, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r9, r9, r6 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r14, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "str r9, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r10, r10, r6 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- /* skip past already-loaded (r4, r5) */ \
- "ldr r7, [r1], #8 \n\t" \
- "ldr r8, [r2], #8 \n\t" \
- "mov r9, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "str r10, [r0], #4 \n\t" \
- \
- "umull r11, r12, r4, r5 \n\t" \
- "adds r11, r11, r14 \n\t" \
- "adc r12, r12, r9 \n\t" \
- "stmia r0!, {r11, r12} \n\t"
-
-#define FAST_MULT_ASM_6 \
- "push {r3} \n\t" \
- "add r0, 12 \n\t" \
- "add r2, 12 \n\t" \
- "ldmia r1!, {r3,r4,r5} \n\t" \
- "ldmia r2!, {r6,r7,r8} \n\t" \
- \
- "umull r11, r12, r3, r6 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r9, r3, r7 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r14, r4, r6 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r3, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r5, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r4, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r5, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "umull r9, r10, r5, r8 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adc r12, r12, r10 \n\t" \
- "stmia r0!, {r11, r12} \n\t" \
- \
- "sub r0, 36 \n\t" \
- "sub r2, 24 \n\t" \
- "ldmia r2!, {r6,r7,r8} \n\t" \
- \
- "umull r11, r12, r3, r6 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r9, r3, r7 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r14, r4, r6 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r3, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r5, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "ldmia r1!, {r3} \n\t" \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r4, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r5, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r3, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "ldmia r1!, {r4} \n\t" \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r5, r8 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r3, r7 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r4, r6 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "ldr r9, [r0] \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, #0 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "ldmia r1!, {r5} \n\t" \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r3, r8 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r4, r7 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r5, r6 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "ldr r10, [r0] \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "ldmia r2!, {r6} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r3, r6 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "ldr r11, [r0] \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r14} \n\t" \
- \
- "ldmia r2!, {r7} \n\t" \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r3, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r5, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "ldr r12, [r0] \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "ldmia r2!, {r8} \n\t" \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r3, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r4, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r5, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r4, r8 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r5, r7 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "umull r10, r11, r5, r8 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adc r14, r14, r11 \n\t" \
- "stmia r0!, {r12, r14} \n\t" \
- "pop {r3} \n\t"
-
-#define FAST_MULT_ASM_6_TO_7 \
- "cmp r3, #6 \n\t" \
- "beq 1f \n\t" \
- \
- /* r4 = left high, r5 = right high */ \
- "ldr r4, [r1] \n\t" \
- "ldr r5, [r2] \n\t" \
- \
- "sub r0, #24 \n\t" \
- "sub r1, #24 \n\t" \
- "sub r2, #24 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r4, r8 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r9, r9, r6 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "str r9, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r10, r10, r6 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r9, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "str r10, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r14, r14, r6 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "str r14, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r9, r9, r6 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r14, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "str r9, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r10, r10, r6 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r9, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "str r10, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r14, r14, r6 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- /* skip past already-loaded (r4, r5) */ \
- "ldr r7, [r1], #8 \n\t" \
- "ldr r8, [r2], #8 \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "str r14, [r0], #4 \n\t" \
- \
- "umull r11, r12, r4, r5 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adc r12, r12, r10 \n\t" \
- "stmia r0!, {r11, r12} \n\t"
-
-#define FAST_MULT_ASM_7 \
- "push {r3} \n\t" \
- "add r0, 24 \n\t" \
- "add r2, 24 \n\t" \
- "ldmia r1!, {r3} \n\t" \
- "ldmia r2!, {r6} \n\t" \
- \
- "umull r9, r10, r3, r6 \n\t" \
- "stmia r0!, {r9, r10} \n\t" \
- \
- "sub r0, 20 \n\t" \
- "sub r2, 16 \n\t" \
- "ldmia r2!, {r6, r7, r8} \n\t" \
- "ldmia r1!, {r4, r5} \n\t" \
- \
- "umull r9, r10, r3, r6 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "mov r14, #0 \n\t" \
- "umull r9, r12, r3, r7 \n\t" \
- "adds r10, r10, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r9, r11, r4, r6 \n\t" \
- "adds r10, r10, r9 \n\t" \
- "adcs r12, r12, r11 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r3, r8 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r4, r7 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r5, r6 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "ldmia r1!, {r3} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r6 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "ldr r11, [r0] \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r14} \n\t" \
- \
- "ldmia r2!, {r6} \n\t" \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r4, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r5, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r3, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "ldr r12, [r0] \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r5, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r3, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "umull r9, r10, r3, r6 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adc r12, r12, r10 \n\t" \
- "stmia r0!, {r11, r12} \n\t" \
- \
- "sub r0, 44 \n\t" \
- "sub r1, 16 \n\t" \
- "sub r2, 28 \n\t" \
- "ldmia r1!, {r3,r4,r5} \n\t" \
- "ldmia r2!, {r6,r7,r8} \n\t" \
- \
- "umull r9, r10, r3, r6 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "mov r14, #0 \n\t" \
- "umull r9, r12, r3, r7 \n\t" \
- "adds r10, r10, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r9, r11, r4, r6 \n\t" \
- "adds r10, r10, r9 \n\t" \
- "adcs r12, r12, r11 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r3, r8 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r4, r7 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r5, r6 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "ldmia r1!, {r3} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r6 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "ldr r11, [r0] \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r14} \n\t" \
- \
- "ldmia r1!, {r4} \n\t" \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r5, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r3, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "ldr r12, [r0] \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "ldmia r1!, {r5} \n\t" \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r3, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r4, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r5, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "ldmia r1!, {r3} \n\t" \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r4, r8 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r5, r7 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r3, r6 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "ldr r9, [r0] \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, #0 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "ldmia r2!, {r6} \n\t" \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r4, r6 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r5, r8 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r3, r7 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "ldr r10, [r0] \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "ldmia r2!, {r7} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r4, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r6 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "ldr r11, [r0] \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r14} \n\t" \
- \
- "ldmia r2!, {r8} \n\t" \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r4, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r5, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r3, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "ldr r12, [r0] \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "ldmia r2!, {r6} \n\t" \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r4, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r5, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r3, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r5, r6 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r3, r8 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "umull r10, r11, r3, r6 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adc r14, r14, r11 \n\t" \
- "stmia r0!, {r12, r14} \n\t" \
- "pop {r3} \n\t"
-
-#define FAST_MULT_ASM_7_TO_8 \
- "cmp r3, #7 \n\t" \
- "beq 1f \n\t" \
- \
- /* r4 = left high, r5 = right high */ \
- "ldr r4, [r1] \n\t" \
- "ldr r5, [r2] \n\t" \
- \
- "sub r0, #28 \n\t" \
- "sub r1, #28 \n\t" \
- "sub r2, #28 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r4, r8 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r9, r9, r6 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "str r9, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r10, r10, r6 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r9, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "str r10, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r14, r14, r6 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "str r14, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r9, r9, r6 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r14, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "str r9, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r10, r10, r6 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r9, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r10, r10, r11 \n\t" \
- "adcs r14, r14, r12 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "str r10, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r14, r14, r6 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "ldr r7, [r1], #4 \n\t" \
- "ldr r8, [r2], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "str r14, [r0], #4 \n\t" \
- \
- "ldr r6, [r0] \n\t" \
- "adds r9, r9, r6 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- /* skip past already-loaded (r4, r5) */ \
- "ldr r7, [r1], #8 \n\t" \
- "ldr r8, [r2], #8 \n\t" \
- "mov r14, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r9, r9, r11 \n\t" \
- "adcs r10, r10, r12 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "str r9, [r0], #4 \n\t" \
- \
- "umull r11, r12, r4, r5 \n\t" \
- "adds r11, r11, r10 \n\t" \
- "adc r12, r12, r14 \n\t" \
- "stmia r0!, {r11, r12} \n\t"
-
-#define FAST_MULT_ASM_8 \
- "push {r3} \n\t" \
- "add r0, 24 \n\t" \
- "add r2, 24 \n\t" \
- "ldmia r1!, {r3,r4} \n\t" \
- "ldmia r2!, {r6,r7} \n\t" \
- \
- "umull r11, r12, r3, r6 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r9, r3, r7 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r14, r4, r6 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "umull r12, r14, r4, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adc r10, r10, r14 \n\t" \
- "stmia r0!, {r9, r10} \n\t" \
- \
- "sub r0, 28 \n\t" \
- "sub r2, 20 \n\t" \
- "ldmia r2!, {r6,r7,r8} \n\t" \
- "ldmia r1!, {r5} \n\t" \
- \
- "umull r11, r12, r3, r6 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r9, r3, r7 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r14, r4, r6 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r3, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r5, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "ldmia r1!, {r3} \n\t" \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r4, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r5, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r3, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "ldmia r1!, {r4} \n\t" \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r5, r8 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r3, r7 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r4, r6 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "ldr r9, [r0] \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, #0 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "ldmia r2!, {r6} \n\t" \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r5, r6 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r3, r8 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r4, r7 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "ldr r10, [r0] \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "ldmia r2!, {r7} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r6 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "ldr r11, [r0] \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r14} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r3, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "umull r14, r9, r4, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adc r11, r11, r9 \n\t" \
- "stmia r0!, {r10, r11} \n\t" \
- \
- "sub r0, 52 \n\t" \
- "sub r1, 20 \n\t" \
- "sub r2, 32 \n\t" \
- "ldmia r1!, {r3,r4,r5} \n\t" \
- "ldmia r2!, {r6,r7,r8} \n\t" \
- \
- "umull r11, r12, r3, r6 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r9, r3, r7 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r11, r14, r4, r6 \n\t" \
- "adds r12, r12, r11 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r3, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r5, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "ldmia r1!, {r3} \n\t" \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r4, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r5, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r3, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "ldmia r1!, {r4} \n\t" \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r5, r8 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r3, r7 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r4, r6 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "ldr r9, [r0] \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, #0 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "ldmia r1!, {r5} \n\t" \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r3, r8 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r4, r7 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r5, r6 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "ldr r10, [r0] \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "ldmia r1!, {r3} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r4, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r5, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r6 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "ldr r11, [r0] \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r14} \n\t" \
- \
- "ldmia r1!, {r4} \n\t" \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r5, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r3, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "ldr r12, [r0] \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "ldmia r2!, {r6} \n\t" \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r5, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r3, r8 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r4, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "ldmia r2!, {r7} \n\t" \
- "mov r14, #0 \n\t" \
- "umull r9, r10, r5, r7 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r3, r6 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "umull r9, r10, r4, r8 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "ldr r9, [r0] \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adcs r12, r12, #0 \n\t" \
- "adc r14, r14, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "ldmia r2!, {r8} \n\t" \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r5, r8 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r3, r7 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "umull r10, r11, r4, r6 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "ldr r10, [r0] \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r14, r14, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "ldmia r2!, {r6} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r5, r6 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r8 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r4, r7 \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "ldr r11, [r0] \n\t" \
- "adds r14, r14, r11 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r14} \n\t" \
- \
- "ldmia r2!, {r7} \n\t" \
- "mov r11, #0 \n\t" \
- "umull r12, r14, r5, r7 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r3, r6 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "umull r12, r14, r4, r8 \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, r14 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "ldr r12, [r0] \n\t" \
- "adds r9, r9, r12 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r9} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r14, r9, r3, r7 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r14, r9, r4, r6 \n\t" \
- "adds r10, r10, r14 \n\t" \
- "adcs r11, r11, r9 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r10} \n\t" \
- \
- "umull r9, r10, r4, r7 \n\t" \
- "adds r11, r11, r9 \n\t" \
- "adc r12, r12, r10 \n\t" \
- "stmia r0!, {r11, r12} \n\t" \
- "pop {r3} \n\t"
-
-#define FAST_SQUARE_ASM_5 \
- "push {r2} \n\t" \
- "ldmia r1!, {r2,r3,r4,r5,r6} \n\t" \
- "push {r1} \n\t" \
- \
- "umull r11, r12, r2, r2 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r2, r3 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r8, r11, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r8, r8, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r2, r4 \n\t" \
- "adds r11, r11, r11 \n\t" \
- "adcs r12, r12, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r3 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r2, r5 \n\t" \
- "umull r1, r14, r3, r4 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r14 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r2, r6 \n\t" \
- "umull r1, r14, r3, r5 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "umull r1, r14, r4, r4 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r3, r6 \n\t" \
- "umull r1, r14, r4, r5 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r14 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r8, #0 \n\t" \
- "umull r1, r10, r4, r6 \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "adds r11, r11, r1 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "umull r1, r10, r5, r5 \n\t" \
- "adds r11, r11, r1 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r1, r10, r5, r6 \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "adds r12, r12, r1 \n\t" \
- "adcs r8, r8, r10 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "umull r1, r10, r6, r6 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "stmia r0!, {r8, r11} \n\t" \
- "pop {r1, r2} \n\t"
-
-#define FAST_SQUARE_ASM_5_TO_6 \
- "cmp r2, #5 \n\t" \
- "beq 1f \n\t" \
- \
- "sub r0, #20 \n\t" \
- "sub r1, #20 \n\t" \
- \
- /* Do off-center multiplication */ \
- "ldmia r1!, {r6,r7,r8,r9,r10,r11} \n\t" \
- "umull r3, r4, r6, r11 \n\t" \
- "umull r6, r5, r7, r11 \n\t" \
- "adds r4, r4, r6 \n\t" \
- "umull r7, r6, r8, r11 \n\t" \
- "adcs r5, r5, r7 \n\t" \
- "umull r8, r7, r9, r11 \n\t" \
- "adcs r6, r6, r8 \n\t" \
- "umull r9, r8, r10, r11 \n\t" \
- "adcs r7, r7, r9 \n\t" \
- "adcs r8, r8, #0 \n\t" \
- \
- /* Multiply by 2 */ \
- "mov r9, #0 \n\t" \
- "adds r3, r3, r3 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- "adcs r7, r7, r7 \n\t" \
- "adcs r8, r8, r8 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- \
- /* Add into previous */ \
- "ldr r14, [r0], #4 \n\t" \
- "adds r3, r3, r14 \n\t" \
- "ldr r14, [r0], #4 \n\t" \
- "adcs r4, r4, r14 \n\t" \
- "ldr r14, [r0], #4 \n\t" \
- "adcs r5, r5, r14 \n\t" \
- "ldr r14, [r0], #4 \n\t" \
- "adcs r6, r6, r14 \n\t" \
- "ldr r14, [r0], #4 \n\t" \
- "adcs r7, r7, r14 \n\t" \
- "adcs r8, r8, #0 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "sub r0, #20 \n\t" \
- \
- /* Perform center multiplication */ \
- "umlal r8, r9, r11, r11 \n\t" \
- "stmia r0!, {r3,r4,r5,r6,r7,r8,r9} \n\t"
-
-#define FAST_SQUARE_ASM_6 \
- "push {r2} \n\t" \
- "ldmia r1!, {r2,r3,r4,r5,r6,r7} \n\t" \
- "push {r1} \n\t" \
- \
- "umull r11, r12, r2, r2 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r2, r3 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r8, r11, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r8, r8, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r2, r4 \n\t" \
- "adds r11, r11, r11 \n\t" \
- "adcs r12, r12, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r3 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r2, r5 \n\t" \
- "umull r1, r14, r3, r4 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r14 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r2, r6 \n\t" \
- "umull r1, r14, r3, r5 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "umull r1, r14, r4, r4 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r2, r7 \n\t" \
- "umull r1, r14, r3, r6 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r14 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "umull r1, r14, r4, r5 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r14 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r3, r7 \n\t" \
- "umull r1, r14, r4, r6 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "umull r1, r14, r5, r5 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r9, r9, r14 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r4, r7 \n\t" \
- "umull r1, r14, r5, r6 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r14 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r8, #0 \n\t" \
- "umull r1, r10, r5, r7 \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "adds r11, r11, r1 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "umull r1, r10, r6, r6 \n\t" \
- "adds r11, r11, r1 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r1, r10, r6, r7 \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "adds r12, r12, r1 \n\t" \
- "adcs r8, r8, r10 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "umull r1, r10, r7, r7 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "stmia r0!, {r8, r11} \n\t" \
- "pop {r1, r2} \n\t"
-
-#define FAST_SQUARE_ASM_6_TO_7 \
- "cmp r2, #6 \n\t" \
- "beq 1f \n\t" \
- \
- "sub r0, #24 \n\t" \
- "sub r1, #24 \n\t" \
- \
- /* Do off-center multiplication */ \
- "ldmia r1!, {r6,r7,r8,r9,r10,r11,r12} \n\t" \
- "umull r3, r4, r6, r12 \n\t" \
- "umull r6, r5, r7, r12 \n\t" \
- "adds r4, r4, r6 \n\t" \
- "umull r7, r6, r8, r12 \n\t" \
- "adcs r5, r5, r7 \n\t" \
- "umull r8, r7, r9, r12 \n\t" \
- "adcs r6, r6, r8 \n\t" \
- "umull r9, r8, r10, r12 \n\t" \
- "adcs r7, r7, r9 \n\t" \
- "umull r10, r9, r11, r12 \n\t" \
- "adcs r8, r8, r10 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- \
- /* Multiply by 2 */ \
- "mov r10, #0 \n\t" \
- "adds r3, r3, r3 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- "adcs r7, r7, r7 \n\t" \
- "adcs r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- \
- /* Add into previous */ \
- "ldr r14, [r0], #4 \n\t" \
- "adds r3, r3, r14 \n\t" \
- "ldr r14, [r0], #4 \n\t" \
- "adcs r4, r4, r14 \n\t" \
- "ldr r14, [r0], #4 \n\t" \
- "adcs r5, r5, r14 \n\t" \
- "ldr r14, [r0], #4 \n\t" \
- "adcs r6, r6, r14 \n\t" \
- "ldr r14, [r0], #4 \n\t" \
- "adcs r7, r7, r14 \n\t" \
- "ldr r14, [r0], #4 \n\t" \
- "adcs r8, r8, r14 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "sub r0, #24 \n\t" \
- \
- /* Perform center multiplication */ \
- "umlal r9, r10, r12, r12 \n\t" \
- "stmia r0!, {r3,r4,r5,r6,r7,r8,r9,r10} \n\t"
-
-#define FAST_SQUARE_ASM_7 \
- "push {r2} \n\t" \
- "ldmia r1!, {r2, r3, r4, r5, r6, r7, r8} \n\t" \
- "push {r1} \n\t" \
- "sub r1, 4 \n\t" \
- \
- "add r0, 24 \n\t" \
- "umull r9, r10, r2, r8 \n\t" \
- "stmia r0!, {r9, r10} \n\t" \
- "sub r0, 32 \n\t" \
- \
- "umull r11, r12, r2, r2 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r2, r3 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r8, r11, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r8, r8, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r2, r4 \n\t" \
- "adds r11, r11, r11 \n\t" \
- "adcs r12, r12, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r3 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r2, r5 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r3, r4 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r2, r6 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r3, r5 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r4, r4 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r2, r7 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r3, r6 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r4, r5 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "ldmia r1!, {r2} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r3, r7 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r4, r6 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r8, r8, r14 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r5, r5 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r3, r2 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r4, r7 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r5, r6 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r8, r8, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r4, r2 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r5, r7 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r6, r6 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r5, r2 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r6, r7 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r8, #0 \n\t" \
- "umull r1, r10, r6, r2 \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "adds r11, r11, r1 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "umull r1, r10, r7, r7 \n\t" \
- "adds r11, r11, r1 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r1, r10, r7, r2 \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "adds r12, r12, r1 \n\t" \
- "adcs r8, r8, r10 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "umull r1, r10, r2, r2 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "stmia r0!, {r8, r11} \n\t" \
- "pop {r1, r2} \n\t"
-
-#define FAST_SQUARE_ASM_7_TO_8 \
- "cmp r2, #7 \n\t" \
- "beq 1f \n\t" \
- \
- "sub r0, #28 \n\t" \
- "sub r1, #28 \n\t" \
- \
- /* Do off-center multiplication */ \
- "ldmia r1!, {r6,r7,r8,r9,r10,r11,r12,r14} \n\t" \
- "umull r3, r4, r6, r14 \n\t" \
- "umull r6, r5, r7, r14 \n\t" \
- "adds r4, r4, r6 \n\t" \
- "umull r7, r6, r8, r14 \n\t" \
- "adcs r5, r5, r7 \n\t" \
- "umull r8, r7, r9, r14 \n\t" \
- "adcs r6, r6, r8 \n\t" \
- "umull r9, r8, r10, r14 \n\t" \
- "adcs r7, r7, r9 \n\t" \
- "umull r10, r9, r11, r14 \n\t" \
- "adcs r8, r8, r10 \n\t" \
- "umull r11, r10, r12, r14 \n\t" \
- "adcs r9, r9, r11 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- \
- /* Multiply by 2 */ \
- "mov r11, #0 \n\t" \
- "adds r3, r3, r3 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- "adcs r7, r7, r7 \n\t" \
- "adcs r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- \
- /* Add into previous */ \
- "ldr r12, [r0], #4 \n\t" \
- "adds r3, r3, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r4, r4, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r5, r5, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r6, r6, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r7, r7, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r8, r8, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "sub r0, #28 \n\t" \
- \
- /* Perform center multiplication */ \
- "umlal r10, r11, r14, r14 \n\t" \
- "stmia r0!, {r3,r4,r5,r6,r7,r8,r9,r10,r11} \n\t"
-
-#define FAST_SQUARE_ASM_8 \
- "push {r2} \n\t" \
- "ldmia r1!, {r2,r3,r4,r5,r6,r7,r8,r9} \n\t" \
- "push {r1} \n\t" \
- "sub r1, 8 \n\t" \
- \
- "add r0, 24 \n\t" \
- "umull r10, r11, r2, r8 \n\t" \
- "umull r12, r14, r2, r9 \n\t" \
- "umull r8, r9, r3, r9 \n\t" \
- "adds r11, r11, r12 \n\t" \
- "adcs r12, r14, r8 \n\t" \
- "adcs r14, r9, #0 \n\t" \
- "stmia r0!, {r10, r11, r12, r14} \n\t" \
- "sub r0, 40 \n\t" \
- \
- "umull r11, r12, r2, r2 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r9, #0 \n\t" \
- "umull r10, r11, r2, r3 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r8, r11, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "adds r12, r12, r10 \n\t" \
- "adcs r8, r8, r11 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r11, r12, r2, r4 \n\t" \
- "adds r11, r11, r11 \n\t" \
- "adcs r12, r12, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "umull r11, r12, r3, r3 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r2, r5 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r3, r4 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r2, r6 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r3, r5 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r4, r4 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r2, r7 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r3, r6 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r4, r5 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "ldmia r1!, {r2} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r3, r7 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r4, r6 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r8, r8, r14 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r5, r5 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r3, r2 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r4, r7 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r5, r6 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r8, r8, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "ldmia r1!, {r3} \n\t" \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r4, r2 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r5, r7 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r8, r8, r14 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r6, r6 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r4, r3 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r5, r2 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r6, r7 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "ldr r14, [r0] \n\t" \
- "adds r8, r8, r14 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umull r8, r9, r5, r3 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r6, r2 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adc r10, r10, r10 \n\t" \
- "mov r14, r9 \n\t" \
- "umlal r8, r9, r7, r7 \n\t" \
- "cmp r14, r9 \n\t" \
- "it hi \n\t" \
- "adchi r10, r10, #0 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umull r8, r11, r6, r3 \n\t" \
- "mov r14, r11 \n\t" \
- "umlal r8, r11, r7, r2 \n\t" \
- "cmp r14, r11 \n\t" \
- "it hi \n\t" \
- "adchi r12, r12, #0 \n\t" \
- "adds r8, r8, r8 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adc r12, r12, r12 \n\t" \
- "adds r8, r8, r9 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "adc r12, r12, #0 \n\t" \
- "stmia r0!, {r8} \n\t" \
- \
- "mov r8, #0 \n\t" \
- "umull r1, r10, r7, r3 \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "adds r11, r11, r1 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "umull r1, r10, r2, r2 \n\t" \
- "adds r11, r11, r1 \n\t" \
- "adcs r12, r12, r10 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "stmia r0!, {r11} \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umull r1, r10, r2, r3 \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "adds r12, r12, r1 \n\t" \
- "adcs r8, r8, r10 \n\t" \
- "adc r11, r11, #0 \n\t" \
- "stmia r0!, {r12} \n\t" \
- \
- "umull r1, r10, r3, r3 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "adcs r11, r11, r10 \n\t" \
- "stmia r0!, {r8, r11} \n\t" \
- "pop {r1, r2} \n\t"
-
-#endif /* _UECC_ASM_ARM_MULT_SQUARE_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_arm_mult_square_umaal.inc b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_arm_mult_square_umaal.inc
deleted file mode 100644
index c554d20e3..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_arm_mult_square_umaal.inc
+++ /dev/null
@@ -1,1202 +0,0 @@
-/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_ASM_ARM_MULT_SQUARE_H_
-#define _UECC_ASM_ARM_MULT_SQUARE_H_
-
-#define FAST_MULT_ASM_5 \
- "push {r3} \n\t" \
- "ldmia r2!, {r3, r4, r5, r6, r7} \n\t" \
- "push {r2} \n\t" \
- \
- "ldr r2, [r1], #4 \n\t" \
- "umull r8, r9, r3, r2 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umaal r9, r10, r4, r2 \n\t" \
- "mov r11, #0 \n\t" \
- "umaal r10, r11, r5, r2 \n\t" \
- "mov r12, #0 \n\t" \
- "umaal r11, r12, r6, r2 \n\t" \
- "mov r14, #0 \n\t" \
- "umaal r12, r14, r7, r2 \n\t" \
- \
- "ldr r2, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r3, r2 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r4, r2 \n\t" \
- "umaal r10, r11, r5, r2 \n\t" \
- "umaal r11, r12, r6, r2 \n\t" \
- "umaal r12, r14, r7, r2 \n\t" \
- \
- "ldr r2, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r3, r2 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r4, r2 \n\t" \
- "umaal r10, r11, r5, r2 \n\t" \
- "umaal r11, r12, r6, r2 \n\t" \
- "umaal r12, r14, r7, r2 \n\t" \
- \
- "ldr r2, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r3, r2 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r4, r2 \n\t" \
- "umaal r10, r11, r5, r2 \n\t" \
- "umaal r11, r12, r6, r2 \n\t" \
- "umaal r12, r14, r7, r2 \n\t" \
- \
- "ldr r2, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r3, r2 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r4, r2 \n\t" \
- "umaal r10, r11, r5, r2 \n\t" \
- "umaal r11, r12, r6, r2 \n\t" \
- "umaal r12, r14, r7, r2 \n\t" \
- \
- "str r9, [r0], #4 \n\t" \
- "str r10, [r0], #4 \n\t" \
- "str r11, [r0], #4 \n\t" \
- "str r12, [r0], #4 \n\t" \
- "str r14, [r0], #4 \n\t" \
- \
- "pop {r2, r3} \n\t"
-
-#define FAST_MULT_ASM_5_TO_6 \
- "cmp r3, #5 \n\t" \
- "beq 1f \n\t" \
- \
- /* r4 = left high */ \
- "ldr r4, [r1] \n\t" \
- \
- "sub r0, #20 \n\t" \
- "sub r1, #20 \n\t" \
- "sub r2, #20 \n\t" \
- \
- /* Do right side */ \
- "ldr r14, [r2], #4 \n\t" \
- "mov r5, #0 \n\t" \
- "ldr r6, [r0], #4 \n\t" \
- "umaal r5, r6, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r7, [r0], #4 \n\t" \
- "umaal r6, r7, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r8, [r0], #4 \n\t" \
- "umaal r7, r8, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r9, [r0], #4 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r10, [r0], #4 \n\t" \
- "umaal r9, r10, r4, r14 \n\t" \
- "sub r0, #20 \n\t" \
- \
- /* r4 = right high */ \
- "ldr r4, [r2], #4 \n\t" \
- \
- /* Do left side */ \
- "ldr r14, [r1], #4 \n\t" \
- "mov r12, #0 \n\t" \
- "umaal r12, r5, r4, r14 \n\t" \
- "str r12, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r5, r6, r4, r14 \n\t" \
- "str r5, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r6, r7, r4, r14 \n\t" \
- "str r6, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r7, r8, r4, r14 \n\t" \
- "str r7, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r9, r10, r4, r14 \n\t" \
- "stmia r0!, {r9, r10} \n\t"
-
-#define FAST_MULT_ASM_6 \
- "ldmia r2!, {r4, r5, r6} \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "umull r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "mov r11, #0 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "str r9, [r0], #4 \n\t" \
- "str r10, [r0], #4 \n\t" \
- "str r11, [r0], #4 \n\t" \
- \
- "sub r0, #24 \n\t" \
- "sub r1, #24 \n\t" \
- "ldmia r2!, {r4, r5, r6} \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "mov r9, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "mov r11, #0 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "str r9, [r0], #4 \n\t" \
- "str r10, [r0], #4 \n\t" \
- "str r11, [r0], #4 \n\t"
-
-#define FAST_MULT_ASM_6_TO_7 \
- "cmp r3, #6 \n\t" \
- "beq 1f \n\t" \
- \
- /* r4 = left high */ \
- "ldr r4, [r1] \n\t" \
- \
- "sub r0, #24 \n\t" \
- "sub r1, #24 \n\t" \
- "sub r2, #24 \n\t" \
- \
- /* Do right side */ \
- "ldr r14, [r2], #4 \n\t" \
- "mov r5, #0 \n\t" \
- "ldr r6, [r0], #4 \n\t" \
- "umaal r5, r6, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r7, [r0], #4 \n\t" \
- "umaal r6, r7, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r8, [r0], #4 \n\t" \
- "umaal r7, r8, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r9, [r0], #4 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r10, [r0], #4 \n\t" \
- "umaal r9, r10, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r11, [r0], #4 \n\t" \
- "umaal r10, r11, r4, r14 \n\t" \
- "sub r0, #24 \n\t" \
- \
- /* r4 = right high */ \
- "ldr r4, [r2], #4 \n\t" \
- \
- /* Do left side */ \
- "ldr r14, [r1], #4 \n\t" \
- "mov r12, #0 \n\t" \
- "umaal r12, r5, r4, r14 \n\t" \
- "str r12, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r5, r6, r4, r14 \n\t" \
- "str r5, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r6, r7, r4, r14 \n\t" \
- "str r6, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r7, r8, r4, r14 \n\t" \
- "str r7, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r9, r10, r4, r14 \n\t" \
- "str r9, [r0], #4 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r10, r11, r4, r14 \n\t" \
- "stmia r0!, {r10, r11} \n\t"
-
-#define FAST_MULT_ASM_7 \
- "ldmia r2!, {r4, r5, r6, r7} \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "umull r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "mov r11, #0 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "mov r12, #0 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "str r9, [r0], #4 \n\t" \
- "str r10, [r0], #4 \n\t" \
- "str r11, [r0], #4 \n\t" \
- "str r12, [r0], #4 \n\t" \
- \
- "sub r0, #28 \n\t" \
- "sub r1, #28 \n\t" \
- "ldmia r2!, {r4, r5, r6} \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "mov r9, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "mov r11, #0 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- \
- "str r9, [r0], #4 \n\t" \
- "str r10, [r0], #4 \n\t" \
- "str r11, [r0], #4 \n\t"
-
-#define FAST_MULT_ASM_7_TO_8 \
- "cmp r3, #7 \n\t" \
- "beq 1f \n\t" \
- "push {r3} \n\t" \
- \
- /* r4 = left high */ \
- "ldr r4, [r1] \n\t" \
- \
- "sub r0, #28 \n\t" \
- "sub r1, #28 \n\t" \
- "sub r2, #28 \n\t" \
- \
- /* Do right side */ \
- "ldr r14, [r2], #4 \n\t" \
- "mov r5, #0 \n\t" \
- "ldr r6, [r0], #4 \n\t" \
- "umaal r5, r6, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r7, [r0], #4 \n\t" \
- "umaal r6, r7, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r8, [r0], #4 \n\t" \
- "umaal r7, r8, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r9, [r0], #4 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r10, [r0], #4 \n\t" \
- "umaal r9, r10, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r11, [r0], #4 \n\t" \
- "umaal r10, r11, r4, r14 \n\t" \
- "ldr r14, [r2], #4 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "umaal r11, r12, r4, r14 \n\t" \
- "sub r0, #28 \n\t" \
- \
- /* r4 = right high */ \
- "ldr r4, [r2], #4 \n\t" \
- \
- /* Do left side */ \
- "ldr r14, [r1], #4 \n\t" \
- "mov r3, #0 \n\t" \
- "umaal r3, r5, r4, r14 \n\t" \
- "str r3, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r5, r6, r4, r14 \n\t" \
- "str r5, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r6, r7, r4, r14 \n\t" \
- "str r6, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r7, r8, r4, r14 \n\t" \
- "str r7, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r9, r10, r4, r14 \n\t" \
- "str r9, [r0], #4 \n\t" \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r10, r11, r4, r14 \n\t" \
- "str r10, [r0], #4 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "umaal r11, r12, r4, r14 \n\t" \
- "stmia r0!, {r11, r12} \n\t" \
- "pop {r3} \n\t"
-
-#define FAST_MULT_ASM_8 \
- "ldmia r2!, {r4, r5, r6, r7} \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "umull r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "mov r11, #0 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "mov r12, #0 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "str r9, [r0], #4 \n\t" \
- "str r10, [r0], #4 \n\t" \
- "str r11, [r0], #4 \n\t" \
- "str r12, [r0], #4 \n\t" \
- \
- "sub r0, #32 \n\t" \
- "sub r1, #32 \n\t" \
- "ldmia r2!, {r4, r5, r6, r7} \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "mov r9, #0 \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "mov r10, #0 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "mov r11, #0 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "mov r12, #0 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "ldr r14, [r1], #4 \n\t" \
- "ldr r8, [r0] \n\t" \
- "umaal r8, r9, r4, r14 \n\t" \
- "str r8, [r0], #4 \n\t" \
- "umaal r9, r10, r5, r14 \n\t" \
- "umaal r10, r11, r6, r14 \n\t" \
- "umaal r11, r12, r7, r14 \n\t" \
- \
- "str r9, [r0], #4 \n\t" \
- "str r10, [r0], #4 \n\t" \
- "str r11, [r0], #4 \n\t" \
- "str r12, [r0], #4 \n\t"
-
-#define FAST_SQUARE_ASM_5 \
- "ldmia r1!, {r9,r10,r11,r12,r14} \n\t" \
- "push {r1, r2} \n\t" \
- \
- "umull r1, r2, r10, r9 \n\t" \
- "mov r3, #0 \n\t" \
- "umaal r2, r3, r11, r9 \n\t" \
- "mov r4, #0 \n\t" \
- "umaal r3, r4, r12, r9 \n\t" \
- "mov r5, #0 \n\t" \
- "umaal r4, r5, r14, r9 \n\t" \
- \
- "mov r6, #0 \n\t" \
- "umaal r6, r3, r11, r10 \n\t" \
- "umaal r3, r4, r12, r10 \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r2, r2, r2 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- "adcs r3, r3, r3 \n\t" \
- \
- "umull r7, r8, r9, r9 \n\t" \
- /* Store carry in r9 */ \
- "mov r9, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- "adds r8, r8, r1 \n\t" \
- "stmia r0!, {r7,r8} \n\t" \
- \
- "umull r7, r8, r10, r10 \n\t" \
- "adcs r7, r7, r2 \n\t" \
- "adcs r8, r8, r6 \n\t" \
- "stmia r0!, {r7,r8} \n\t" \
- \
- "umaal r4, r5, r14, r10 \n\t" \
- /* Store carry in r10 */ \
- "mov r10, #0 \n\t" \
- "adc r10, r10, #0 \n\t" \
- \
- "mov r1, #0 \n\t" \
- "umaal r1, r4, r12, r11 \n\t" \
- "umaal r4, r5, r14, r11 \n\t" \
- \
- "mov r2, #0 \n\t" \
- "umaal r2, r5, r14, r12 \n\t" \
- /* Load carry from r9 */ \
- "lsrs r9, #1 \n\t" \
- "adcs r1, r1, r1 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r2, r2, r2 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- /* r9 is 0 now */ \
- "adc r9, r9, #0 \n\t" \
- \
- /* Use carry from r10 */ \
- "umaal r3, r10, r11, r11 \n\t" \
- "adds r10, r10, r1 \n\t" \
- "stmia r0!, {r3,r10} \n\t" \
- \
- "umull r6, r10, r12, r12 \n\t" \
- "adcs r6, r6, r4 \n\t" \
- "adcs r10, r10, r2 \n\t" \
- "stmia r0!, {r6,r10} \n\t" \
- \
- "umull r6, r10, r14, r14 \n\t" \
- "adcs r6, r6, r5 \n\t" \
- "adcs r10, r10, r9 \n\t" \
- "stmia r0!, {r6,r10} \n\t" \
- "pop {r1, r2} \n\t"
-
-#define FAST_SQUARE_ASM_5_TO_6 \
- "cmp r2, #5 \n\t" \
- "beq 1f \n\t" \
- \
- "sub r0, #20 \n\t" \
- "sub r1, #20 \n\t" \
- \
- /* Do off-center multiplication */ \
- "ldmia r1!, {r5,r6,r7,r8,r9,r14} \n\t" \
- "umull r3, r4, r5, r14 \n\t" \
- "mov r5, #0 \n\t" \
- "umaal r4, r5, r6, r14 \n\t" \
- "mov r6, #0 \n\t" \
- "umaal r5, r6, r7, r14 \n\t" \
- "mov r7, #0 \n\t" \
- "umaal r6, r7, r8, r14 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r7, r8, r9, r14 \n\t" \
- \
- /* Multiply by 2 */ \
- "mov r9, #0 \n\t" \
- "adds r3, r3, r3 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- "adcs r7, r7, r7 \n\t" \
- "adcs r8, r8, r8 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- \
- /* Add into previous */ \
- "ldr r12, [r0], #4 \n\t" \
- "adds r3, r3, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r4, r4, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r5, r5, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r6, r6, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r7, r7, r12 \n\t" \
- "adcs r8, r8, #0 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "sub r0, #20 \n\t" \
- \
- /* Perform center multiplication */ \
- "umlal r8, r9, r14, r14 \n\t" \
- "stmia r0!, {r3,r4,r5,r6,r7,r8,r9} \n\t"
-
-#define FAST_SQUARE_ASM_6 \
- "ldmia r1!, {r8,r9,r10,r11,r12,r14} \n\t" \
- "push {r1, r2} \n\t" \
- \
- "umull r1, r2, r9, r8 \n\t" \
- "mov r3, #0 \n\t" \
- "umaal r2, r3, r10, r8 \n\t" \
- "mov r4, #0 \n\t" \
- "umaal r3, r4, r11, r8 \n\t" \
- "mov r5, #0 \n\t" \
- "umaal r4, r5, r12, r8 \n\t" \
- "mov r6, #0 \n\t" \
- "umaal r5, r6, r14, r8 \n\t" \
- \
- "mov r7, #0 \n\t" \
- "umaal r7, r3, r10, r9 \n\t" \
- "umaal r3, r4, r11, r9 \n\t" \
- "umaal r4, r5, r12, r9 \n\t" \
- "push {r4, r5} \n\t" \
- "adds r1, r1, r1 \n\t" \
- "adcs r2, r2, r2 \n\t" \
- "adcs r7, r7, r7 \n\t" \
- "adcs r3, r3, r3 \n\t" \
- \
- "umull r4, r5, r8, r8 \n\t" \
- /* Store carry in r8 */ \
- "mov r8, #0 \n\t" \
- "adc r8, r8, #0 \n\t" \
- "adds r5, r5, r1 \n\t" \
- "stmia r0!, {r4,r5} \n\t" \
- \
- "umull r4, r5, r9, r9 \n\t" \
- "adcs r4, r4, r2 \n\t" \
- "adcs r5, r5, r7 \n\t" \
- "stmia r0!, {r4,r5} \n\t" \
- \
- "pop {r4, r5} \n\t" \
- "umaal r5, r6, r14, r9 \n\t" \
- /* Store carry in r9 */ \
- "mov r9, #0 \n\t" \
- "adc r9, r9, #0 \n\t" \
- \
- "mov r1, #0 \n\t" \
- "umaal r1, r4, r11, r10 \n\t" \
- "umaal r4, r5, r12, r10 \n\t" \
- "umaal r5, r6, r14, r10 \n\t" \
- \
- "mov r2, #0 \n\t" \
- "umaal r2, r5, r12, r11 \n\t" \
- "umaal r5, r6, r14, r11 \n\t" \
- \
- "mov r7, #0 \n\t" \
- "umaal r7, r6, r14, r12 \n\t" \
- \
- /* Load carry from r8 */ \
- "lsrs r8, #1 \n\t" \
- "adcs r1, r1, r1 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r2, r2, r2 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- "adcs r7, r7, r7 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- "adc r8, r8, #0 \n\t" \
- \
- /* Use carry from r9 */ \
- "umaal r3, r9, r10, r10 \n\t" \
- "adds r9, r9, r1 \n\t" \
- "stmia r0!, {r3,r9} \n\t" \
- \
- "umull r9, r10, r11, r11 \n\t" \
- "adcs r9, r9, r4 \n\t" \
- "adcs r10, r10, r2 \n\t" \
- "stmia r0!, {r9,r10} \n\t" \
- \
- "umull r9, r10, r12, r12 \n\t" \
- "adcs r9, r9, r5 \n\t" \
- "adcs r10, r10, r7 \n\t" \
- "stmia r0!, {r9,r10} \n\t" \
- \
- "umull r9, r10, r14, r14 \n\t" \
- "adcs r9, r9, r6 \n\t" \
- "adcs r10, r10, r8 \n\t" \
- "stmia r0!, {r9,r10} \n\t" \
- "pop {r1, r2} \n\t"
-
-#define FAST_SQUARE_ASM_6_TO_7 \
- "cmp r2, #6 \n\t" \
- "beq 1f \n\t" \
- \
- "sub r0, #24 \n\t" \
- "sub r1, #24 \n\t" \
- \
- /* Do off-center multiplication */ \
- "ldmia r1!, {r5,r6,r7,r8,r9,r10,r14} \n\t" \
- "umull r3, r4, r5, r14 \n\t" \
- "mov r5, #0 \n\t" \
- "umaal r4, r5, r6, r14 \n\t" \
- "mov r6, #0 \n\t" \
- "umaal r5, r6, r7, r14 \n\t" \
- "mov r7, #0 \n\t" \
- "umaal r6, r7, r8, r14 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r7, r8, r9, r14 \n\t" \
- "mov r9, #0 \n\t" \
- "umaal r8, r9, r10, r14 \n\t" \
- \
- /* Multiply by 2 */ \
- "mov r10, #0 \n\t" \
- "adds r3, r3, r3 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- "adcs r7, r7, r7 \n\t" \
- "adcs r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- \
- /* Add into previous */ \
- "ldr r12, [r0], #4 \n\t" \
- "adds r3, r3, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r4, r4, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r5, r5, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r6, r6, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r7, r7, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r8, r8, r12 \n\t" \
- "adcs r9, r9, #0 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "sub r0, #24 \n\t" \
- \
- /* Perform center multiplication */ \
- "umlal r9, r10, r14, r14 \n\t" \
- "stmia r0!, {r3,r4,r5,r6,r7,r8,r9,r10} \n\t"
-
-#define FAST_SQUARE_ASM_7 \
- "ldmia r1!, {r9,r10,r11,r12} \n\t" \
- "push {r2} \n\t" \
- \
- "umull r14, r2, r10, r9 \n\t" \
- "mov r3, #0 \n\t" \
- "umaal r2, r3, r11, r9 \n\t" \
- "mov r4, #0 \n\t" \
- "umaal r3, r4, r12, r9 \n\t" \
- \
- "mov r5, #0 \n\t" \
- "umaal r5, r3, r11, r10 \n\t" \
- "adds r14, r14, r14 \n\t" \
- "adcs r2, r2, r2 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- /* Store carry in r7 */ \
- "mov r7, #0 \n\t" \
- "adc r7, r7, #0 \n\t" \
- \
- "umull r6, r8, r9, r9 \n\t" \
- "adds r8, r8, r14 \n\t" \
- "stmia r0!, {r6,r8} \n\t" \
- \
- "umull r6, r8, r10, r10 \n\t" \
- "adcs r6, r6, r2 \n\t" \
- "adcs r8, r8, r5 \n\t" \
- "stmia r0!, {r6,r8} \n\t" \
- /* Store carry in r8 */ \
- "mov r8, #0 \n\t" \
- "adc r8, r8, #0 \n\t" \
- \
- "ldmia r1!, {r2, r6, r14} \n\t" \
- "push {r1} \n\t" \
- "umaal r3, r4, r2, r9 \n\t" \
- "mov r5, #0 \n\t" \
- "umaal r4, r5, r6, r9 \n\t" \
- "mov r1, #0 \n\t" \
- "umaal r5, r1, r14, r9 \n\t" \
- \
- "mov r9, #0 \n\t" \
- "umaal r3, r9, r12, r10 \n\t" \
- "umaal r9, r4, r2, r10 \n\t" \
- "umaal r4, r5, r6, r10 \n\t" \
- "umaal r5, r1, r14, r10 \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umaal r10, r9, r12, r11 \n\t" \
- "umaal r9, r4, r2, r11 \n\t" \
- "umaal r4, r5, r6, r11 \n\t" \
- "umaal r5, r1, r14, r11 \n\t" \
- \
- /* Load carry from r7 */ \
- "lsrs r7, #1 \n\t" \
- "adcs r3, r3, r3 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- /* Store carry back in r7 */ \
- "adc r7, r7, #0 \n\t" \
- \
- /* Use carry from r8 */ \
- "umaal r3, r8, r11, r11 \n\t" \
- "adds r8, r8, r10 \n\t" \
- "stmia r0!, {r3,r8} \n\t" \
- /* Store carry back in r8 */ \
- "mov r8, #0 \n\t" \
- "adc r8, r8, #0 \n\t" \
- \
- "mov r3, #0 \n\t" \
- "umaal r3, r4, r2, r12 \n\t" \
- "umaal r4, r5, r6, r12 \n\t" \
- "umaal r5, r1, r14, r12 \n\t" \
- \
- "mov r10, #0 \n\t" \
- "umaal r10, r5, r6, r2 \n\t" \
- "umaal r5, r1, r14, r2 \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umaal r11, r1, r14, r6 \n\t" \
- \
- /* Load carry from r7 */ \
- "lsrs r7, #1 \n\t" \
- "adcs r3, r3, r3 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adcs r1, r1, r1 \n\t" \
- "adc r7, r7, #0 \n\t" \
- \
- /* Use carry from r8 */ \
- "umaal r8, r9, r12, r12 \n\t" \
- "adds r9, r9, r3 \n\t" \
- "stmia r0!, {r8,r9} \n\t" \
- \
- "umull r8, r9, r2, r2 \n\t" \
- "adcs r8, r8, r4 \n\t" \
- "adcs r9, r9, r10 \n\t" \
- "stmia r0!, {r8,r9} \n\t" \
- \
- "umull r8, r9, r6, r6 \n\t" \
- "adcs r8, r8, r5 \n\t" \
- "adcs r9, r9, r11 \n\t" \
- "stmia r0!, {r8,r9} \n\t" \
- \
- "umull r8, r9, r14, r14 \n\t" \
- "adcs r8, r8, r1 \n\t" \
- "adcs r9, r9, r7 \n\t" \
- "stmia r0!, {r8,r9} \n\t" \
- "pop {r1, r2} \n\t"
-
-#define FAST_SQUARE_ASM_7_TO_8 \
- "cmp r2, #7 \n\t" \
- "beq 1f \n\t" \
- \
- "sub r0, #28 \n\t" \
- "sub r1, #28 \n\t" \
- \
- /* Do off-center multiplication */ \
- "ldmia r1!, {r5,r6,r7,r8,r9,r10,r11,r14} \n\t" \
- "umull r3, r4, r5, r14 \n\t" \
- "mov r5, #0 \n\t" \
- "umaal r4, r5, r6, r14 \n\t" \
- "mov r6, #0 \n\t" \
- "umaal r5, r6, r7, r14 \n\t" \
- "mov r7, #0 \n\t" \
- "umaal r6, r7, r8, r14 \n\t" \
- "mov r8, #0 \n\t" \
- "umaal r7, r8, r9, r14 \n\t" \
- "mov r9, #0 \n\t" \
- "umaal r8, r9, r10, r14 \n\t" \
- "mov r10, #0 \n\t" \
- "umaal r9, r10, r11, r14 \n\t" \
- \
- /* Multiply by 2 */ \
- "mov r11, #0 \n\t" \
- "adds r3, r3, r3 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- "adcs r7, r7, r7 \n\t" \
- "adcs r8, r8, r8 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adcs r10, r10, r10 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- \
- /* Add into previous */ \
- "ldr r12, [r0], #4 \n\t" \
- "adds r3, r3, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r4, r4, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r5, r5, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r6, r6, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r7, r7, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r8, r8, r12 \n\t" \
- "ldr r12, [r0], #4 \n\t" \
- "adcs r9, r9, r12 \n\t" \
- "adcs r10, r10, #0 \n\t" \
- "adcs r11, r11, #0 \n\t" \
- "sub r0, #28 \n\t" \
- \
- /* Perform center multiplication */ \
- "umlal r10, r11, r14, r14 \n\t" \
- "stmia r0!, {r3,r4,r5,r6,r7,r8,r9,r10,r11} \n\t"
-
-#define FAST_SQUARE_ASM_8 \
- "ldmia r1!, {r10,r11,r12,r14} \n\t" \
- "push {r2} \n\t" \
- \
- "umull r2, r3, r11, r10 \n\t" \
- "mov r4, #0 \n\t" \
- "umaal r3, r4, r12, r10 \n\t" \
- "mov r5, #0 \n\t" \
- "umaal r4, r5, r14, r10 \n\t" \
- \
- "mov r6, #0 \n\t" \
- "umaal r6, r4, r12, r11 \n\t" \
- "adds r2, r2, r2 \n\t" \
- "adcs r3, r3, r3 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- /* Store carry in r7 */ \
- "mov r7, #0 \n\t" \
- "adc r7, r7, #0 \n\t" \
- \
- "umull r8, r9, r10, r10 \n\t" \
- "adds r9, r9, r2 \n\t" \
- "stmia r0!, {r8,r9} \n\t" \
- \
- "umull r8, r9, r11, r11 \n\t" \
- "adcs r8, r8, r3 \n\t" \
- "adcs r9, r9, r6 \n\t" \
- "stmia r0!, {r8,r9} \n\t" \
- /* Store carry in r8 */ \
- "mov r8, #0 \n\t" \
- "adc r8, r8, #0 \n\t" \
- \
- "ldmia r1!, {r2, r3} \n\t" \
- "push {r1} \n\t" \
- "umaal r4, r5, r2, r10 \n\t" \
- "mov r6, #0 \n\t" \
- "umaal r5, r6, r3, r10 \n\t" \
- \
- "mov r9, #0 \n\t" \
- "umaal r9, r4, r14, r11 \n\t" \
- "umaal r4, r5, r2, r11 \n\t" \
- \
- "mov r1, #0 \n\t" \
- "umaal r1, r4, r14, r12 \n\t" \
- \
- /* Load carry from r7 */ \
- "lsrs r7, #1 \n\t" \
- "adcs r9, r9, r9 \n\t" \
- "adcs r1, r1, r1 \n\t" \
- /* Store carry back in r7 */ \
- "adc r7, r7, #0 \n\t" \
- \
- /* Use carry from r8 */ \
- "umaal r8, r9, r12, r12 \n\t" \
- "adds r9, r9, r1 \n\t" \
- "stmia r0!, {r8,r9} \n\t" \
- /* Store carry back in r8 */ \
- "mov r8, #0 \n\t" \
- "adc r8, r8, #0 \n\t" \
- \
- "pop {r1} \n\t" \
- /* TODO could fix up r1 value on stack here */ \
- /* and leave the value on the stack (rather */ \
- /* than popping) if supporting curves > 256 bits */ \
- "ldr r9, [r1], #4 \n\t" \
- "ldr r1, [r1] \n\t" \
- \
- "push {r7} \n\t" \
- "umaal r5, r6, r9, r10 \n\t" \
- "mov r7, #0 \n\t" \
- "umaal r6, r7, r1, r10 \n\t" \
- /* Carry now stored in r10 */ \
- "pop {r10} \n\t" \
- \
- "umaal r4, r5, r3, r11 \n\t" \
- "umaal r5, r6, r9, r11 \n\t" \
- "umaal r6, r7, r1, r11 \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umaal r11, r4, r2, r12 \n\t" \
- "umaal r4, r5, r3, r12 \n\t" \
- "umaal r5, r6, r9, r12 \n\t" \
- "umaal r6, r7, r1, r12 \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umaal r12, r4, r2, r14 \n\t" \
- "umaal r4, r5, r3, r14 \n\t" \
- "umaal r5, r6, r9, r14 \n\t" \
- "umaal r6, r7, r1, r14 \n\t" \
- \
- /* Load carry from r10 */ \
- "lsrs r10, #1 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adcs r12, r12, r12 \n\t" \
- "adc r10, r10, #0 \n\t" \
- \
- /* Use carry from r8 */ \
- "umaal r8, r11, r14, r14 \n\t" \
- "adds r11, r11, r12 \n\t" \
- "stmia r0!, {r8,r11} \n\t" \
- /* Store carry back in r8 */ \
- "mov r8, #0 \n\t" \
- "adc r8, r8, #0 \n\t" \
- \
- "mov r11, #0 \n\t" \
- "umaal r11, r5, r3, r2 \n\t" \
- "umaal r5, r6, r9, r2 \n\t" \
- "umaal r6, r7, r1, r2 \n\t" \
- \
- "mov r12, #0 \n\t" \
- "umaal r12, r6, r9, r3 \n\t" \
- "umaal r6, r7, r1, r3 \n\t" \
- \
- "mov r14, #0 \n\t" \
- "umaal r14, r7, r1, r9 \n\t" \
- \
- /* Load carry from r10 */ \
- "lsrs r10, #1 \n\t" \
- "adcs r4, r4, r4 \n\t" \
- "adcs r11, r11, r11 \n\t" \
- "adcs r5, r5, r5 \n\t" \
- "adcs r12, r12, r12 \n\t" \
- "adcs r6, r6, r6 \n\t" \
- "adcs r14, r14, r14 \n\t" \
- "adcs r7, r7, r7 \n\t" \
- "adc r10, r10, #0 \n\t" \
- \
- /* Use carry from r8 */ \
- "umaal r4, r8, r2, r2 \n\t" \
- "adds r8, r8, r11 \n\t" \
- "stmia r0!, {r4,r8} \n\t" \
- \
- "umull r4, r8, r3, r3 \n\t" \
- "adcs r4, r4, r5 \n\t" \
- "adcs r8, r8, r12 \n\t" \
- "stmia r0!, {r4,r8} \n\t" \
- \
- "umull r4, r8, r9, r9 \n\t" \
- "adcs r4, r4, r6 \n\t" \
- "adcs r8, r8, r14 \n\t" \
- "stmia r0!, {r4,r8} \n\t" \
- \
- "umull r4, r8, r1, r1 \n\t" \
- "adcs r4, r4, r7 \n\t" \
- "adcs r8, r8, r10 \n\t" \
- "stmia r0!, {r4,r8} \n\t" \
- /* TODO pop {r1, r2} if supporting curves > 256 bits */ \
- "pop {r2} \n\t"
-
-#endif /* _UECC_ASM_ARM_MULT_SQUARE_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr.inc b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr.inc
deleted file mode 100644
index c14bf5554..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr.inc
+++ /dev/null
@@ -1,1089 +0,0 @@
-/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_ASM_AVR_H_
-#define _UECC_ASM_AVR_H_
-
-#if (uECC_SUPPORTS_secp256r1 || uECC_SUPPORTS_secp256k1)
- #define uECC_MIN_WORDS 32
-#endif
-#if uECC_SUPPORTS_secp224r1
- #undef uECC_MIN_WORDS
- #define uECC_MIN_WORDS 28
-#endif
-#if uECC_SUPPORTS_secp192r1
- #undef uECC_MIN_WORDS
- #define uECC_MIN_WORDS 24
-#endif
-#if uECC_SUPPORTS_secp160r1
- #undef uECC_MIN_WORDS
- #define uECC_MIN_WORDS 20
-#endif
-
-#if __AVR_HAVE_EIJMP_EICALL__
- #define IJMP "eijmp \n\t"
-#else
- #define IJMP "ijmp \n\t"
-#endif
-
-#if (uECC_OPTIMIZATION_LEVEL >= 2)
-
-uECC_VLI_API void uECC_vli_clear(uECC_word_t *vli, wordcount_t num_words) {
- volatile uECC_word_t *v = vli;
- __asm__ volatile (
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "ldi r30, pm_lo8(1f) \n\t"
- "ldi r31, pm_hi8(1f) \n\t"
- "sub r30, %[num] \n\t"
- "sbc r31, __zero_reg__ \n\t"
- IJMP
- #endif
-
- REPEAT(uECC_MAX_WORDS, "st x+, __zero_reg__ \n\t")
- "1: \n\t"
- : "+x" (v)
- : [num] "r" (num_words)
- :
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "r30", "r31", "cc"
- #endif
- );
-}
-#define asm_clear 1
-
-uECC_VLI_API void uECC_vli_set(uECC_word_t *dest, const uECC_word_t *src, wordcount_t num_words) {
- volatile uECC_word_t *d = dest;
- __asm__ volatile (
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "ldi r30, pm_lo8(1f) \n\t"
- "ldi r31, pm_hi8(1f) \n\t"
- "sub r30, %[num] \n\t"
- "sbc r31, __zero_reg__ \n\t"
- IJMP
- #endif
-
- REPEAT(uECC_MAX_WORDS,
- "ld r0, y+ \n\t"
- "st x+, r0 \n\t")
- "1: \n\t"
- : "+x" (d), "+y" (src)
- : [num] "r" ((uint8_t)(num_words * 2))
- : "r0"
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- , "r30", "r31", "cc"
- #endif
- );
-}
-#define asm_set 1
-
-uECC_VLI_API void uECC_vli_rshift1(uECC_word_t *vli, wordcount_t num_words) {
- volatile uECC_word_t *v = vli;
- __asm__ volatile (
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "ldi r30, pm_lo8(1f) \n\t"
- "ldi r31, pm_hi8(1f) \n\t"
- "sub r30, %[jump] \n\t"
- "sbc r31, __zero_reg__ \n\t"
- #endif
-
- "add r26, %[num] \n\t"
- "adc r27, __zero_reg__ \n\t"
- "ld r0, -x \n\t"
- "lsr r0 \n\t"
- "st x, r0 \n\t"
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- IJMP
- #endif
-
- REPEAT(DEC(uECC_MAX_WORDS),
- "ld r0, -x \n\t"
- "ror r0 \n\t"
- "st x, r0 \n\t")
- "1: \n\t"
- : "+x" (v)
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- : [num] "r" (num_words), [jump] "r" ((uint8_t)(3 * (num_words - 1)))
- : "r0", "r30", "r31", "cc"
- #else
- : [num] "r" (num_words)
- : "r0", "cc"
- #endif
- );
-}
-#define asm_rshift1 1
-
-#define ADD_RJPM_TABLE(N) \
- "movw r30, %A[result] \n\t" \
- "rjmp add_%=_" #N " \n\t"
-
-#define ADD_RJPM_DEST(N) \
- "add_%=_" #N ":" \
- "ld %[clb], x+ \n\t" \
- "ld %[rb], y+ \n\t" \
- "adc %[clb], %[rb] \n\t" \
- "st z+, %[clb] \n\t"
-
-uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- volatile uECC_word_t *r = result;
- uint8_t carry;
- uint8_t right_byte;
-
- __asm__ volatile (
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "ldi r30, pm_lo8(add_%=_" STR(uECC_MAX_WORDS) ") \n\t"
- "ldi r31, pm_hi8(add_%=_" STR(uECC_MAX_WORDS) ") \n\t"
- "sub r30, %[num] \n\t"
- "sbc r31, __zero_reg__ \n\t"
- #endif
-
- "clc \n\t"
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- IJMP
- REPEATM(uECC_MAX_WORDS, ADD_RJPM_TABLE)
- #endif
-
- REPEATM(uECC_MAX_WORDS, ADD_RJPM_DEST)
-
- "mov %[clb], __zero_reg__ \n\t"
- "adc %[clb], %[clb] \n\t" /* Store carry bit. */
-
- : "+x" (left), "+y" (right),
- [clb] "=&r" (carry), [rb] "=&r" (right_byte)
- : [result] "r" (r), [num] "r" ((uint8_t)(num_words * 2))
- : "r30", "r31", "cc"
- );
- return carry;
-}
-#define asm_add 1
-
-#define SUB_RJPM_TABLE(N) \
- "movw r30, %A[result] \n\t" \
- "rjmp sub_%=_" #N " \n\t"
-
-#define SUB_RJPM_DEST(N) \
- "sub_%=_" #N ":" \
- "ld %[clb], x+ \n\t" \
- "ld %[rb], y+ \n\t" \
- "sbc %[clb], %[rb] \n\t" \
- "st z+, %[clb] \n\t"
-
-uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- volatile uECC_word_t *r = result;
- uint8_t carry;
- uint8_t right_byte;
-
- __asm__ volatile (
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- "ldi r30, pm_lo8(sub_%=_" STR(uECC_MAX_WORDS) ") \n\t"
- "ldi r31, pm_hi8(sub_%=_" STR(uECC_MAX_WORDS) ") \n\t"
- "sub r30, %[num] \n\t"
- "sbc r31, __zero_reg__ \n\t"
- #endif
-
- "clc \n\t"
- #if (uECC_MAX_WORDS != uECC_MIN_WORDS)
- IJMP
- REPEATM(uECC_MAX_WORDS, SUB_RJPM_TABLE)
- #endif
-
- REPEATM(uECC_MAX_WORDS, SUB_RJPM_DEST)
-
- "mov %[clb], __zero_reg__ \n\t"
- "adc %[clb], %[clb] \n\t" /* Store carry bit. */
-
- : "+x" (left), "+y" (right),
- [clb] "=&r" (carry), [rb] "=&r" (right_byte)
- : [result] "r" (r), [num] "r" ((uint8_t)(num_words * 2))
- : "r30", "r31", "cc"
- );
- return carry;
-}
-#define asm_sub 1
-
-#if (uECC_OPTIMIZATION_LEVEL >= 3)
-
-#include "asm_avr_mult_square.inc"
-
-__attribute((noinline))
-uECC_VLI_API void uECC_vli_mult(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- /* num_words should already be in r18. */
- register wordcount_t r18 __asm__("r18") = num_words;
-
- __asm__ volatile (
- "push r18 \n\t"
-#if (uECC_MIN_WORDS == 20)
- FAST_MULT_ASM_20
- "pop r18 \n\t"
- #if (uECC_MAX_WORDS > 20)
- FAST_MULT_ASM_20_TO_24
- #endif
- #if (uECC_MAX_WORDS > 24)
- FAST_MULT_ASM_24_TO_28
- #endif
- #if (uECC_MAX_WORDS > 28)
- FAST_MULT_ASM_28_TO_32
- #endif
-#elif (uECC_MIN_WORDS == 24)
- FAST_MULT_ASM_24
- "pop r18 \n\t"
- #if (uECC_MAX_WORDS > 24)
- FAST_MULT_ASM_24_TO_28
- #endif
- #if (uECC_MAX_WORDS > 28)
- FAST_MULT_ASM_28_TO_32
- #endif
-#elif (uECC_MIN_WORDS == 28)
- FAST_MULT_ASM_28
- "pop r18 \n\t"
- #if (uECC_MAX_WORDS > 28)
- FAST_MULT_ASM_28_TO_32
- #endif
-#elif (uECC_MIN_WORDS == 32)
- FAST_MULT_ASM_32
- "pop r18 \n\t"
-#endif
- "2: \n\t"
- "eor r1, r1 \n\t"
- : "+x" (left), "+y" (right), "+z" (result)
- : "r" (r18)
- : "r0", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
- "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r19", "r20",
- "r21", "r22", "r23", "r24", "r25", "cc"
- );
-}
-#define asm_mult 1
-
-#if uECC_SQUARE_FUNC
-__attribute((noinline))
-uECC_VLI_API void uECC_vli_square(uECC_word_t *result,
- const uECC_word_t *left,
- wordcount_t num_words) {
- /* num_words should already be in r20. */
- register wordcount_t r20 __asm__("r20") = num_words;
-
- __asm__ volatile (
- "push r20 \n\t"
-#if (uECC_MIN_WORDS == 20)
- FAST_SQUARE_ASM_20
- "pop r20 \n\t"
- #if (uECC_MAX_WORDS > 20)
- FAST_SQUARE_ASM_20_TO_24
- #endif
- #if (uECC_MAX_WORDS > 24)
- FAST_SQUARE_ASM_24_TO_28
- #endif
- #if (uECC_MAX_WORDS > 28)
- FAST_SQUARE_ASM_28_TO_32
- #endif
-#elif (uECC_MIN_WORDS == 24)
- FAST_SQUARE_ASM_24
- "pop r20 \n\t"
- #if (uECC_MAX_WORDS > 24)
- FAST_SQUARE_ASM_24_TO_28
- #endif
- #if (uECC_MAX_WORDS > 28)
- FAST_SQUARE_ASM_28_TO_32
- #endif
-#elif (uECC_MIN_WORDS == 28)
- FAST_SQUARE_ASM_28
- "pop r20 \n\t"
- #if (uECC_MAX_WORDS > 28)
- FAST_SQUARE_ASM_28_TO_32
- #endif
-#elif (uECC_MIN_WORDS == 32)
- FAST_SQUARE_ASM_32
- "pop r20 \n\t"
-#endif
- "2: \n\t"
- "eor r1, r1 \n\t"
- : "+x" (left), "+z" (result)
- : "r" (r20)
- : "r0", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
- "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
- "r21", "r22", "r23", "r24", "r25", "r28", "r29", "cc"
- );
-}
-#define asm_square 1
-#endif /* uECC_SQUARE_FUNC */
-
-#endif /* (uECC_OPTIMIZATION_LEVEL >= 3) */
-
-#if uECC_SUPPORTS_secp160r1
-static const struct uECC_Curve_t curve_secp160r1;
-static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product) {
- uint8_t carry = 0;
- __asm__ volatile (
- "in r30, __SP_L__ \n\t"
- "in r31, __SP_H__ \n\t"
- "sbiw r30, 24 \n\t"
- "in r0, __SREG__ \n\t"
- "cli \n\t"
- "out __SP_H__, r31 \n\t"
- "out __SREG__, r0 \n\t"
- "out __SP_L__, r30 \n\t"
-
- "adiw r30, 25 \n\t" /* we are shifting by 31 bits, so shift over 4 bytes
- (+ 1 since z initially points below the stack) */
- "adiw r26, 40 \n\t" /* end of product */
- "ld r18, -x \n\t" /* Load word. */
- "lsr r18 \n\t" /* Shift. */
- "st -z, r18 \n\t" /* Store the first result word. */
-
- /* Now we just do the remaining words with the carry bit (using ROR) */
- REPEAT(19,
- "ld r18, -x \n\t"
- "ror r18 \n\t"
- "st -z, r18 \n\t")
-
- "eor r18, r18 \n\t" /* r18 = 0 */
- "ror r18 \n\t" /* get last bit */
- "st -z, r18 \n\t" /* store it */
-
- "sbiw r30, 3 \n\t" /* move z back to point at tmp */
- /* now we add right */
- "ld r18, x+ \n\t"
- "st z+, r18 \n\t" /* the first 3 bytes do not need to be added */
- "ld r18, x+ \n\t"
- "st z+, r18 \n\t"
- "ld r18, x+ \n\t"
- "st z+, r18 \n\t"
-
- "ld r18, x+ \n\t"
- "ld r19, z \n\t"
- "add r18, r19 \n\t"
- "st z+, r18 \n\t"
-
- /* Now we just do the remaining words with the carry bit (using ADC) */
- REPEAT(16,
- "ld r18, x+ \n\t"
- "ld r19, z \n\t"
- "adc r18, r19 \n\t"
- "st z+, r18 \n\t")
-
- /* Propagate over the remaining bytes of result */
- "ld r18, z \n\t"
- "adc r18, r1 \n\t"
- "st z+, r18 \n\t"
-
- "ld r18, z \n\t"
- "adc r18, r1 \n\t"
- "st z+, r18 \n\t"
-
- "ld r18, z \n\t"
- "adc r18, r1 \n\t"
- "st z+, r18 \n\t"
-
- "ld r18, z \n\t"
- "adc r18, r1 \n\t"
- "st z+, r18 \n\t"
-
- "sbiw r30, 24 \n\t" /* move z back to point at tmp */
- "sbiw r26, 40 \n\t" /* move x back to point at product */
-
- /* add low bytes of tmp to product, storing in result */
- "ld r18, z+ \n\t"
- "ld r19, x+ \n\t"
- "add r18, r19 \n\t"
- "st y+, r18 \n\t"
- REPEAT(19,
- "ld r18, z+ \n\t"
- "ld r19, x+ \n\t"
- "adc r18, r19 \n\t"
- "st y+, r18 \n\t")
- "adc %[carry], __zero_reg__ \n\t" /* Store carry bit (carry flag is cleared). */
- /* at this point x is at the end of product, y is at the end of result,
- z is 20 bytes into tmp */
- "sbiw r28, 20 \n\t" /* move y back to point at result */
- "adiw r30, 4 \n\t" /* move z to point to the end of tmp */
-
- /* do omega_mult again with the 4 relevant bytes */
- /* z points to the end of tmp, x points to the end of product */
- "ld r18, -z \n\t" /* Load word. */
- "lsr r18 \n\t" /* Shift. */
- "st -x, r18 \n\t" /* Store the first result word. */
-
- "ld r18, -z \n\t"
- "ror r18 \n\t"
- "st -x, r18 \n\t"
- "ld r18, -z \n\t"
- "ror r18 \n\t"
- "st -x, r18 \n\t"
- "ld r18, -z \n\t"
- "ror r18 \n\t"
- "st -x, r18 \n\t"
-
- "eor r18, r18 \n\t" /* r18 = 0 */
- "ror r18 \n\t" /* get last bit */
- "st -x, r18 \n\t" /* store it */
-
- "sbiw r26, 3 \n\t" /* move x back to point at beginning */
- /* now we add a copy of the 4 bytes */
- "ld r18, z+ \n\t"
- "st x+, r18 \n\t" /* the first 3 bytes do not need to be added */
- "ld r18, z+ \n\t"
- "st x+, r18 \n\t"
- "ld r18, z+ \n\t"
- "st x+, r18 \n\t"
-
- "ld r18, z+ \n\t"
- "ld r19, x \n\t"
- "add r18, r19 \n\t"
- "st x+, r18 \n\t"
-
- /* Propagate over the remaining bytes */
- "ld r18, x \n\t"
- "adc r18, r1 \n\t"
- "st x+, r18 \n\t"
-
- "ld r18, x \n\t"
- "adc r18, r1 \n\t"
- "st x+, r18 \n\t"
-
- "ld r18, x \n\t"
- "adc r18, r1 \n\t"
- "st x+, r18 \n\t"
-
- "ld r18, x \n\t"
- "adc r18, r1 \n\t"
- "st x+, r18 \n\t"
-
- /* now z points to the end of tmp, x points to the end of product
- (y still points at result) */
- "sbiw r26, 8 \n\t" /* move x back to point at beginning of actual data */
- /* add into result */
- "ld r18, x+ \n\t"
- "ld r19, y \n\t"
- "add r18, r19 \n\t"
- "st y+, r18 \n\t"
- REPEAT(7,
- "ld r18, x+ \n\t"
- "ld r19, y \n\t"
- "adc r18, r19 \n\t"
- "st y+, r18 \n\t")
-
- /* Done adding, now propagate carry bit */
- REPEAT(12,
- "ld r18, y \n\t"
- "adc r18, __zero_reg__ \n\t"
- "st y+, r18 \n\t")
-
- "adc %[carry], __zero_reg__ \n\t" /* Store carry bit (carry flag is cleared). */
- "sbiw r28, 20 \n\t" /* move y back to point at result */
-
- "sbiw r30, 1 \n\t" /* fix stack pointer */
- "in r0, __SREG__ \n\t"
- "cli \n\t"
- "out __SP_H__, r31 \n\t"
- "out __SREG__, r0 \n\t"
- "out __SP_L__, r30 \n\t"
-
- : "+x" (product), [carry] "+r" (carry)
- : "y" (result)
- : "r0", "r18", "r19", "r30", "r31", "cc"
- );
-
- if (carry > 0) {
- --carry;
- uECC_vli_sub(result, result, curve_secp160r1.p, 20);
- }
- if (carry > 0) {
- uECC_vli_sub(result, result, curve_secp160r1.p, 20);
- }
- if (uECC_vli_cmp_unsafe(result, curve_secp160r1.p, 20) > 0) {
- uECC_vli_sub(result, result, curve_secp160r1.p, 20);
- }
-}
-#define asm_mmod_fast_secp160r1 1
-#endif /* uECC_SUPPORTS_secp160r1 */
-
-#if uECC_SUPPORTS_secp256k1
-static const struct uECC_Curve_t curve_secp256k1;
-static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) {
- uint8_t carry = 0;
- __asm__ volatile (
- "in r30, __SP_L__ \n\t"
- "in r31, __SP_H__ \n\t"
- "sbiw r30, 37 \n\t"
- "in r0, __SREG__ \n\t"
- "cli \n\t"
- "out __SP_H__, r31 \n\t"
- "out __SREG__, r0 \n\t"
- "out __SP_L__, r30 \n\t"
-
- "adiw r30, 1 \n\t" /* add 1 since z initially points below the stack */
- "adiw r26, 32 \n\t" /* product + uECC_WORDS */
- "ldi r25, 0x03 \n\t"
- "ldi r24, 0xD1 \n\t"
- "ld r18, x+ \n\t"
- "ld r19, x+ \n\t"
- "ld r20, x+ \n\t"
- "ld r21, x+ \n\t"
-
- "mul r24, r18 \n\t"
- "st z+, r0 \n\t"
- "mov r22, r1 \n\t"
- "ldi r23, 0 \n\t"
-
- "mul r24, r19 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t" /* can't overflow */
- "mul r25, r18 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t" /* can't overflow */
- "st z+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- "mul r24, r20 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "mul r25, r19 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "st z+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- "mul r24, r21 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "mul r25, r20 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "st z+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- /* now we start adding the 2^32 part as well */
- "add r23, r18 \n\t" // 28
- "adc r22, r22 \n\t"
- "ld r18, x+ \n\t"
- "mul r24, r18 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "mul r25, r21 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "st z+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- "add r22, r19 \n\t" // 27
- "adc r23, r23 \n\t"
- "ld r19, x+ \n\t"
- "mul r24, r19 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "mul r25, r18 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "st z+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- REPEAT(6, // 26 - 3
- "add r23, r20 \n\t"
- "adc r22, r22 \n\t"
- "ld r20, x+ \n\t"
- "mul r24, r20 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "mul r25, r19 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "st z+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- "add r22, r21 \n\t"
- "adc r23, r23 \n\t"
- "ld r21, x+ \n\t"
- "mul r24, r21 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "mul r25, r20 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "st z+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- "add r23, r18 \n\t"
- "adc r22, r22 \n\t"
- "ld r18, x+ \n\t"
- "mul r24, r18 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "mul r25, r21 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "st z+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- "add r22, r19 \n\t"
- "adc r23, r23 \n\t"
- "ld r19, x+ \n\t"
- "mul r24, r19 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "mul r25, r18 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "st z+, r22 \n\t"
- "ldi r22, 0 \n\t")
-
- "add r23, r20 \n\t" // 2
- "adc r22, r22 \n\t"
- "ld r20, x+ \n\t"
- "mul r24, r20 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "mul r25, r19 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "st z+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- "add r22, r21 \n\t" // 1
- "adc r23, r23 \n\t"
- "ld r21, x+ \n\t"
- "mul r24, r21 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "mul r25, r20 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "st z+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- /* Now finish the carries etc */
- "add r23, r18 \n\t"
- "adc r22, r22 \n\t"
- "mul r25, r21 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "st z+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- "add r22, r19 \n\t"
- "adc r23, r23 \n\t"
- "st z+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- "add r23, r20 \n\t"
- "adc r22, r22 \n\t"
- "st z+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- "add r22, r21 \n\t"
- "adc r23, r23 \n\t"
- "st z+, r22 \n\t"
- "st z+, r23 \n\t"
- "eor r1, r1 \n\t" /* make r1 be 0 again */
-
- "sbiw r30, 37 \n\t" /* move z back to point at tmp */
- "subi r26, 64 \n\t" /* move x back to point at product */
- "sbc r27, __zero_reg__ \n\t"
-
- /* add low bytes of tmp to product, storing in result */
- "ld r18, z+ \n\t"
- "ld r19, x+ \n\t"
- "add r18, r19 \n\t"
- "st y+, r18 \n\t"
- REPEAT(31,
- "ld r18, z+ \n\t"
- "ld r19, x+ \n\t"
- "adc r18, r19 \n\t"
- "st y+, r18 \n\t")
-
- "adc %[carry], __zero_reg__ \n\t" /* Store carry bit (carry flag is cleared). */
- /* at this point x is at the end of product, y is at the end of result,
- z is 32 bytes into tmp */
- "sbiw r28, 32 \n\t" /* move y back to point at result */
-
- /* do omega_mult again with the 5 relevant bytes */
- /* z points to tmp + uECC_WORDS, x points to the end of product */
- "sbiw r26, 32 \n\t" /* shift x back to point into the product buffer
- (we can overwrite it now) */
- "ld r18, z+ \n\t"
- "ld r19, z+ \n\t"
- "ld r20, z+ \n\t"
- "ld r21, z+ \n\t"
-
- "mul r24, r18 \n\t"
- "st x+, r0 \n\t"
- "mov r22, r1 \n\t"
- "ldi r23, 0 \n\t"
-
- "mul r24, r19 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t" /* can't overflow */
- "mul r25, r18 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t" /* can't overflow */
- "st x+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- "mul r24, r20 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "mul r25, r19 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "st x+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- "mul r24, r21 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "mul r25, r20 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "st x+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- "add r23, r18 \n\t"
- "adc r22, r22 \n\t"
- "ld r18, z+ \n\t"
- "mul r24, r18 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "mul r25, r21 \n\t"
- "add r23, r0 \n\t"
- "adc r22, r1 \n\t"
- "st x+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- /* Now finish the carries etc */
- "add r22, r19 \n\t"
- "adc r23, r23 \n\t"
- "mul r25, r18 \n\t"
- "add r22, r0 \n\t"
- "adc r23, r1 \n\t"
- "st x+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- "add r23, r20 \n\t"
- "adc r22, r22 \n\t"
- "st x+, r23 \n\t"
- "ldi r23, 0 \n\t"
-
- "add r22, r21 \n\t"
- "adc r23, r23 \n\t"
- "st x+, r22 \n\t"
- "ldi r22, 0 \n\t"
-
- "add r23, r18 \n\t"
- "adc r22, r22 \n\t"
- "st x+, r23 \n\t"
- "st x+, r22 \n\t"
- "eor r1, r1 \n\t" /* make r1 be 0 again */
-
- /* now z points to the end of tmp, x points to the end of product
- (y still points at result) */
- "sbiw r26, 10 \n\t" /* move x back to point at beginning of actual data */
- /* add into result */
- "ld r18, x+ \n\t"
- "ld r19, y \n\t"
- "add r18, r19 \n\t"
- "st y+, r18 \n\t"
- REPEAT(9,
- "ld r18, x+ \n\t"
- "ld r19, y \n\t"
- "adc r18, r19 \n\t"
- "st y+, r18 \n\t")
-
- /* Done adding, now propagate carry bit */
- REPEAT(22,
- "ld r18, y \n\t"
- "adc r18, __zero_reg__ \n\t"
- "st y+, r18 \n\t")
-
- "adc %[carry], __zero_reg__ \n\t" /* Store carry bit (carry flag is cleared). */
- "sbiw r28, 32 \n\t" /* move y back to point at result */
-
- "sbiw r30, 1 \n\t" /* fix stack pointer */
- "in r0, __SREG__ \n\t"
- "cli \n\t"
- "out __SP_H__, r31 \n\t"
- "out __SREG__, r0 \n\t"
- "out __SP_L__, r30 \n\t"
-
- : "+x" (product), [carry] "+r" (carry)
- : "y" (result)
- : "r0", "r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r30", "r31", "cc"
- );
-
- if (carry > 0) {
- --carry;
- uECC_vli_sub(result, result, curve_secp256k1.p, 32);
- }
- if (carry > 0) {
- uECC_vli_sub(result, result, curve_secp256k1.p, 32);
- }
- if (uECC_vli_cmp_unsafe(result, curve_secp256k1.p, 32) > 0) {
- uECC_vli_sub(result, result, curve_secp256k1.p, 32);
- }
-}
-#define asm_mmod_fast_secp256k1 1
-#endif /* uECC_SUPPORTS_secp256k1 */
-
-#endif /* (uECC_OPTIMIZATION_LEVEL >= 2) */
-
-/* ---- "Small" implementations ---- */
-
-#if !asm_add
-uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- volatile uECC_word_t *r = result;
- uint8_t carry = 0;
- uint8_t left_byte;
- uint8_t right_byte;
-
- __asm__ volatile (
- "clc \n\t"
-
- "1: \n\t"
- "ld %[left], x+ \n\t" /* Load left byte. */
- "ld %[right], y+ \n\t" /* Load right byte. */
- "adc %[left], %[right] \n\t" /* Add. */
- "st z+, %[left] \n\t" /* Store the result. */
- "dec %[i] \n\t"
- "brne 1b \n\t"
-
- "adc %[carry], %[carry] \n\t" /* Store carry bit. */
-
- : "+z" (r), "+x" (left), "+y" (right), [i] "+r" (num_words),
- [carry] "+r" (carry), [left] "=&r" (left_byte), [right] "=&r" (right_byte)
- :
- : "cc"
- );
- return carry;
-}
-#define asm_add 1
-#endif
-
-#if !asm_sub
-uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- volatile uECC_word_t *r = result;
- uint8_t borrow = 0;
- uint8_t left_byte;
- uint8_t right_byte;
-
- __asm__ volatile (
- "clc \n\t"
-
- "1: \n\t"
- "ld %[left], x+ \n\t" /* Load left byte. */
- "ld %[right], y+ \n\t" /* Load right byte. */
- "sbc %[left], %[right] \n\t" /* Subtract. */
- "st z+, %[left] \n\t" /* Store the result. */
- "dec %[i] \n\t"
- "brne 1b \n\t"
-
- "adc %[borrow], %[borrow] \n\t" /* Store carry bit in borrow. */
-
- : "+z" (r), "+x" (left), "+y" (right), [i] "+r" (num_words),
- [borrow] "+r" (borrow), [left] "=&r" (left_byte), [right] "=&r" (right_byte)
- :
- : "cc"
- );
- return borrow;
-}
-#define asm_sub 1
-#endif
-
-#if !asm_mult
-__attribute((noinline))
-uECC_VLI_API void uECC_vli_mult(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- volatile uECC_word_t *r = result;
- uint8_t r0 = 0;
- uint8_t r1 = 0;
- uint8_t r2 = 0;
- uint8_t zero = 0;
- uint8_t k, i;
-
- __asm__ volatile (
- "ldi %[k], 1 \n\t" /* k = 1; k < num_words; ++k */
-
- "1: \n\t"
- "ldi %[i], 0 \n\t" /* i = 0; i < k; ++i */
-
- "add r28, %[k] \n\t" /* pre-add right ptr */
- "adc r29, %[zero] \n\t"
-
- "2: \n\t"
- "ld r0, x+ \n\t"
- "ld r1, -y \n\t"
- "mul r0, r1 \n\t"
-
- "add %[r0], r0 \n\t"
- "adc %[r1], r1 \n\t"
- "adc %[r2], %[zero] \n\t"
-
- "inc %[i] \n\t"
- "cp %[i], %[k] \n\t"
- "brlo 2b \n\t" /* loop if i < k */
-
- "sub r26, %[k] \n\t" /* fix up left ptr */
- "sbc r27, %[zero] \n\t"
-
- "st z+, %[r0] \n\t" /* Store the result. */
- "mov %[r0], %[r1] \n\t"
- "mov %[r1], %[r2] \n\t"
- "mov %[r2], %[zero] \n\t"
-
- "inc %[k] \n\t"
- "cp %[k], %[num] \n\t"
- "brlo 1b \n\t" /* loop if k < num_words */
-
- /* second half */
- "mov %[k], %[num] \n\t" /* k = num_words; k > 0; --k */
- "add r28, %[num] \n\t" /* move right ptr to point at the end of right */
- "adc r29, %[zero] \n\t"
-
- "1: \n\t"
- "ldi %[i], 0 \n\t" /* i = 0; i < k; ++i */
-
- "2: \n\t"
- "ld r0, x+ \n\t"
- "ld r1, -y \n\t"
- "mul r0, r1 \n\t"
-
- "add %[r0], r0 \n\t"
- "adc %[r1], r1 \n\t"
- "adc %[r2], %[zero] \n\t"
-
- "inc %[i] \n\t"
- "cp %[i], %[k] \n\t"
- "brlo 2b \n\t" /* loop if i < k */
-
- "add r28, %[k] \n\t" /* fix up right ptr */
- "adc r29, %[zero] \n\t"
-
- "st z+, %[r0] \n\t" /* Store the result. */
- "mov %[r0], %[r1] \n\t"
- "mov %[r1], %[r2] \n\t"
- "mov %[r2], %[zero] \n\t"
-
- "dec %[k] \n\t"
- "sub r26, %[k] \n\t" /* fix up left ptr (after k is decremented, so next time
- we start 1 higher) */
- "sbc r27, %[zero] \n\t"
-
- "cp %[k], %[zero] \n\t"
- "brne 1b \n\t" /* loop if k > 0 */
-
- "st z+, %[r0] \n\t" /* Store last result byte. */
- "eor r1, r1 \n\t" /* fix r1 to be 0 again */
-
- : "+z" (result), "+x" (left), "+y" (right),
- [r0] "+r" (r0), [r1] "+r" (r1), [r2] "+r" (r2),
- [zero] "+r" (zero), [num] "+r" (num_words),
- [k] "=&r" (k), [i] "=&r" (i)
- :
- : "r0", "cc"
- );
-}
-#define asm_mult 1
-#endif
-
-#if (uECC_SQUARE_FUNC && !asm_square)
-uECC_VLI_API void uECC_vli_square(uECC_word_t *result,
- const uECC_word_t *left,
- wordcount_t num_words) {
- volatile uECC_word_t *r = result;
- uint8_t r0 = 0;
- uint8_t r1 = 0;
- uint8_t r2 = 0;
- uint8_t zero = 0;
- uint8_t k;
-
- __asm__ volatile (
- "ldi %[k], 1 \n\t" /* k = 1; k < num_words * 2; ++k */
-
- "1: \n\t"
-
- "movw r26, %[orig] \n\t" /* copy orig ptr to 'left' ptr */
- "movw r30, %[orig] \n\t" /* copy orig ptr to 'right' ptr */
- "cp %[k], %[num] \n\t"
- "brlo 2f \n\t"
- "breq 2f \n\t"
-
- /* when k > num_words, we start from (k - num_words) on the 'left' ptr */
- "add r26, %[k] \n\t"
- "adc r27, %[zero] \n\t"
- "sub r26, %[num] \n\t"
- "sbc r27, %[zero] \n\t"
- "add r30, %[num] \n\t" /* move right ptr to point at the end */
- "adc r31, %[zero] \n\t"
- "rjmp 3f \n\t"
-
- "2: \n\t" /* when k <= num_words, we add k to the 'right' ptr */
- "add r30, %[k] \n\t" /* pre-add 'right' ptr */
- "adc r31, %[zero] \n\t"
-
- "3: \n\t"
- "ld r0, x+ \n\t"
- "cp r26, r30 \n\t" /* if left == right here, then we are done after this mult
- (and we don't need to double) */
- "breq 4f \n\t"
- "ld r1, -z \n\t"
- "mul r0, r1 \n\t"
-
- /* add twice since it costs the same as doubling */
- "add %[r0], r0 \n\t"
- "adc %[r1], r1 \n\t"
- "adc %[r2], %[zero] \n\t"
- "add %[r0], r0 \n\t"
- "adc %[r1], r1 \n\t"
- "adc %[r2], %[zero] \n\t"
-
- "cpse r26, r30 \n\t" /* if left == right here, then we are done */
- "rjmp 3b \n\t"
- "rjmp 5f \n\t" /* skip code for non-doubled mult */
-
- "4: \n\t"
- "ld r1, -z \n\t"
- "mul r0, r1 \n\t"
- "add %[r0], r0 \n\t"
- "adc %[r1], r1 \n\t"
- "adc %[r2], %[zero] \n\t"
-
- "5: \n\t"
- "movw r30, %[result] \n\t" /* make z point to result */
- "st z+, %[r0] \n\t" /* Store the result. */
- "movw %[result], r30 \n\t" /* update result ptr*/
- "mov %[r0], %[r1] \n\t"
- "mov %[r1], %[r2] \n\t"
- "mov %[r2], %[zero] \n\t"
-
- "inc %[k] \n\t"
- "cp %[k], %[max] \n\t"
- "brlo 1b \n\t" /* loop if k < num_words * 2 */
-
- "movw r30, %[result] \n\t" /* make z point to result */
- "st z+, %[r0] \n\t" /* Store last result byte. */
- "eor r1, r1 \n\t" /* fix r1 to be 0 again */
-
- : [result] "+r" (r),
- [r0] "+r" (r0), [r1] "+r" (r1), [r2] "+r" (r2), [zero] "+r" (zero),
- [k] "=&a" (k)
- : [orig] "r" (left), [max] "r" ((uint8_t)(2 * num_words)),
- [num] "r" (num_words)
- : "r0", "r26", "r27", "r30", "r31", "cc"
- );
-}
-#define asm_square 1
-#endif /* uECC_SQUARE_FUNC && !asm_square */
-
-#endif /* _UECC_ASM_AVR_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr_mult_square.inc b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr_mult_square.inc
deleted file mode 100644
index 7ae08bce6..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr_mult_square.inc
+++ /dev/null
@@ -1,26311 +0,0 @@
-/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_ASM_AVR_MULT_SQUARE_H_
-#define _UECC_ASM_AVR_MULT_SQUARE_H_
-
-#define FAST_MULT_ASM_20 \
- "adiw r30, 10 \n\t" \
- "adiw r28, 10 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r19, y+ \n\t" \
- "ld r20, y+ \n\t" \
- "ld r21, y+ \n\t" \
- "ldi r25, 0 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "st z+, r24 \n\t" \
- "st z+, r22 \n\t" \
- \
- "sbiw r30, 30 \n\t" \
- "sbiw r28, 20 \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r19, y+ \n\t" \
- "ld r20, y+ \n\t" \
- "ld r21, y+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r10, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r11, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r16, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r17, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r18, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r19, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r20, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r21, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "mul r11, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r24 \n\t"
-
-#define FAST_MULT_ASM_20_TO_24 \
- "cpi r18, 20 \n\t" \
- "brne 1f \n\t" \
- "jmp 2f \n\t" \
- "1: \n\t" \
- "ld r2, x+ \n\t" \
- "ld r6, y+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r7, y+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r8, y+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r9, y+ \n\t" \
- "sbiw r26, 24 \n\t" \
- "sbiw r28, 24 \n\t" \
- "sbiw r30, 20 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- \
- "mul r2, r14 \n\t" \
- "mov r19, r0 \n\t" \
- "mov r20, r1 \n\t" \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "mul r11, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r12, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r13, r7 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "mul r12, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r13, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "mul r13, r9 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "mul r2, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "mul r3, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "mul r4, r9 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "mul r5, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "st z+, r21 \n\t" \
- "st z+, r19 \n\t" \
- "adiw r26, 4 \n\t" \
- "adiw r28, 4 \n\t"
-
-#define FAST_MULT_ASM_24 \
- "adiw r30, 20 \n\t" \
- "adiw r28, 20 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r15, y+ \n\t" \
- "ldi r25, 0 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "st z+, r24 \n\t" \
- "st z+, r22 \n\t" \
- \
- "sbiw r30, 18 \n\t" \
- "sbiw r28, 14 \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r19, y+ \n\t" \
- "ld r20, y+ \n\t" \
- "ld r21, y+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r11, x+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r7, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r8, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r10, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r11, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r3, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r4, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r24 \n\t" \
- \
- "sbiw r30, 38 \n\t" \
- "sbiw r28, 24 \n\t" \
- "sbiw r26, 14 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r12, y+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r19, y+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r20, y+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r21, y+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r10, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r11, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r6, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r6, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r16, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r17, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r18, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r6, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r19, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r20, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r21, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "st z+, r22 \n\t" \
- "st z+, r23 \n\t"
-
-#define FAST_MULT_ASM_24_TO_28 \
- "cpi r18, 24 \n\t" \
- "brne 1f \n\t" \
- "jmp 2f \n\t" \
- "1: \n\t" \
- "ld r2, x+ \n\t" \
- "ld r6, y+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r7, y+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r8, y+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r9, y+ \n\t" \
- "sbiw r26, 28 \n\t" \
- "sbiw r28, 28 \n\t" \
- "sbiw r30, 24 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- \
- "mul r2, r14 \n\t" \
- "mov r19, r0 \n\t" \
- "mov r20, r1 \n\t" \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "mul r11, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r12, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r13, r7 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "mul r12, r9 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r13, r8 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "mul r13, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "mul r2, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "mul r3, r9 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "mul r4, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "mul r5, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "st z+, r19 \n\t" \
- "st z+, r20 \n\t" \
- "adiw r26, 4 \n\t" \
- "adiw r28, 4 \n\t"
-
-#define FAST_MULT_ASM_28 \
- "adiw r30, 20 \n\t" \
- "adiw r28, 20 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r19, y+ \n\t" \
- "ldi r25, 0 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r24 \n\t" \
- \
- "sbiw r30, 26 \n\t" \
- "sbiw r28, 18 \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r19, y+ \n\t" \
- "ld r20, y+ \n\t" \
- "ld r21, y+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r11, x+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r10, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r16, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r10, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r17, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r18, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r19, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r10, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r3, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r5, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r6, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r8, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "mul r9, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "st z+, r22 \n\t" \
- "st z+, r23 \n\t" \
- \
- "sbiw r30, 46 \n\t" \
- "sbiw r28, 28 \n\t" \
- "sbiw r26, 18 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r12, y+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r19, y+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r20, y+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r21, y+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r10, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r11, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r10, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r10, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r16, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r17, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r18, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r10, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r19, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r20, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r21, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r16, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r17, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r18, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r19, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r4, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r6, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r7, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "mul r9, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "st z+, r24 \n\t" \
- "st z+, r22 \n\t"
-
-#define FAST_MULT_ASM_28_TO_32 \
- "cpi r18, 28 \n\t" \
- "brne 1f \n\t" \
- "jmp 2f \n\t" \
- "1: \n\t" \
- "ld r2, x+ \n\t" \
- "ld r6, y+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r7, y+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r8, y+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r9, y+ \n\t" \
- "sbiw r26, 32 \n\t" \
- "sbiw r28, 32 \n\t" \
- "sbiw r30, 28 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- \
- "mul r2, r14 \n\t" \
- "mov r19, r0 \n\t" \
- "mov r20, r1 \n\t" \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r10, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "mul r2, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r25 \n\t" \
- "ld r11, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "mul r2, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r25 \n\t" \
- "ld r12, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "mul r2, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "ld r0, z \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r25 \n\t" \
- "ld r13, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "mul r2, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "mul r11, r9 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r12, r8 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r13, r7 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "mul r12, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r13, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "mul r13, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "ldi r19, 0 \n\t" \
- "mul r2, r9 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "st z+, r20 \n\t" \
- \
- "ldi r20, 0 \n\t" \
- "mul r3, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r21, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r20, r25 \n\t" \
- "st z+, r21 \n\t" \
- \
- "ldi r21, 0 \n\t" \
- "mul r4, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r20, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "st z+, r19 \n\t" \
- \
- "mul r5, r9 \n\t" \
- "add r20, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "st z+, r20 \n\t" \
- "st z+, r21 \n\t"
- /* Not necessary to move ptrs since we don't support sizes > 32 */
-
-#define FAST_MULT_ASM_32 \
- "adiw r30, 30 \n\t" \
- "adiw r28, 30 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ldi r25, 0 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r24 \n\t" \
- \
- "sbiw r30, 14 \n\t" \
- "sbiw r28, 12 \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r19, y+ \n\t" \
- "ld r20, y+ \n\t" \
- "ld r21, y+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r11, x+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r10, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "st z+, r22 \n\t" \
- "st z+, r23 \n\t" \
- \
- "sbiw r30, 34 \n\t" \
- "sbiw r28, 22 \n\t" \
- "sbiw r26, 12 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r12, y+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r19, y+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r20, y+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r21, y+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r10, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r11, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r16, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r17, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r18, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r19, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r20, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r21, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "st z+, r24 \n\t" \
- "st z+, r22 \n\t" \
- \
- "sbiw r30, 54 \n\t" \
- "sbiw r28, 32 \n\t" \
- "sbiw r26, 22 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r12, y+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r17, y+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r18, y+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r19, y+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r20, y+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r21, y+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r10, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r11, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r10, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r11, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r11, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r16, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r17, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r18, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r19, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r20, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r21, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r16, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r17, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r18, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r19, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r20, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r21, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r25 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r5, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r6, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r8, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r19 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r18 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r9, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r20 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r19 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r11, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r21 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r24 \n\t"
-
-#define FAST_SQUARE_ASM_20 \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r12, x+ \n\t" \
- "ld r13, x+ \n\t" \
- "ld r14, x+ \n\t" \
- "ld r15, x+ \n\t" \
- "ld r16, x+ \n\t" \
- "ld r17, x+ \n\t" \
- "ld r18, x+ \n\t" \
- "ld r19, x+ \n\t" \
- "ld r20, x+ \n\t" \
- "ld r21, x+ \n\t" \
- "push r26 \n\t" \
- "push r27 \n\t" \
- "ldi r25, 0 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r2 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r3 \n\t" \
- "lsl r0 \n\t" \
- "rol r1 \n\t" \
- "adc r24, r25 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r4 \n\t" \
- "lsl r0 \n\t" \
- "rol r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r2, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r3, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r6 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r4, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r2, r7 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r3, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r4, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r8 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r5, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r2, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r3, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r10 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r6, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r2, r11 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r3, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r6, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r7, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r4, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r5, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r6, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r7, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r8, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r8, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r9, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r10, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r10, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r11, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r12, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r4, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r12, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r5, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r6, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r13, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r6, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r12, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r13, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r7, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r14, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r8, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r9, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r12, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r13, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r14, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r9, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r15, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r10, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r12, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r13, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r14, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r15, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r11, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r12, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r16, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r12, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r13, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r14, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r15, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r16, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r13, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r14, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r17, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r14, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r15, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r16, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r17, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r15, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r16, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r18, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r16, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r17, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "mul r18, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r17, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r18, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r19, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r27 \n\t" \
- "adc r24, r26 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r26, 0 \n\t" \
- "mul r18, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r27, r1 \n\t" \
- "mul r19, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "adc r26, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r27 \n\t" \
- "rol r26 \n\t" \
- "add r23, r24 \n\t" \
- "adc r27, r22 \n\t" \
- "adc r26, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r19, r21 \n\t" \
- "lsl r0 \n\t" \
- "rol r1 \n\t" \
- "adc r23, r25 \n\t" \
- "add r27, r0 \n\t" \
- "adc r26, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r20, r20 \n\t" \
- "add r27, r0 \n\t" \
- "adc r26, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r27 \n\t" \
- \
- "ldi r27, 0 \n\t" \
- "mul r20, r21 \n\t" \
- "lsl r0 \n\t" \
- "rol r1 \n\t" \
- "adc r27, r25 \n\t" \
- "add r26, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r27, r25 \n\t" \
- "st z+, r26 \n\t" \
- \
- "mul r21, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r27, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r27 \n\t" \
- "pop r27 \n\t" \
- "pop r26 \n\t"
-
-#define FAST_SQUARE_ASM_20_TO_24 \
- "cpi r20, 20 \n\t" \
- "brne 1f \n\t" \
- "jmp 2f \n\t" \
- "1: \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "sbiw r26, 24 \n\t" \
- "sbiw r30, 20 \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- \
- "mul r2, r6 \n\t" \
- "mov r10, r0 \n\t" \
- "mov r11, r1 \n\t" \
- "mov r12, r25 \n\t" \
- "mov r13, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- \
- "mov r14, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- \
- "mov r15, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r16, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r17, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r18, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r19, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r21, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r22, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r23, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r24, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r28, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r29, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- \
- "lsl r10 \n\t" \
- "rol r11 \n\t" \
- "rol r12 \n\t" \
- "rol r13 \n\t" \
- "rol r14 \n\t" \
- "rol r15 \n\t" \
- "rol r16 \n\t" \
- "rol r17 \n\t" \
- "rol r18 \n\t" \
- "rol r19 \n\t" \
- "rol r21 \n\t" \
- "rol r22 \n\t" \
- "rol r23 \n\t" \
- "rol r24 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "ld r0, z \n\t" \
- "add r10, r0 \n\t" \
- "st z+, r10 \n\t" \
- "ld r0, z \n\t" \
- "adc r11, r0 \n\t" \
- "st z+, r11 \n\t" \
- "ld r0, z \n\t" \
- "adc r12, r0 \n\t" \
- "st z+, r12 \n\t" \
- "ld r0, z \n\t" \
- "adc r13, r0 \n\t" \
- "st z+, r13 \n\t" \
- "ld r0, z \n\t" \
- "adc r14, r0 \n\t" \
- "st z+, r14 \n\t" \
- "ld r0, z \n\t" \
- "adc r15, r0 \n\t" \
- "st z+, r15 \n\t" \
- "ld r0, z \n\t" \
- "adc r16, r0 \n\t" \
- "st z+, r16 \n\t" \
- "ld r0, z \n\t" \
- "adc r17, r0 \n\t" \
- "st z+, r17 \n\t" \
- "ld r0, z \n\t" \
- "adc r18, r0 \n\t" \
- "st z+, r18 \n\t" \
- "ld r0, z \n\t" \
- "adc r19, r0 \n\t" \
- "st z+, r19 \n\t" \
- "ld r0, z \n\t" \
- "adc r21, r0 \n\t" \
- "st z+, r21 \n\t" \
- "ld r0, z \n\t" \
- "adc r22, r0 \n\t" \
- "st z+, r22 \n\t" \
- "ld r0, z \n\t" \
- "adc r23, r0 \n\t" \
- "st z+, r23 \n\t" \
- "ld r0, z \n\t" \
- "adc r24, r0 \n\t" \
- "st z+, r24 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "bst r28, 0 \n\t" \
- "lsr r29 \n\t" \
- "ror r28 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r10, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r11, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r12, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r13, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r14, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r15, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- \
- "lsl r28 \n\t" \
- "bld r28, 0 \n\t" \
- "rol r29 \n\t" \
- "rol r10 \n\t" \
- "rol r11 \n\t" \
- "rol r12 \n\t" \
- "rol r13 \n\t" \
- "rol r14 \n\t" \
- "rol r15 \n\t" \
- "ld r0, z \n\t" \
- "add r28, r0 \n\t" \
- "st z+, r28 \n\t" \
- "ld r0, z \n\t" \
- "adc r29, r0 \n\t" \
- "st z+, r29 \n\t" \
- "ld r0, z \n\t" \
- "adc r10, r0 \n\t" \
- "st z+, r10 \n\t" \
- "ld r0, z \n\t" \
- "adc r11, r0 \n\t" \
- "st z+, r11 \n\t" \
- "ld r0, z \n\t" \
- "adc r12, r0 \n\t" \
- "st z+, r12 \n\t" \
- "ld r0, z \n\t" \
- "adc r13, r0 \n\t" \
- "st z+, r13 \n\t" \
- "adc r14, r25 \n\t" \
- "adc r15, r25 \n\t" \
- \
- "mul r2, r2 \n\t" \
- "mov r16, r0 \n\t" \
- "mov r17, r1 \n\t" \
- "mul r3, r3 \n\t" \
- "mov r18, r0 \n\t" \
- "mov r19, r1 \n\t" \
- "mul r4, r4 \n\t" \
- "mov r21, r0 \n\t" \
- "mov r22, r1 \n\t" \
- "mul r5, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "add r16, r14 \n\t" \
- "adc r17, r15 \n\t" \
- "adc r18, r25 \n\t" \
- "adc r19, r25 \n\t" \
- \
- "mul r7, r5 \n\t" \
- "mov r14, r0 \n\t" \
- "mov r15, r1 \n\t" \
- "mov r28, r25 \n\t" \
- "mul r8, r4 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r9, r3 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mov r29, r25 \n\t" \
- "mul r8, r5 \n\t" \
- "add r15, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r4 \n\t" \
- "add r15, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r3 \n\t" \
- "add r15, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mov r10, r25 \n\t" \
- "mul r9, r5 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r2, r4 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mov r11, r25 \n\t" \
- "mul r2, r5 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r3, r4 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mov r12, r25 \n\t" \
- "mul r3, r5 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r4, r5 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- \
- "lsl r14 \n\t" \
- "rol r15 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "rol r10 \n\t" \
- "rol r11 \n\t" \
- "rol r12 \n\t" \
- "adc r24, r25 \n\t" \
- "add r16, r14 \n\t" \
- "adc r17, r15 \n\t" \
- "adc r18, r28 \n\t" \
- "adc r19, r29 \n\t" \
- "adc r21, r10 \n\t" \
- "adc r22, r11 \n\t" \
- "adc r23, r12 \n\t" \
- "adc r24, r25 \n\t" \
- \
- "st z+, r16 \n\t" \
- "st z+, r17 \n\t" \
- "st z+, r18 \n\t" \
- "st z+, r19 \n\t" \
- "st z+, r21 \n\t" \
- "st z+, r22 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r24 \n\t" \
- "adiw r26, 4 \n\t"
-
-#define FAST_SQUARE_ASM_24 \
- "ldi r25, 0 \n\t" \
- "movw r28, r26 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "adiw r28, 20 \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "adiw r30, 20 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul 2, 12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "st z+, r24 \n\t" \
- "st z+, r22 \n\t" \
- \
- "sbiw r26, 4 \n\t" \
- "sbiw r30, 28 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r12, x+ \n\t" \
- "ld r13, x+ \n\t" \
- "ld r14, x+ \n\t" \
- "ld r15, x+ \n\t" \
- "ld r16, x+ \n\t" \
- "ld r17, x+ \n\t" \
- "ld r18, x+ \n\t" \
- "ld r19, x+ \n\t" \
- "ld r20, x+ \n\t" \
- "ld r21, x+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r2 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r3 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r6 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r4, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r7 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r8 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r5, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r10 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r6, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r11 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r7, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r8, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r9, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r10, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r11, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r12, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r3, r2 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r2 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r5, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r13, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r4, r3 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r5, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r5, r3 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r6, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r14, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r5, r4 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r6, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r4 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r7, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r15, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r6, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r7, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r7, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r8, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r16, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r8, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r9, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r9, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r10, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r17, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r10, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r11, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r11, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r12, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r18, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r12, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r13, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r13, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r14, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r19, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r14, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r15, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r15, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r16, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r20, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r16, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r17, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r17, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r18, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r20, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r21, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r18, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r19, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r21, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r19, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r20, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r21, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r2, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r20, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r21, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r21, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r2, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r3, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r3, r5 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r4 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r28 \n\t" \
- \
- "ldi r28, 0 \n\t" \
- "mul r4, r5 \n\t" \
- "add r29, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "add r29, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "st z+, r29 \n\t" \
- \
- "mul r5, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r28 \n\t"
-
-#define FAST_SQUARE_ASM_24_TO_28 \
- "cpi r20, 24 \n\t" \
- "brne 1f \n\t" \
- "jmp 2f \n\t" \
- "1: \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "sbiw r26, 28 \n\t" \
- "sbiw r30, 24 \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- \
- "mul r2, r6 \n\t" \
- "mov r10, r0 \n\t" \
- "mov r11, r1 \n\t" \
- "mov r12, r25 \n\t" \
- "mov r13, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- \
- "mov r14, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- \
- "mov r15, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r16, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r17, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r18, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r19, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r21, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r22, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r23, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r24, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r28, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r29, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- \
- "lsl r10 \n\t" \
- "rol r11 \n\t" \
- "rol r12 \n\t" \
- "rol r13 \n\t" \
- "rol r14 \n\t" \
- "rol r15 \n\t" \
- "rol r16 \n\t" \
- "rol r17 \n\t" \
- "rol r18 \n\t" \
- "rol r19 \n\t" \
- "rol r21 \n\t" \
- "rol r22 \n\t" \
- "rol r23 \n\t" \
- "rol r24 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "ld r0, z \n\t" \
- "add r10, r0 \n\t" \
- "st z+, r10 \n\t" \
- "ld r0, z \n\t" \
- "adc r11, r0 \n\t" \
- "st z+, r11 \n\t" \
- "ld r0, z \n\t" \
- "adc r12, r0 \n\t" \
- "st z+, r12 \n\t" \
- "ld r0, z \n\t" \
- "adc r13, r0 \n\t" \
- "st z+, r13 \n\t" \
- "ld r0, z \n\t" \
- "adc r14, r0 \n\t" \
- "st z+, r14 \n\t" \
- "ld r0, z \n\t" \
- "adc r15, r0 \n\t" \
- "st z+, r15 \n\t" \
- "ld r0, z \n\t" \
- "adc r16, r0 \n\t" \
- "st z+, r16 \n\t" \
- "ld r0, z \n\t" \
- "adc r17, r0 \n\t" \
- "st z+, r17 \n\t" \
- "ld r0, z \n\t" \
- "adc r18, r0 \n\t" \
- "st z+, r18 \n\t" \
- "ld r0, z \n\t" \
- "adc r19, r0 \n\t" \
- "st z+, r19 \n\t" \
- "ld r0, z \n\t" \
- "adc r21, r0 \n\t" \
- "st z+, r21 \n\t" \
- "ld r0, z \n\t" \
- "adc r22, r0 \n\t" \
- "st z+, r22 \n\t" \
- "ld r0, z \n\t" \
- "adc r23, r0 \n\t" \
- "st z+, r23 \n\t" \
- "ld r0, z \n\t" \
- "adc r24, r0 \n\t" \
- "st z+, r24 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "bst r28, 0 \n\t" \
- "lsr r29 \n\t" \
- "ror r28 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r10, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r11, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r12, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r13, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r14, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r15, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r16, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r17, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r18, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r19, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- \
- "lsl r28 \n\t" \
- "bld r28, 0 \n\t" \
- "rol r29 \n\t" \
- "rol r10 \n\t" \
- "rol r11 \n\t" \
- "rol r12 \n\t" \
- "rol r13 \n\t" \
- "rol r14 \n\t" \
- "rol r15 \n\t" \
- "rol r16 \n\t" \
- "rol r17 \n\t" \
- "rol r18 \n\t" \
- "rol r19 \n\t" \
- "ld r0, z \n\t" \
- "add r28, r0 \n\t" \
- "st z+, r28 \n\t" \
- "ld r0, z \n\t" \
- "adc r29, r0 \n\t" \
- "st z+, r29 \n\t" \
- "ld r0, z \n\t" \
- "adc r10, r0 \n\t" \
- "st z+, r10 \n\t" \
- "ld r0, z \n\t" \
- "adc r11, r0 \n\t" \
- "st z+, r11 \n\t" \
- "ld r0, z \n\t" \
- "adc r12, r0 \n\t" \
- "st z+, r12 \n\t" \
- "ld r0, z \n\t" \
- "adc r13, r0 \n\t" \
- "st z+, r13 \n\t" \
- "ld r0, z \n\t" \
- "adc r14, r0 \n\t" \
- "st z+, r14 \n\t" \
- "ld r0, z \n\t" \
- "adc r15, r0 \n\t" \
- "st z+, r15 \n\t" \
- "ld r0, z \n\t" \
- "adc r16, r0 \n\t" \
- "st z+, r16 \n\t" \
- "ld r0, z \n\t" \
- "adc r17, r0 \n\t" \
- "st z+, r17 \n\t" \
- "adc r18, r25 \n\t" \
- "adc r19, r25 \n\t" \
- \
- "mul r2, r2 \n\t" \
- "mov r21, r0 \n\t" \
- "mov r22, r1 \n\t" \
- "mul r3, r3 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r4, r4 \n\t" \
- "mov r28, r0 \n\t" \
- "mov r29, r1 \n\t" \
- "mul r5, r5 \n\t" \
- "mov r10, r0 \n\t" \
- "mov r11, r1 \n\t" \
- "add r21, r18 \n\t" \
- "adc r22, r19 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- \
- "mul r7, r5 \n\t" \
- "mov r18, r0 \n\t" \
- "mov r19, r1 \n\t" \
- "mov r12, r25 \n\t" \
- "mul r8, r4 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r9, r3 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mov r13, r25 \n\t" \
- "mul r8, r5 \n\t" \
- "add r19, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r9, r4 \n\t" \
- "add r19, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r2, r3 \n\t" \
- "add r19, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mov r14, r25 \n\t" \
- "mul r9, r5 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r2, r4 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mov r15, r25 \n\t" \
- "mul r2, r5 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r3, r4 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mov r16, r25 \n\t" \
- "mul r3, r5 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r4, r5 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- \
- "lsl r18 \n\t" \
- "rol r19 \n\t" \
- "rol r12 \n\t" \
- "rol r13 \n\t" \
- "rol r14 \n\t" \
- "rol r15 \n\t" \
- "rol r16 \n\t" \
- "adc r11, r25 \n\t" \
- "add r21, r18 \n\t" \
- "adc r22, r19 \n\t" \
- "adc r23, r12 \n\t" \
- "adc r24, r13 \n\t" \
- "adc r28, r14 \n\t" \
- "adc r29, r15 \n\t" \
- "adc r10, r16 \n\t" \
- "adc r11, r25 \n\t" \
- \
- "st z+, r21 \n\t" \
- "st z+, r22 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r24 \n\t" \
- "st z+, r28 \n\t" \
- "st z+, r29 \n\t" \
- "st z+, r10 \n\t" \
- "st z+, r11 \n\t" \
- "adiw r26, 4 \n\t"
-
-#define FAST_SQUARE_ASM_28 \
- "ldi r25, 0 \n\t" \
- "movw r28, r26 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "adiw r28, 20 \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r15, y+ \n\t" \
- "adiw r30, 20 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul 2, 12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r4, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r5, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r3, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r4, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r24 \n\t" \
- \
- "sbiw r26, 8 \n\t" \
- "sbiw r30, 36 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r12, x+ \n\t" \
- "ld r13, x+ \n\t" \
- "ld r14, x+ \n\t" \
- "ld r15, x+ \n\t" \
- "ld r16, x+ \n\t" \
- "ld r17, x+ \n\t" \
- "ld r18, x+ \n\t" \
- "ld r19, x+ \n\t" \
- "ld r20, x+ \n\t" \
- "ld r21, x+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r2 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r3 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r6 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r4, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r7 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r8 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r5, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r10 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r6, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r11 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r7, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r8, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r9, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r10, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r11, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r12, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r3, r2 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r2 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r5, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r13, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r4, r3 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r5, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r5, r3 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r6, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r14, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r5, r4 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r6, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r4 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r7, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r15, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r6, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r7, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r7, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r8, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r16, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r7, r6 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r8, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r8, r6 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r9, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r17, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r8, r7 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r9, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r9, r7 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r10, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r18, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r9, r8 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r10, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r8 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r11, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r19, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r10, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r11, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r11, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r12, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r20, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r12, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r13, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r13, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r14, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r20, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r21, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r14, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r15, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r21, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r15, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r16, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r20, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r21, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r2, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r16, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r17, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r21, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r17, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r18, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r20, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r21, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r3, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r18, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r19, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r21, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r3, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r19, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r20, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r21, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r4, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r20, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r21, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r21, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r2, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r5, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r3, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r4, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r6, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r4, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r5, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r5, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r6, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r7, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r6, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r7, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r7, r9 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r8, r8 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r28 \n\t" \
- \
- "ldi r28, 0 \n\t" \
- "mul r8, r9 \n\t" \
- "add r29, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "add r29, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "st z+, r29 \n\t" \
- \
- "mul r9, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r28 \n\t"
-
-#define FAST_SQUARE_ASM_28_TO_32 \
- "cpi r20, 28 \n\t" \
- "brne 1f \n\t" \
- "jmp 2f \n\t" \
- "1: \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "sbiw r26, 32 \n\t" \
- "sbiw r30, 28 \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- \
- "mul r2, r6 \n\t" \
- "mov r10, r0 \n\t" \
- "mov r11, r1 \n\t" \
- "mov r12, r25 \n\t" \
- "mov r13, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- \
- "mov r14, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- \
- "mov r15, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r16, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r17, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r18, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r19, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r21, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r22, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r23, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r24, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r28, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r28, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r29, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r24, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- \
- "lsl r10 \n\t" \
- "rol r11 \n\t" \
- "rol r12 \n\t" \
- "rol r13 \n\t" \
- "rol r14 \n\t" \
- "rol r15 \n\t" \
- "rol r16 \n\t" \
- "rol r17 \n\t" \
- "rol r18 \n\t" \
- "rol r19 \n\t" \
- "rol r21 \n\t" \
- "rol r22 \n\t" \
- "rol r23 \n\t" \
- "rol r24 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "ld r0, z \n\t" \
- "add r10, r0 \n\t" \
- "st z+, r10 \n\t" \
- "ld r0, z \n\t" \
- "adc r11, r0 \n\t" \
- "st z+, r11 \n\t" \
- "ld r0, z \n\t" \
- "adc r12, r0 \n\t" \
- "st z+, r12 \n\t" \
- "ld r0, z \n\t" \
- "adc r13, r0 \n\t" \
- "st z+, r13 \n\t" \
- "ld r0, z \n\t" \
- "adc r14, r0 \n\t" \
- "st z+, r14 \n\t" \
- "ld r0, z \n\t" \
- "adc r15, r0 \n\t" \
- "st z+, r15 \n\t" \
- "ld r0, z \n\t" \
- "adc r16, r0 \n\t" \
- "st z+, r16 \n\t" \
- "ld r0, z \n\t" \
- "adc r17, r0 \n\t" \
- "st z+, r17 \n\t" \
- "ld r0, z \n\t" \
- "adc r18, r0 \n\t" \
- "st z+, r18 \n\t" \
- "ld r0, z \n\t" \
- "adc r19, r0 \n\t" \
- "st z+, r19 \n\t" \
- "ld r0, z \n\t" \
- "adc r21, r0 \n\t" \
- "st z+, r21 \n\t" \
- "ld r0, z \n\t" \
- "adc r22, r0 \n\t" \
- "st z+, r22 \n\t" \
- "ld r0, z \n\t" \
- "adc r23, r0 \n\t" \
- "st z+, r23 \n\t" \
- "ld r0, z \n\t" \
- "adc r24, r0 \n\t" \
- "st z+, r24 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "bst r28, 0 \n\t" \
- "lsr r29 \n\t" \
- "ror r28 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r10, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r10, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r11, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r29, r0 \n\t" \
- "adc r10, r1 \n\t" \
- "adc r11, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r12, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r10, r0 \n\t" \
- "adc r11, r1 \n\t" \
- "adc r12, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r13, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r11, r0 \n\t" \
- "adc r12, r1 \n\t" \
- "adc r13, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r14, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r12, r0 \n\t" \
- "adc r13, r1 \n\t" \
- "adc r14, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r15, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r13, r0 \n\t" \
- "adc r14, r1 \n\t" \
- "adc r15, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r16, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r14, r0 \n\t" \
- "adc r15, r1 \n\t" \
- "adc r16, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r17, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r15, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r18, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r19, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "mov r21, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "mov r22, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- "adc r22, r25 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "mov r23, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r21, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "mov r24, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- \
- "lsl r28 \n\t" \
- "bld r28, 0 \n\t" \
- "rol r29 \n\t" \
- "rol r10 \n\t" \
- "rol r11 \n\t" \
- "rol r12 \n\t" \
- "rol r13 \n\t" \
- "rol r14 \n\t" \
- "rol r15 \n\t" \
- "rol r16 \n\t" \
- "rol r17 \n\t" \
- "rol r18 \n\t" \
- "rol r19 \n\t" \
- "rol r21 \n\t" \
- "rol r22 \n\t" \
- "rol r23 \n\t" \
- "rol r24 \n\t" \
- "ld r0, z \n\t" \
- "add r28, r0 \n\t" \
- "st z+, r28 \n\t" \
- "ld r0, z \n\t" \
- "adc r29, r0 \n\t" \
- "st z+, r29 \n\t" \
- "ld r0, z \n\t" \
- "adc r10, r0 \n\t" \
- "st z+, r10 \n\t" \
- "ld r0, z \n\t" \
- "adc r11, r0 \n\t" \
- "st z+, r11 \n\t" \
- "ld r0, z \n\t" \
- "adc r12, r0 \n\t" \
- "st z+, r12 \n\t" \
- "ld r0, z \n\t" \
- "adc r13, r0 \n\t" \
- "st z+, r13 \n\t" \
- "ld r0, z \n\t" \
- "adc r14, r0 \n\t" \
- "st z+, r14 \n\t" \
- "ld r0, z \n\t" \
- "adc r15, r0 \n\t" \
- "st z+, r15 \n\t" \
- "ld r0, z \n\t" \
- "adc r16, r0 \n\t" \
- "st z+, r16 \n\t" \
- "ld r0, z \n\t" \
- "adc r17, r0 \n\t" \
- "st z+, r17 \n\t" \
- "ld r0, z \n\t" \
- "adc r18, r0 \n\t" \
- "st z+, r18 \n\t" \
- "ld r0, z \n\t" \
- "adc r19, r0 \n\t" \
- "st z+, r19 \n\t" \
- "ld r0, z \n\t" \
- "adc r21, r0 \n\t" \
- "st z+, r21 \n\t" \
- "ld r0, z \n\t" \
- "adc r22, r0 \n\t" \
- "st z+, r22 \n\t" \
- "adc r23, r25 \n\t" \
- "adc r24, r25 \n\t" \
- \
- "mul r2, r2 \n\t" \
- "mov r28, r0 \n\t" \
- "mov r29, r1 \n\t" \
- "mul r3, r3 \n\t" \
- "mov r10, r0 \n\t" \
- "mov r11, r1 \n\t" \
- "mul r4, r4 \n\t" \
- "mov r12, r0 \n\t" \
- "mov r13, r1 \n\t" \
- "mul r5, r5 \n\t" \
- "mov r14, r0 \n\t" \
- "mov r15, r1 \n\t" \
- "add r28, r23 \n\t" \
- "adc r29, r24 \n\t" \
- "adc r10, r25 \n\t" \
- "adc r11, r25 \n\t" \
- \
- "mul r7, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mov r16, r25 \n\t" \
- "mul r8, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mul r9, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r16, r25 \n\t" \
- "mov r17, r25 \n\t" \
- "mul r8, r5 \n\t" \
- "add r24, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r9, r4 \n\t" \
- "add r24, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mul r2, r3 \n\t" \
- "add r24, r0 \n\t" \
- "adc r16, r1 \n\t" \
- "adc r17, r25 \n\t" \
- "mov r18, r25 \n\t" \
- "mul r9, r5 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mul r2, r4 \n\t" \
- "add r16, r0 \n\t" \
- "adc r17, r1 \n\t" \
- "adc r18, r25 \n\t" \
- "mov r19, r25 \n\t" \
- "mul r2, r5 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mul r3, r4 \n\t" \
- "add r17, r0 \n\t" \
- "adc r18, r1 \n\t" \
- "adc r19, r25 \n\t" \
- "mov r21, r25 \n\t" \
- "mul r3, r5 \n\t" \
- "add r18, r0 \n\t" \
- "adc r19, r1 \n\t" \
- "adc r21, r25 \n\t" \
- "mul r4, r5 \n\t" \
- "add r19, r0 \n\t" \
- "adc r21, r1 \n\t" \
- \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r16 \n\t" \
- "rol r17 \n\t" \
- "rol r18 \n\t" \
- "rol r19 \n\t" \
- "rol r21 \n\t" \
- "adc r15, r25 \n\t" \
- "add r28, r23 \n\t" \
- "adc r29, r24 \n\t" \
- "adc r10, r16 \n\t" \
- "adc r11, r17 \n\t" \
- "adc r12, r18 \n\t" \
- "adc r13, r19 \n\t" \
- "adc r14, r21 \n\t" \
- "adc r15, r25 \n\t" \
- \
- "st z+, r28 \n\t" \
- "st z+, r29 \n\t" \
- "st z+, r10 \n\t" \
- "st z+, r11 \n\t" \
- "st z+, r12 \n\t" \
- "st z+, r13 \n\t" \
- "st z+, r14 \n\t" \
- "st z+, r15 \n\t" \
- "adiw r26, 4 \n\t"
-
-#define FAST_SQUARE_ASM_32 \
- "ldi r25, 0 \n\t" \
- "movw r28, r26 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "adiw r28, 20 \n\t" \
- "ld r12, y+ \n\t" \
- "ld r13, y+ \n\t" \
- "ld r14, y+ \n\t" \
- "ld r15, y+ \n\t" \
- "ld r16, y+ \n\t" \
- "ld r17, y+ \n\t" \
- "adiw r30, 20 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul 2, 12 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r12, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r13, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r14, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r15, y+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r16, y+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r17, y+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r12 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r13 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r23, 0 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r2, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r3, r14 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r24, 0 \n\t" \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r2, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r3, r15 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r3, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r4, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r6, r17 \n\t" \
- "add r24, r0 \n\t" \
- "adc r22, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r24 \n\t" \
- \
- "mul r7, r17 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "st z+, r22 \n\t" \
- "st z+, r23 \n\t" \
- \
- "sbiw r26, 12 \n\t" \
- "sbiw r30, 44 \n\t" \
- "ld r2, x+ \n\t" \
- "ld r3, x+ \n\t" \
- "ld r4, x+ \n\t" \
- "ld r5, x+ \n\t" \
- "ld r6, x+ \n\t" \
- "ld r7, x+ \n\t" \
- "ld r8, x+ \n\t" \
- "ld r9, x+ \n\t" \
- "ld r10, x+ \n\t" \
- "ld r11, x+ \n\t" \
- "ld r12, x+ \n\t" \
- "ld r13, x+ \n\t" \
- "ld r14, x+ \n\t" \
- "ld r15, x+ \n\t" \
- "ld r16, x+ \n\t" \
- "ld r17, x+ \n\t" \
- "ld r18, x+ \n\t" \
- "ld r19, x+ \n\t" \
- "ld r20, x+ \n\t" \
- "ld r21, x+ \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r2, r2 \n\t" \
- "st z+, r0 \n\t" \
- "mov r22, r1 \n\t" \
- \
- "ldi r24, 0 \n\t" \
- "mul r2, r3 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "add r22, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r24, r25 \n\t" \
- "st z+, r22 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r6 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r4, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r7 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r8 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r5, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r10 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r6, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r11 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r12 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r7, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r14 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r8, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r15 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r16 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r9, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r17 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r18 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r10, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r19 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r2, r20 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r3, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r11, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r2, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r3, r21 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r4, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r12, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r3, r2 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r4, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r3, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r4, r2 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r5, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r13, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r4, r3 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r5, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r4, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r5, r3 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r6, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r14, r14 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r5, r4 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r6, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r5, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r6, r4 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r7, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r15, r15 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r6, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r7, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r6, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r7, r5 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r8, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r16, r16 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r7, r6 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r8, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r7, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r8, r6 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r9, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r10, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r17, r17 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r8, r7 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r9, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r8, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r9, r7 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r10, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r11, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r18, r18 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r9, r8 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r10, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r11, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r9, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r10, r8 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r11, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r12, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r19, r19 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r10, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r11, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r12, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r10, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r11, r9 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r12, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r13, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r20, r20 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r11, r10 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r12, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r13, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r11, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r12, r10 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r13, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r14, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r20, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r21, r21 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r12, r11 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r13, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r14, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r21, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r12, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r13, r11 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r14, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r15, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r20, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r21, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r2, r2 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r13, r12 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r14, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r15, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r21, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ld r13, x+ \n\t" \
- "ldi r22, 0 \n\t" \
- "mul r14, r12 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r15, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r16, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r20, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r21, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r25 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r3, r3 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r14, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r15, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r16, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r17, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r21, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r3, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "ld r0, z \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r25 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r15, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r16, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r17, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r18, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r20, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r21, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r4, r4 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r16, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r17, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r18, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r19, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r21, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r3, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r17, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r18, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r19, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r20, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r21, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r5, r5 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r18, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r19, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r20, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r21, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r3, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r19, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r20, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r21, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r2, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r6, r6 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r20, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r21, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r2, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r3, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r21, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r2, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r3, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r4, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r7, r7 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r2, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r3, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r4, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r5, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r3, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r4, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r5, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r6, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r8, r8 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r4, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r5, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r6, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r7, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r5, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r6, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r7, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r8, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r9, r9 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r6, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r7, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r8, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r9, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r7, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r8, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "mul r9, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r10, r10 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r8, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r9, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "mul r10, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r22, 0 \n\t" \
- "mul r9, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r24, r1 \n\t" \
- "mul r10, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r24 \n\t" \
- "rol r22 \n\t" \
- "mul r11, r11 \n\t" \
- "add r23, r0 \n\t" \
- "adc r24, r1 \n\t" \
- "adc r22, r25 \n\t" \
- "add r23, r28 \n\t" \
- "adc r24, r29 \n\t" \
- "adc r22, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r29, 0 \n\t" \
- "mul r10, r13 \n\t" \
- "mov r23, r0 \n\t" \
- "mov r28, r1 \n\t" \
- "mul r11, r12 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "adc r29, r25 \n\t" \
- "lsl r23 \n\t" \
- "rol r28 \n\t" \
- "rol r29 \n\t" \
- "add r23, r24 \n\t" \
- "adc r28, r22 \n\t" \
- "adc r29, r25 \n\t" \
- "st z+, r23 \n\t" \
- \
- "ldi r23, 0 \n\t" \
- "mul r11, r13 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "mul r12, r12 \n\t" \
- "add r28, r0 \n\t" \
- "adc r29, r1 \n\t" \
- "adc r23, r25 \n\t" \
- "st z+, r28 \n\t" \
- \
- "ldi r28, 0 \n\t" \
- "mul r12, r13 \n\t" \
- "add r29, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "add r29, r0 \n\t" \
- "adc r23, r1 \n\t" \
- "adc r28, r25 \n\t" \
- "st z+, r29 \n\t" \
- \
- "mul r13, r13 \n\t" \
- "add r23, r0 \n\t" \
- "adc r28, r1 \n\t" \
- "st z+, r23 \n\t" \
- "st z+, r28 \n\t"
-
-#endif /* _UECC_ASM_AVR_MULT_SQUARE_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/curve-specific.inc b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/curve-specific.inc
deleted file mode 100644
index 0453b212c..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/curve-specific.inc
+++ /dev/null
@@ -1,1248 +0,0 @@
-/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_CURVE_SPECIFIC_H_
-#define _UECC_CURVE_SPECIFIC_H_
-
-#define num_bytes_secp160r1 20
-#define num_bytes_secp192r1 24
-#define num_bytes_secp224r1 28
-#define num_bytes_secp256r1 32
-#define num_bytes_secp256k1 32
-
-#if (uECC_WORD_SIZE == 1)
-
-#define num_words_secp160r1 20
-#define num_words_secp192r1 24
-#define num_words_secp224r1 28
-#define num_words_secp256r1 32
-#define num_words_secp256k1 32
-
-#define BYTES_TO_WORDS_8(a, b, c, d, e, f, g, h) \
- 0x##a, 0x##b, 0x##c, 0x##d, 0x##e, 0x##f, 0x##g, 0x##h
-#define BYTES_TO_WORDS_4(a, b, c, d) 0x##a, 0x##b, 0x##c, 0x##d
-
-#elif (uECC_WORD_SIZE == 4)
-
-#define num_words_secp160r1 5
-#define num_words_secp192r1 6
-#define num_words_secp224r1 7
-#define num_words_secp256r1 8
-#define num_words_secp256k1 8
-
-#define BYTES_TO_WORDS_8(a, b, c, d, e, f, g, h) 0x##d##c##b##a, 0x##h##g##f##e
-#define BYTES_TO_WORDS_4(a, b, c, d) 0x##d##c##b##a
-
-#elif (uECC_WORD_SIZE == 8)
-
-#define num_words_secp160r1 3
-#define num_words_secp192r1 3
-#define num_words_secp224r1 4
-#define num_words_secp256r1 4
-#define num_words_secp256k1 4
-
-#define BYTES_TO_WORDS_8(a, b, c, d, e, f, g, h) 0x##h##g##f##e##d##c##b##a##ull
-#define BYTES_TO_WORDS_4(a, b, c, d) 0x##d##c##b##a##ull
-
-#endif /* uECC_WORD_SIZE */
-
-#if uECC_SUPPORTS_secp160r1 || uECC_SUPPORTS_secp192r1 || \
- uECC_SUPPORTS_secp224r1 || uECC_SUPPORTS_secp256r1
-static void double_jacobian_default(uECC_word_t * X1,
- uECC_word_t * Y1,
- uECC_word_t * Z1,
- uECC_Curve curve) {
- /* t1 = X, t2 = Y, t3 = Z */
- uECC_word_t t4[uECC_MAX_WORDS];
- uECC_word_t t5[uECC_MAX_WORDS];
- wordcount_t num_words = curve->num_words;
-
- if (uECC_vli_isZero(Z1, num_words)) {
- return;
- }
-
- uECC_vli_modSquare_fast(t4, Y1, curve); /* t4 = y1^2 */
- uECC_vli_modMult_fast(t5, X1, t4, curve); /* t5 = x1*y1^2 = A */
- uECC_vli_modSquare_fast(t4, t4, curve); /* t4 = y1^4 */
- uECC_vli_modMult_fast(Y1, Y1, Z1, curve); /* t2 = y1*z1 = z3 */
- uECC_vli_modSquare_fast(Z1, Z1, curve); /* t3 = z1^2 */
-
- uECC_vli_modAdd(X1, X1, Z1, curve->p, num_words); /* t1 = x1 + z1^2 */
- uECC_vli_modAdd(Z1, Z1, Z1, curve->p, num_words); /* t3 = 2*z1^2 */
- uECC_vli_modSub(Z1, X1, Z1, curve->p, num_words); /* t3 = x1 - z1^2 */
- uECC_vli_modMult_fast(X1, X1, Z1, curve); /* t1 = x1^2 - z1^4 */
-
- uECC_vli_modAdd(Z1, X1, X1, curve->p, num_words); /* t3 = 2*(x1^2 - z1^4) */
- uECC_vli_modAdd(X1, X1, Z1, curve->p, num_words); /* t1 = 3*(x1^2 - z1^4) */
- if (uECC_vli_testBit(X1, 0)) {
- uECC_word_t l_carry = uECC_vli_add(X1, X1, curve->p, num_words);
- uECC_vli_rshift1(X1, num_words);
- X1[num_words - 1] |= l_carry << (uECC_WORD_BITS - 1);
- } else {
- uECC_vli_rshift1(X1, num_words);
- }
- /* t1 = 3/2*(x1^2 - z1^4) = B */
-
- uECC_vli_modSquare_fast(Z1, X1, curve); /* t3 = B^2 */
- uECC_vli_modSub(Z1, Z1, t5, curve->p, num_words); /* t3 = B^2 - A */
- uECC_vli_modSub(Z1, Z1, t5, curve->p, num_words); /* t3 = B^2 - 2A = x3 */
- uECC_vli_modSub(t5, t5, Z1, curve->p, num_words); /* t5 = A - x3 */
- uECC_vli_modMult_fast(X1, X1, t5, curve); /* t1 = B * (A - x3) */
- uECC_vli_modSub(t4, X1, t4, curve->p, num_words); /* t4 = B * (A - x3) - y1^4 = y3 */
-
- uECC_vli_set(X1, Z1, num_words);
- uECC_vli_set(Z1, Y1, num_words);
- uECC_vli_set(Y1, t4, num_words);
-}
-
-/* Computes result = x^3 + ax + b. result must not overlap x. */
-static void x_side_default(uECC_word_t *result, const uECC_word_t *x, uECC_Curve curve) {
- uECC_word_t _3[uECC_MAX_WORDS] = {3}; /* -a = 3 */
- wordcount_t num_words = curve->num_words;
-
- uECC_vli_modSquare_fast(result, x, curve); /* r = x^2 */
- uECC_vli_modSub(result, result, _3, curve->p, num_words); /* r = x^2 - 3 */
- uECC_vli_modMult_fast(result, result, x, curve); /* r = x^3 - 3x */
- uECC_vli_modAdd(result, result, curve->b, curve->p, num_words); /* r = x^3 - 3x + b */
-}
-#endif /* uECC_SUPPORTS_secp... */
-
-#if uECC_SUPPORT_COMPRESSED_POINT
-#if uECC_SUPPORTS_secp160r1 || uECC_SUPPORTS_secp192r1 || \
- uECC_SUPPORTS_secp256r1 || uECC_SUPPORTS_secp256k1
-/* Compute a = sqrt(a) (mod curve_p). */
-static void mod_sqrt_default(uECC_word_t *a, uECC_Curve curve) {
- bitcount_t i;
- uECC_word_t p1[uECC_MAX_WORDS] = {1};
- uECC_word_t l_result[uECC_MAX_WORDS] = {1};
- wordcount_t num_words = curve->num_words;
-
- /* When curve->p == 3 (mod 4), we can compute
- sqrt(a) = a^((curve->p + 1) / 4) (mod curve->p). */
- uECC_vli_add(p1, curve->p, p1, num_words); /* p1 = curve_p + 1 */
- for (i = uECC_vli_numBits(p1, num_words) - 1; i > 1; --i) {
- uECC_vli_modSquare_fast(l_result, l_result, curve);
- if (uECC_vli_testBit(p1, i)) {
- uECC_vli_modMult_fast(l_result, l_result, a, curve);
- }
- }
- uECC_vli_set(a, l_result, num_words);
-}
-#endif /* uECC_SUPPORTS_secp... */
-#endif /* uECC_SUPPORT_COMPRESSED_POINT */
-
-#if uECC_SUPPORTS_secp160r1
-
-#if (uECC_OPTIMIZATION_LEVEL > 0)
-static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product);
-#endif
-
-static const struct uECC_Curve_t curve_secp160r1 = {
- num_words_secp160r1,
- num_bytes_secp160r1,
- 161, /* num_n_bits */
- { BYTES_TO_WORDS_8(FF, FF, FF, 7F, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_4(FF, FF, FF, FF) },
- { BYTES_TO_WORDS_8(57, 22, 75, CA, D3, AE, 27, F9),
- BYTES_TO_WORDS_8(C8, F4, 01, 00, 00, 00, 00, 00),
- BYTES_TO_WORDS_8(00, 00, 00, 00, 01, 00, 00, 00) },
- { BYTES_TO_WORDS_8(82, FC, CB, 13, B9, 8B, C3, 68),
- BYTES_TO_WORDS_8(89, 69, 64, 46, 28, 73, F5, 8E),
- BYTES_TO_WORDS_4(68, B5, 96, 4A),
-
- BYTES_TO_WORDS_8(32, FB, C5, 7A, 37, 51, 23, 04),
- BYTES_TO_WORDS_8(12, C9, DC, 59, 7D, 94, 68, 31),
- BYTES_TO_WORDS_4(55, 28, A6, 23) },
- { BYTES_TO_WORDS_8(45, FA, 65, C5, AD, D4, D4, 81),
- BYTES_TO_WORDS_8(9F, F8, AC, 65, 8B, 7A, BD, 54),
- BYTES_TO_WORDS_4(FC, BE, 97, 1C) },
- &double_jacobian_default,
-#if uECC_SUPPORT_COMPRESSED_POINT
- &mod_sqrt_default,
-#endif
- &x_side_default,
-#if (uECC_OPTIMIZATION_LEVEL > 0)
- &vli_mmod_fast_secp160r1
-#endif
-};
-
-uECC_Curve uECC_secp160r1(void) { return &curve_secp160r1; }
-
-#if (uECC_OPTIMIZATION_LEVEL > 0 && !asm_mmod_fast_secp160r1)
-/* Computes result = product % curve_p
- see http://www.isys.uni-klu.ac.at/PDF/2001-0126-MT.pdf page 354
-
- Note that this only works if log2(omega) < log2(p) / 2 */
-static void omega_mult_secp160r1(uECC_word_t *result, const uECC_word_t *right);
-#if uECC_WORD_SIZE == 8
-static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product) {
- uECC_word_t tmp[2 * num_words_secp160r1];
- uECC_word_t copy;
-
- uECC_vli_clear(tmp, num_words_secp160r1);
- uECC_vli_clear(tmp + num_words_secp160r1, num_words_secp160r1);
-
- omega_mult_secp160r1(tmp, product + num_words_secp160r1 - 1); /* (Rq, q) = q * c */
-
- product[num_words_secp160r1 - 1] &= 0xffffffff;
- copy = tmp[num_words_secp160r1 - 1];
- tmp[num_words_secp160r1 - 1] &= 0xffffffff;
- uECC_vli_add(result, product, tmp, num_words_secp160r1); /* (C, r) = r + q */
- uECC_vli_clear(product, num_words_secp160r1);
- tmp[num_words_secp160r1 - 1] = copy;
- omega_mult_secp160r1(product, tmp + num_words_secp160r1 - 1); /* Rq*c */
- uECC_vli_add(result, result, product, num_words_secp160r1); /* (C1, r) = r + Rq*c */
-
- while (uECC_vli_cmp_unsafe(result, curve_secp160r1.p, num_words_secp160r1) > 0) {
- uECC_vli_sub(result, result, curve_secp160r1.p, num_words_secp160r1);
- }
-}
-
-static void omega_mult_secp160r1(uint64_t *result, const uint64_t *right) {
- uint32_t carry;
- unsigned i;
-
- /* Multiply by (2^31 + 1). */
- carry = 0;
- for (i = 0; i < num_words_secp160r1; ++i) {
- uint64_t tmp = (right[i] >> 32) | (right[i + 1] << 32);
- result[i] = (tmp << 31) + tmp + carry;
- carry = (tmp >> 33) + (result[i] < tmp || (carry && result[i] == tmp));
- }
- result[i] = carry;
-}
-#else
-static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product) {
- uECC_word_t tmp[2 * num_words_secp160r1];
- uECC_word_t carry;
-
- uECC_vli_clear(tmp, num_words_secp160r1);
- uECC_vli_clear(tmp + num_words_secp160r1, num_words_secp160r1);
-
- omega_mult_secp160r1(tmp, product + num_words_secp160r1); /* (Rq, q) = q * c */
-
- carry = uECC_vli_add(result, product, tmp, num_words_secp160r1); /* (C, r) = r + q */
- uECC_vli_clear(product, num_words_secp160r1);
- omega_mult_secp160r1(product, tmp + num_words_secp160r1); /* Rq*c */
- carry += uECC_vli_add(result, result, product, num_words_secp160r1); /* (C1, r) = r + Rq*c */
-
- while (carry > 0) {
- --carry;
- uECC_vli_sub(result, result, curve_secp160r1.p, num_words_secp160r1);
- }
- if (uECC_vli_cmp_unsafe(result, curve_secp160r1.p, num_words_secp160r1) > 0) {
- uECC_vli_sub(result, result, curve_secp160r1.p, num_words_secp160r1);
- }
-}
-#endif
-
-#if uECC_WORD_SIZE == 1
-static void omega_mult_secp160r1(uint8_t *result, const uint8_t *right) {
- uint8_t carry;
- uint8_t i;
-
- /* Multiply by (2^31 + 1). */
- uECC_vli_set(result + 4, right, num_words_secp160r1); /* 2^32 */
- uECC_vli_rshift1(result + 4, num_words_secp160r1); /* 2^31 */
- result[3] = right[0] << 7; /* get last bit from shift */
-
- carry = uECC_vli_add(result, result, right, num_words_secp160r1); /* 2^31 + 1 */
- for (i = num_words_secp160r1; carry; ++i) {
- uint16_t sum = (uint16_t)result[i] + carry;
- result[i] = (uint8_t)sum;
- carry = sum >> 8;
- }
-}
-#elif uECC_WORD_SIZE == 4
-static void omega_mult_secp160r1(uint32_t *result, const uint32_t *right) {
- uint32_t carry;
- unsigned i;
-
- /* Multiply by (2^31 + 1). */
- uECC_vli_set(result + 1, right, num_words_secp160r1); /* 2^32 */
- uECC_vli_rshift1(result + 1, num_words_secp160r1); /* 2^31 */
- result[0] = right[0] << 31; /* get last bit from shift */
-
- carry = uECC_vli_add(result, result, right, num_words_secp160r1); /* 2^31 + 1 */
- for (i = num_words_secp160r1; carry; ++i) {
- uint64_t sum = (uint64_t)result[i] + carry;
- result[i] = (uint32_t)sum;
- carry = sum >> 32;
- }
-}
-#endif /* uECC_WORD_SIZE */
-#endif /* (uECC_OPTIMIZATION_LEVEL > 0 && !asm_mmod_fast_secp160r1) */
-
-#endif /* uECC_SUPPORTS_secp160r1 */
-
-#if uECC_SUPPORTS_secp192r1
-
-#if (uECC_OPTIMIZATION_LEVEL > 0)
-static void vli_mmod_fast_secp192r1(uECC_word_t *result, uECC_word_t *product);
-#endif
-
-static const struct uECC_Curve_t curve_secp192r1 = {
- num_words_secp192r1,
- num_bytes_secp192r1,
- 192, /* num_n_bits */
- { BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(FE, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF) },
- { BYTES_TO_WORDS_8(31, 28, D2, B4, B1, C9, 6B, 14),
- BYTES_TO_WORDS_8(36, F8, DE, 99, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF) },
- { BYTES_TO_WORDS_8(12, 10, FF, 82, FD, 0A, FF, F4),
- BYTES_TO_WORDS_8(00, 88, A1, 43, EB, 20, BF, 7C),
- BYTES_TO_WORDS_8(F6, 90, 30, B0, 0E, A8, 8D, 18),
-
- BYTES_TO_WORDS_8(11, 48, 79, 1E, A1, 77, F9, 73),
- BYTES_TO_WORDS_8(D5, CD, 24, 6B, ED, 11, 10, 63),
- BYTES_TO_WORDS_8(78, DA, C8, FF, 95, 2B, 19, 07) },
- { BYTES_TO_WORDS_8(B1, B9, 46, C1, EC, DE, B8, FE),
- BYTES_TO_WORDS_8(49, 30, 24, 72, AB, E9, A7, 0F),
- BYTES_TO_WORDS_8(E7, 80, 9C, E5, 19, 05, 21, 64) },
- &double_jacobian_default,
-#if uECC_SUPPORT_COMPRESSED_POINT
- &mod_sqrt_default,
-#endif
- &x_side_default,
-#if (uECC_OPTIMIZATION_LEVEL > 0)
- &vli_mmod_fast_secp192r1
-#endif
-};
-
-uECC_Curve uECC_secp192r1(void) { return &curve_secp192r1; }
-
-#if (uECC_OPTIMIZATION_LEVEL > 0)
-/* Computes result = product % curve_p.
- See algorithm 5 and 6 from http://www.isys.uni-klu.ac.at/PDF/2001-0126-MT.pdf */
-#if uECC_WORD_SIZE == 1
-static void vli_mmod_fast_secp192r1(uint8_t *result, uint8_t *product) {
- uint8_t tmp[num_words_secp192r1];
- uint8_t carry;
-
- uECC_vli_set(result, product, num_words_secp192r1);
-
- uECC_vli_set(tmp, &product[24], num_words_secp192r1);
- carry = uECC_vli_add(result, result, tmp, num_words_secp192r1);
-
- tmp[0] = tmp[1] = tmp[2] = tmp[3] = tmp[4] = tmp[5] = tmp[6] = tmp[7] = 0;
- tmp[8] = product[24]; tmp[9] = product[25]; tmp[10] = product[26]; tmp[11] = product[27];
- tmp[12] = product[28]; tmp[13] = product[29]; tmp[14] = product[30]; tmp[15] = product[31];
- tmp[16] = product[32]; tmp[17] = product[33]; tmp[18] = product[34]; tmp[19] = product[35];
- tmp[20] = product[36]; tmp[21] = product[37]; tmp[22] = product[38]; tmp[23] = product[39];
- carry += uECC_vli_add(result, result, tmp, num_words_secp192r1);
-
- tmp[0] = tmp[8] = product[40];
- tmp[1] = tmp[9] = product[41];
- tmp[2] = tmp[10] = product[42];
- tmp[3] = tmp[11] = product[43];
- tmp[4] = tmp[12] = product[44];
- tmp[5] = tmp[13] = product[45];
- tmp[6] = tmp[14] = product[46];
- tmp[7] = tmp[15] = product[47];
- tmp[16] = tmp[17] = tmp[18] = tmp[19] = tmp[20] = tmp[21] = tmp[22] = tmp[23] = 0;
- carry += uECC_vli_add(result, result, tmp, num_words_secp192r1);
-
- while (carry || uECC_vli_cmp_unsafe(curve_secp192r1.p, result, num_words_secp192r1) != 1) {
- carry -= uECC_vli_sub(result, result, curve_secp192r1.p, num_words_secp192r1);
- }
-}
-#elif uECC_WORD_SIZE == 4
-static void vli_mmod_fast_secp192r1(uint32_t *result, uint32_t *product) {
- uint32_t tmp[num_words_secp192r1];
- int carry;
-
- uECC_vli_set(result, product, num_words_secp192r1);
-
- uECC_vli_set(tmp, &product[6], num_words_secp192r1);
- carry = uECC_vli_add(result, result, tmp, num_words_secp192r1);
-
- tmp[0] = tmp[1] = 0;
- tmp[2] = product[6];
- tmp[3] = product[7];
- tmp[4] = product[8];
- tmp[5] = product[9];
- carry += uECC_vli_add(result, result, tmp, num_words_secp192r1);
-
- tmp[0] = tmp[2] = product[10];
- tmp[1] = tmp[3] = product[11];
- tmp[4] = tmp[5] = 0;
- carry += uECC_vli_add(result, result, tmp, num_words_secp192r1);
-
- while (carry || uECC_vli_cmp_unsafe(curve_secp192r1.p, result, num_words_secp192r1) != 1) {
- carry -= uECC_vli_sub(result, result, curve_secp192r1.p, num_words_secp192r1);
- }
-}
-#else
-static void vli_mmod_fast_secp192r1(uint64_t *result, uint64_t *product) {
- uint64_t tmp[num_words_secp192r1];
- int carry;
-
- uECC_vli_set(result, product, num_words_secp192r1);
-
- uECC_vli_set(tmp, &product[3], num_words_secp192r1);
- carry = (int)uECC_vli_add(result, result, tmp, num_words_secp192r1);
-
- tmp[0] = 0;
- tmp[1] = product[3];
- tmp[2] = product[4];
- carry += uECC_vli_add(result, result, tmp, num_words_secp192r1);
-
- tmp[0] = tmp[1] = product[5];
- tmp[2] = 0;
- carry += uECC_vli_add(result, result, tmp, num_words_secp192r1);
-
- while (carry || uECC_vli_cmp_unsafe(curve_secp192r1.p, result, num_words_secp192r1) != 1) {
- carry -= uECC_vli_sub(result, result, curve_secp192r1.p, num_words_secp192r1);
- }
-}
-#endif /* uECC_WORD_SIZE */
-#endif /* (uECC_OPTIMIZATION_LEVEL > 0) */
-
-#endif /* uECC_SUPPORTS_secp192r1 */
-
-#if uECC_SUPPORTS_secp224r1
-
-#if uECC_SUPPORT_COMPRESSED_POINT
-static void mod_sqrt_secp224r1(uECC_word_t *a, uECC_Curve curve);
-#endif
-#if (uECC_OPTIMIZATION_LEVEL > 0)
-static void vli_mmod_fast_secp224r1(uECC_word_t *result, uECC_word_t *product);
-#endif
-
-static const struct uECC_Curve_t curve_secp224r1 = {
- num_words_secp224r1,
- num_bytes_secp224r1,
- 224, /* num_n_bits */
- { BYTES_TO_WORDS_8(01, 00, 00, 00, 00, 00, 00, 00),
- BYTES_TO_WORDS_8(00, 00, 00, 00, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_4(FF, FF, FF, FF) },
- { BYTES_TO_WORDS_8(3D, 2A, 5C, 5C, 45, 29, DD, 13),
- BYTES_TO_WORDS_8(3E, F0, B8, E0, A2, 16, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_4(FF, FF, FF, FF) },
- { BYTES_TO_WORDS_8(21, 1D, 5C, 11, D6, 80, 32, 34),
- BYTES_TO_WORDS_8(22, 11, C2, 56, D3, C1, 03, 4A),
- BYTES_TO_WORDS_8(B9, 90, 13, 32, 7F, BF, B4, 6B),
- BYTES_TO_WORDS_4(BD, 0C, 0E, B7),
-
- BYTES_TO_WORDS_8(34, 7E, 00, 85, 99, 81, D5, 44),
- BYTES_TO_WORDS_8(64, 47, 07, 5A, A0, 75, 43, CD),
- BYTES_TO_WORDS_8(E6, DF, 22, 4C, FB, 23, F7, B5),
- BYTES_TO_WORDS_4(88, 63, 37, BD) },
- { BYTES_TO_WORDS_8(B4, FF, 55, 23, 43, 39, 0B, 27),
- BYTES_TO_WORDS_8(BA, D8, BF, D7, B7, B0, 44, 50),
- BYTES_TO_WORDS_8(56, 32, 41, F5, AB, B3, 04, 0C),
- BYTES_TO_WORDS_4(85, 0A, 05, B4) },
- &double_jacobian_default,
-#if uECC_SUPPORT_COMPRESSED_POINT
- &mod_sqrt_secp224r1,
-#endif
- &x_side_default,
-#if (uECC_OPTIMIZATION_LEVEL > 0)
- &vli_mmod_fast_secp224r1
-#endif
-};
-
-uECC_Curve uECC_secp224r1(void) { return &curve_secp224r1; }
-
-
-#if uECC_SUPPORT_COMPRESSED_POINT
-/* Routine 3.2.4 RS; from http://www.nsa.gov/ia/_files/nist-routines.pdf */
-static void mod_sqrt_secp224r1_rs(uECC_word_t *d1,
- uECC_word_t *e1,
- uECC_word_t *f1,
- const uECC_word_t *d0,
- const uECC_word_t *e0,
- const uECC_word_t *f0) {
- uECC_word_t t[num_words_secp224r1];
-
- uECC_vli_modSquare_fast(t, d0, &curve_secp224r1); /* t <-- d0 ^ 2 */
- uECC_vli_modMult_fast(e1, d0, e0, &curve_secp224r1); /* e1 <-- d0 * e0 */
- uECC_vli_modAdd(d1, t, f0, curve_secp224r1.p, num_words_secp224r1); /* d1 <-- t + f0 */
- uECC_vli_modAdd(e1, e1, e1, curve_secp224r1.p, num_words_secp224r1); /* e1 <-- e1 + e1 */
- uECC_vli_modMult_fast(f1, t, f0, &curve_secp224r1); /* f1 <-- t * f0 */
- uECC_vli_modAdd(f1, f1, f1, curve_secp224r1.p, num_words_secp224r1); /* f1 <-- f1 + f1 */
- uECC_vli_modAdd(f1, f1, f1, curve_secp224r1.p, num_words_secp224r1); /* f1 <-- f1 + f1 */
-}
-
-/* Routine 3.2.5 RSS; from http://www.nsa.gov/ia/_files/nist-routines.pdf */
-static void mod_sqrt_secp224r1_rss(uECC_word_t *d1,
- uECC_word_t *e1,
- uECC_word_t *f1,
- const uECC_word_t *d0,
- const uECC_word_t *e0,
- const uECC_word_t *f0,
- const bitcount_t j) {
- bitcount_t i;
-
- uECC_vli_set(d1, d0, num_words_secp224r1); /* d1 <-- d0 */
- uECC_vli_set(e1, e0, num_words_secp224r1); /* e1 <-- e0 */
- uECC_vli_set(f1, f0, num_words_secp224r1); /* f1 <-- f0 */
- for (i = 1; i <= j; i++) {
- mod_sqrt_secp224r1_rs(d1, e1, f1, d1, e1, f1); /* RS (d1,e1,f1,d1,e1,f1) */
- }
-}
-
-/* Routine 3.2.6 RM; from http://www.nsa.gov/ia/_files/nist-routines.pdf */
-static void mod_sqrt_secp224r1_rm(uECC_word_t *d2,
- uECC_word_t *e2,
- uECC_word_t *f2,
- const uECC_word_t *c,
- const uECC_word_t *d0,
- const uECC_word_t *e0,
- const uECC_word_t *d1,
- const uECC_word_t *e1) {
- uECC_word_t t1[num_words_secp224r1];
- uECC_word_t t2[num_words_secp224r1];
-
- uECC_vli_modMult_fast(t1, e0, e1, &curve_secp224r1); /* t1 <-- e0 * e1 */
- uECC_vli_modMult_fast(t1, t1, c, &curve_secp224r1); /* t1 <-- t1 * c */
- /* t1 <-- p - t1 */
- uECC_vli_modSub(t1, curve_secp224r1.p, t1, curve_secp224r1.p, num_words_secp224r1);
- uECC_vli_modMult_fast(t2, d0, d1, &curve_secp224r1); /* t2 <-- d0 * d1 */
- uECC_vli_modAdd(t2, t2, t1, curve_secp224r1.p, num_words_secp224r1); /* t2 <-- t2 + t1 */
- uECC_vli_modMult_fast(t1, d0, e1, &curve_secp224r1); /* t1 <-- d0 * e1 */
- uECC_vli_modMult_fast(e2, d1, e0, &curve_secp224r1); /* e2 <-- d1 * e0 */
- uECC_vli_modAdd(e2, e2, t1, curve_secp224r1.p, num_words_secp224r1); /* e2 <-- e2 + t1 */
- uECC_vli_modSquare_fast(f2, e2, &curve_secp224r1); /* f2 <-- e2^2 */
- uECC_vli_modMult_fast(f2, f2, c, &curve_secp224r1); /* f2 <-- f2 * c */
- /* f2 <-- p - f2 */
- uECC_vli_modSub(f2, curve_secp224r1.p, f2, curve_secp224r1.p, num_words_secp224r1);
- uECC_vli_set(d2, t2, num_words_secp224r1); /* d2 <-- t2 */
-}
-
-/* Routine 3.2.7 RP; from http://www.nsa.gov/ia/_files/nist-routines.pdf */
-static void mod_sqrt_secp224r1_rp(uECC_word_t *d1,
- uECC_word_t *e1,
- uECC_word_t *f1,
- const uECC_word_t *c,
- const uECC_word_t *r) {
- wordcount_t i;
- wordcount_t pow2i = 1;
- uECC_word_t d0[num_words_secp224r1];
- uECC_word_t e0[num_words_secp224r1] = {1}; /* e0 <-- 1 */
- uECC_word_t f0[num_words_secp224r1];
-
- uECC_vli_set(d0, r, num_words_secp224r1); /* d0 <-- r */
- /* f0 <-- p - c */
- uECC_vli_modSub(f0, curve_secp224r1.p, c, curve_secp224r1.p, num_words_secp224r1);
- for (i = 0; i <= 6; i++) {
- mod_sqrt_secp224r1_rss(d1, e1, f1, d0, e0, f0, pow2i); /* RSS (d1,e1,f1,d0,e0,f0,2^i) */
- mod_sqrt_secp224r1_rm(d1, e1, f1, c, d1, e1, d0, e0); /* RM (d1,e1,f1,c,d1,e1,d0,e0) */
- uECC_vli_set(d0, d1, num_words_secp224r1); /* d0 <-- d1 */
- uECC_vli_set(e0, e1, num_words_secp224r1); /* e0 <-- e1 */
- uECC_vli_set(f0, f1, num_words_secp224r1); /* f0 <-- f1 */
- pow2i *= 2;
- }
-}
-
-/* Compute a = sqrt(a) (mod curve_p). */
-/* Routine 3.2.8 mp_mod_sqrt_224; from http://www.nsa.gov/ia/_files/nist-routines.pdf */
-static void mod_sqrt_secp224r1(uECC_word_t *a, uECC_Curve curve) {
- bitcount_t i;
- uECC_word_t e1[num_words_secp224r1];
- uECC_word_t f1[num_words_secp224r1];
- uECC_word_t d0[num_words_secp224r1];
- uECC_word_t e0[num_words_secp224r1];
- uECC_word_t f0[num_words_secp224r1];
- uECC_word_t d1[num_words_secp224r1];
-
- /* s = a; using constant instead of random value */
- mod_sqrt_secp224r1_rp(d0, e0, f0, a, a); /* RP (d0, e0, f0, c, s) */
- mod_sqrt_secp224r1_rs(d1, e1, f1, d0, e0, f0); /* RS (d1, e1, f1, d0, e0, f0) */
- for (i = 1; i <= 95; i++) {
- uECC_vli_set(d0, d1, num_words_secp224r1); /* d0 <-- d1 */
- uECC_vli_set(e0, e1, num_words_secp224r1); /* e0 <-- e1 */
- uECC_vli_set(f0, f1, num_words_secp224r1); /* f0 <-- f1 */
- mod_sqrt_secp224r1_rs(d1, e1, f1, d0, e0, f0); /* RS (d1, e1, f1, d0, e0, f0) */
- if (uECC_vli_isZero(d1, num_words_secp224r1)) { /* if d1 == 0 */
- break;
- }
- }
- uECC_vli_modInv(f1, e0, curve_secp224r1.p, num_words_secp224r1); /* f1 <-- 1 / e0 */
- uECC_vli_modMult_fast(a, d0, f1, &curve_secp224r1); /* a <-- d0 / e0 */
-}
-#endif /* uECC_SUPPORT_COMPRESSED_POINT */
-
-#if (uECC_OPTIMIZATION_LEVEL > 0)
-/* Computes result = product % curve_p
- from http://www.nsa.gov/ia/_files/nist-routines.pdf */
-#if uECC_WORD_SIZE == 1
-static void vli_mmod_fast_secp224r1(uint8_t *result, uint8_t *product) {
- uint8_t tmp[num_words_secp224r1];
- int8_t carry;
-
- /* t */
- uECC_vli_set(result, product, num_words_secp224r1);
-
- /* s1 */
- tmp[0] = tmp[1] = tmp[2] = tmp[3] = 0;
- tmp[4] = tmp[5] = tmp[6] = tmp[7] = 0;
- tmp[8] = tmp[9] = tmp[10] = tmp[11] = 0;
- tmp[12] = product[28]; tmp[13] = product[29]; tmp[14] = product[30]; tmp[15] = product[31];
- tmp[16] = product[32]; tmp[17] = product[33]; tmp[18] = product[34]; tmp[19] = product[35];
- tmp[20] = product[36]; tmp[21] = product[37]; tmp[22] = product[38]; tmp[23] = product[39];
- tmp[24] = product[40]; tmp[25] = product[41]; tmp[26] = product[42]; tmp[27] = product[43];
- carry = uECC_vli_add(result, result, tmp, num_words_secp224r1);
-
- /* s2 */
- tmp[12] = product[44]; tmp[13] = product[45]; tmp[14] = product[46]; tmp[15] = product[47];
- tmp[16] = product[48]; tmp[17] = product[49]; tmp[18] = product[50]; tmp[19] = product[51];
- tmp[20] = product[52]; tmp[21] = product[53]; tmp[22] = product[54]; tmp[23] = product[55];
- tmp[24] = tmp[25] = tmp[26] = tmp[27] = 0;
- carry += uECC_vli_add(result, result, tmp, num_words_secp224r1);
-
- /* d1 */
- tmp[0] = product[28]; tmp[1] = product[29]; tmp[2] = product[30]; tmp[3] = product[31];
- tmp[4] = product[32]; tmp[5] = product[33]; tmp[6] = product[34]; tmp[7] = product[35];
- tmp[8] = product[36]; tmp[9] = product[37]; tmp[10] = product[38]; tmp[11] = product[39];
- tmp[12] = product[40]; tmp[13] = product[41]; tmp[14] = product[42]; tmp[15] = product[43];
- tmp[16] = product[44]; tmp[17] = product[45]; tmp[18] = product[46]; tmp[19] = product[47];
- tmp[20] = product[48]; tmp[21] = product[49]; tmp[22] = product[50]; tmp[23] = product[51];
- tmp[24] = product[52]; tmp[25] = product[53]; tmp[26] = product[54]; tmp[27] = product[55];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp224r1);
-
- /* d2 */
- tmp[0] = product[44]; tmp[1] = product[45]; tmp[2] = product[46]; tmp[3] = product[47];
- tmp[4] = product[48]; tmp[5] = product[49]; tmp[6] = product[50]; tmp[7] = product[51];
- tmp[8] = product[52]; tmp[9] = product[53]; tmp[10] = product[54]; tmp[11] = product[55];
- tmp[12] = tmp[13] = tmp[14] = tmp[15] = 0;
- tmp[16] = tmp[17] = tmp[18] = tmp[19] = 0;
- tmp[20] = tmp[21] = tmp[22] = tmp[23] = 0;
- tmp[24] = tmp[25] = tmp[26] = tmp[27] = 0;
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp224r1);
-
- if (carry < 0) {
- do {
- carry += uECC_vli_add(result, result, curve_secp224r1.p, num_words_secp224r1);
- } while (carry < 0);
- } else {
- while (carry || uECC_vli_cmp_unsafe(curve_secp224r1.p, result, num_words_secp224r1) != 1) {
- carry -= uECC_vli_sub(result, result, curve_secp224r1.p, num_words_secp224r1);
- }
- }
-}
-#elif uECC_WORD_SIZE == 4
-static void vli_mmod_fast_secp224r1(uint32_t *result, uint32_t *product)
-{
- uint32_t tmp[num_words_secp224r1];
- int carry;
-
- /* t */
- uECC_vli_set(result, product, num_words_secp224r1);
-
- /* s1 */
- tmp[0] = tmp[1] = tmp[2] = 0;
- tmp[3] = product[7];
- tmp[4] = product[8];
- tmp[5] = product[9];
- tmp[6] = product[10];
- carry = uECC_vli_add(result, result, tmp, num_words_secp224r1);
-
- /* s2 */
- tmp[3] = product[11];
- tmp[4] = product[12];
- tmp[5] = product[13];
- tmp[6] = 0;
- carry += uECC_vli_add(result, result, tmp, num_words_secp224r1);
-
- /* d1 */
- tmp[0] = product[7];
- tmp[1] = product[8];
- tmp[2] = product[9];
- tmp[3] = product[10];
- tmp[4] = product[11];
- tmp[5] = product[12];
- tmp[6] = product[13];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp224r1);
-
- /* d2 */
- tmp[0] = product[11];
- tmp[1] = product[12];
- tmp[2] = product[13];
- tmp[3] = tmp[4] = tmp[5] = tmp[6] = 0;
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp224r1);
-
- if (carry < 0) {
- do {
- carry += uECC_vli_add(result, result, curve_secp224r1.p, num_words_secp224r1);
- } while (carry < 0);
- } else {
- while (carry || uECC_vli_cmp_unsafe(curve_secp224r1.p, result, num_words_secp224r1) != 1) {
- carry -= uECC_vli_sub(result, result, curve_secp224r1.p, num_words_secp224r1);
- }
- }
-}
-#else
-static void vli_mmod_fast_secp224r1(uint64_t *result, uint64_t *product)
-{
- uint64_t tmp[num_words_secp224r1];
- int carry = 0;
-
- /* t */
- uECC_vli_set(result, product, num_words_secp224r1);
- result[num_words_secp224r1 - 1] &= 0xffffffff;
-
- /* s1 */
- tmp[0] = 0;
- tmp[1] = product[3] & 0xffffffff00000000ull;
- tmp[2] = product[4];
- tmp[3] = product[5] & 0xffffffff;
- uECC_vli_add(result, result, tmp, num_words_secp224r1);
-
- /* s2 */
- tmp[1] = product[5] & 0xffffffff00000000ull;
- tmp[2] = product[6];
- tmp[3] = 0;
- uECC_vli_add(result, result, tmp, num_words_secp224r1);
-
- /* d1 */
- tmp[0] = (product[3] >> 32) | (product[4] << 32);
- tmp[1] = (product[4] >> 32) | (product[5] << 32);
- tmp[2] = (product[5] >> 32) | (product[6] << 32);
- tmp[3] = product[6] >> 32;
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp224r1);
-
- /* d2 */
- tmp[0] = (product[5] >> 32) | (product[6] << 32);
- tmp[1] = product[6] >> 32;
- tmp[2] = tmp[3] = 0;
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp224r1);
-
- if (carry < 0) {
- do {
- carry += uECC_vli_add(result, result, curve_secp224r1.p, num_words_secp224r1);
- } while (carry < 0);
- } else {
- while (uECC_vli_cmp_unsafe(curve_secp224r1.p, result, num_words_secp224r1) != 1) {
- uECC_vli_sub(result, result, curve_secp224r1.p, num_words_secp224r1);
- }
- }
-}
-#endif /* uECC_WORD_SIZE */
-#endif /* (uECC_OPTIMIZATION_LEVEL > 0) */
-
-#endif /* uECC_SUPPORTS_secp224r1 */
-
-#if uECC_SUPPORTS_secp256r1
-
-#if (uECC_OPTIMIZATION_LEVEL > 0)
-static void vli_mmod_fast_secp256r1(uECC_word_t *result, uECC_word_t *product);
-#endif
-
-static const struct uECC_Curve_t curve_secp256r1 = {
- num_words_secp256r1,
- num_bytes_secp256r1,
- 256, /* num_n_bits */
- { BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, 00, 00, 00, 00),
- BYTES_TO_WORDS_8(00, 00, 00, 00, 00, 00, 00, 00),
- BYTES_TO_WORDS_8(01, 00, 00, 00, FF, FF, FF, FF) },
- { BYTES_TO_WORDS_8(51, 25, 63, FC, C2, CA, B9, F3),
- BYTES_TO_WORDS_8(84, 9E, 17, A7, AD, FA, E6, BC),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(00, 00, 00, 00, FF, FF, FF, FF) },
- { BYTES_TO_WORDS_8(96, C2, 98, D8, 45, 39, A1, F4),
- BYTES_TO_WORDS_8(A0, 33, EB, 2D, 81, 7D, 03, 77),
- BYTES_TO_WORDS_8(F2, 40, A4, 63, E5, E6, BC, F8),
- BYTES_TO_WORDS_8(47, 42, 2C, E1, F2, D1, 17, 6B),
-
- BYTES_TO_WORDS_8(F5, 51, BF, 37, 68, 40, B6, CB),
- BYTES_TO_WORDS_8(CE, 5E, 31, 6B, 57, 33, CE, 2B),
- BYTES_TO_WORDS_8(16, 9E, 0F, 7C, 4A, EB, E7, 8E),
- BYTES_TO_WORDS_8(9B, 7F, 1A, FE, E2, 42, E3, 4F) },
- { BYTES_TO_WORDS_8(4B, 60, D2, 27, 3E, 3C, CE, 3B),
- BYTES_TO_WORDS_8(F6, B0, 53, CC, B0, 06, 1D, 65),
- BYTES_TO_WORDS_8(BC, 86, 98, 76, 55, BD, EB, B3),
- BYTES_TO_WORDS_8(E7, 93, 3A, AA, D8, 35, C6, 5A) },
- &double_jacobian_default,
-#if uECC_SUPPORT_COMPRESSED_POINT
- &mod_sqrt_default,
-#endif
- &x_side_default,
-#if (uECC_OPTIMIZATION_LEVEL > 0)
- &vli_mmod_fast_secp256r1
-#endif
-};
-
-uECC_Curve uECC_secp256r1(void) { return &curve_secp256r1; }
-
-
-#if (uECC_OPTIMIZATION_LEVEL > 0 && !asm_mmod_fast_secp256r1)
-/* Computes result = product % curve_p
- from http://www.nsa.gov/ia/_files/nist-routines.pdf */
-#if uECC_WORD_SIZE == 1
-static void vli_mmod_fast_secp256r1(uint8_t *result, uint8_t *product) {
- uint8_t tmp[num_words_secp256r1];
- int8_t carry;
-
- /* t */
- uECC_vli_set(result, product, num_words_secp256r1);
-
- /* s1 */
- tmp[0] = tmp[1] = tmp[2] = tmp[3] = 0;
- tmp[4] = tmp[5] = tmp[6] = tmp[7] = 0;
- tmp[8] = tmp[9] = tmp[10] = tmp[11] = 0;
- tmp[12] = product[44]; tmp[13] = product[45]; tmp[14] = product[46]; tmp[15] = product[47];
- tmp[16] = product[48]; tmp[17] = product[49]; tmp[18] = product[50]; tmp[19] = product[51];
- tmp[20] = product[52]; tmp[21] = product[53]; tmp[22] = product[54]; tmp[23] = product[55];
- tmp[24] = product[56]; tmp[25] = product[57]; tmp[26] = product[58]; tmp[27] = product[59];
- tmp[28] = product[60]; tmp[29] = product[61]; tmp[30] = product[62]; tmp[31] = product[63];
- carry = uECC_vli_add(tmp, tmp, tmp, num_words_secp256r1);
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* s2 */
- tmp[12] = product[48]; tmp[13] = product[49]; tmp[14] = product[50]; tmp[15] = product[51];
- tmp[16] = product[52]; tmp[17] = product[53]; tmp[18] = product[54]; tmp[19] = product[55];
- tmp[20] = product[56]; tmp[21] = product[57]; tmp[22] = product[58]; tmp[23] = product[59];
- tmp[24] = product[60]; tmp[25] = product[61]; tmp[26] = product[62]; tmp[27] = product[63];
- tmp[28] = tmp[29] = tmp[30] = tmp[31] = 0;
- carry += uECC_vli_add(tmp, tmp, tmp, num_words_secp256r1);
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* s3 */
- tmp[0] = product[32]; tmp[1] = product[33]; tmp[2] = product[34]; tmp[3] = product[35];
- tmp[4] = product[36]; tmp[5] = product[37]; tmp[6] = product[38]; tmp[7] = product[39];
- tmp[8] = product[40]; tmp[9] = product[41]; tmp[10] = product[42]; tmp[11] = product[43];
- tmp[12] = tmp[13] = tmp[14] = tmp[15] = 0;
- tmp[16] = tmp[17] = tmp[18] = tmp[19] = 0;
- tmp[20] = tmp[21] = tmp[22] = tmp[23] = 0;
- tmp[24] = product[56]; tmp[25] = product[57]; tmp[26] = product[58]; tmp[27] = product[59];
- tmp[28] = product[60]; tmp[29] = product[61]; tmp[30] = product[62]; tmp[31] = product[63];
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* s4 */
- tmp[0] = product[36]; tmp[1] = product[37]; tmp[2] = product[38]; tmp[3] = product[39];
- tmp[4] = product[40]; tmp[5] = product[41]; tmp[6] = product[42]; tmp[7] = product[43];
- tmp[8] = product[44]; tmp[9] = product[45]; tmp[10] = product[46]; tmp[11] = product[47];
- tmp[12] = product[52]; tmp[13] = product[53]; tmp[14] = product[54]; tmp[15] = product[55];
- tmp[16] = product[56]; tmp[17] = product[57]; tmp[18] = product[58]; tmp[19] = product[59];
- tmp[20] = product[60]; tmp[21] = product[61]; tmp[22] = product[62]; tmp[23] = product[63];
- tmp[24] = product[52]; tmp[25] = product[53]; tmp[26] = product[54]; tmp[27] = product[55];
- tmp[28] = product[32]; tmp[29] = product[33]; tmp[30] = product[34]; tmp[31] = product[35];
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* d1 */
- tmp[0] = product[44]; tmp[1] = product[45]; tmp[2] = product[46]; tmp[3] = product[47];
- tmp[4] = product[48]; tmp[5] = product[49]; tmp[6] = product[50]; tmp[7] = product[51];
- tmp[8] = product[52]; tmp[9] = product[53]; tmp[10] = product[54]; tmp[11] = product[55];
- tmp[12] = tmp[13] = tmp[14] = tmp[15] = 0;
- tmp[16] = tmp[17] = tmp[18] = tmp[19] = 0;
- tmp[20] = tmp[21] = tmp[22] = tmp[23] = 0;
- tmp[24] = product[32]; tmp[25] = product[33]; tmp[26] = product[34]; tmp[27] = product[35];
- tmp[28] = product[40]; tmp[29] = product[41]; tmp[30] = product[42]; tmp[31] = product[43];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- /* d2 */
- tmp[0] = product[48]; tmp[1] = product[49]; tmp[2] = product[50]; tmp[3] = product[51];
- tmp[4] = product[52]; tmp[5] = product[53]; tmp[6] = product[54]; tmp[7] = product[55];
- tmp[8] = product[56]; tmp[9] = product[57]; tmp[10] = product[58]; tmp[11] = product[59];
- tmp[12] = product[60]; tmp[13] = product[61]; tmp[14] = product[62]; tmp[15] = product[63];
- tmp[16] = tmp[17] = tmp[18] = tmp[19] = 0;
- tmp[20] = tmp[21] = tmp[22] = tmp[23] = 0;
- tmp[24] = product[36]; tmp[25] = product[37]; tmp[26] = product[38]; tmp[27] = product[39];
- tmp[28] = product[44]; tmp[29] = product[45]; tmp[30] = product[46]; tmp[31] = product[47];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- /* d3 */
- tmp[0] = product[52]; tmp[1] = product[53]; tmp[2] = product[54]; tmp[3] = product[55];
- tmp[4] = product[56]; tmp[5] = product[57]; tmp[6] = product[58]; tmp[7] = product[59];
- tmp[8] = product[60]; tmp[9] = product[61]; tmp[10] = product[62]; tmp[11] = product[63];
- tmp[12] = product[32]; tmp[13] = product[33]; tmp[14] = product[34]; tmp[15] = product[35];
- tmp[16] = product[36]; tmp[17] = product[37]; tmp[18] = product[38]; tmp[19] = product[39];
- tmp[20] = product[40]; tmp[21] = product[41]; tmp[22] = product[42]; tmp[23] = product[43];
- tmp[24] = tmp[25] = tmp[26] = tmp[27] = 0;
- tmp[28] = product[48]; tmp[29] = product[49]; tmp[30] = product[50]; tmp[31] = product[51];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- /* d4 */
- tmp[0] = product[56]; tmp[1] = product[57]; tmp[2] = product[58]; tmp[3] = product[59];
- tmp[4] = product[60]; tmp[5] = product[61]; tmp[6] = product[62]; tmp[7] = product[63];
- tmp[8] = tmp[9] = tmp[10] = tmp[11] = 0;
- tmp[12] = product[36]; tmp[13] = product[37]; tmp[14] = product[38]; tmp[15] = product[39];
- tmp[16] = product[40]; tmp[17] = product[41]; tmp[18] = product[42]; tmp[19] = product[43];
- tmp[20] = product[44]; tmp[21] = product[45]; tmp[22] = product[46]; tmp[23] = product[47];
- tmp[24] = tmp[25] = tmp[26] = tmp[27] = 0;
- tmp[28] = product[52]; tmp[29] = product[53]; tmp[30] = product[54]; tmp[31] = product[55];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- if (carry < 0) {
- do {
- carry += uECC_vli_add(result, result, curve_secp256r1.p, num_words_secp256r1);
- } while (carry < 0);
- } else {
- while (carry || uECC_vli_cmp_unsafe(curve_secp256r1.p, result, num_words_secp256r1) != 1) {
- carry -= uECC_vli_sub(result, result, curve_secp256r1.p, num_words_secp256r1);
- }
- }
-}
-#elif uECC_WORD_SIZE == 4
-static void vli_mmod_fast_secp256r1(uint32_t *result, uint32_t *product) {
- uint32_t tmp[num_words_secp256r1];
- int carry;
-
- /* t */
- uECC_vli_set(result, product, num_words_secp256r1);
-
- /* s1 */
- tmp[0] = tmp[1] = tmp[2] = 0;
- tmp[3] = product[11];
- tmp[4] = product[12];
- tmp[5] = product[13];
- tmp[6] = product[14];
- tmp[7] = product[15];
- carry = uECC_vli_add(tmp, tmp, tmp, num_words_secp256r1);
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* s2 */
- tmp[3] = product[12];
- tmp[4] = product[13];
- tmp[5] = product[14];
- tmp[6] = product[15];
- tmp[7] = 0;
- carry += uECC_vli_add(tmp, tmp, tmp, num_words_secp256r1);
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* s3 */
- tmp[0] = product[8];
- tmp[1] = product[9];
- tmp[2] = product[10];
- tmp[3] = tmp[4] = tmp[5] = 0;
- tmp[6] = product[14];
- tmp[7] = product[15];
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* s4 */
- tmp[0] = product[9];
- tmp[1] = product[10];
- tmp[2] = product[11];
- tmp[3] = product[13];
- tmp[4] = product[14];
- tmp[5] = product[15];
- tmp[6] = product[13];
- tmp[7] = product[8];
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* d1 */
- tmp[0] = product[11];
- tmp[1] = product[12];
- tmp[2] = product[13];
- tmp[3] = tmp[4] = tmp[5] = 0;
- tmp[6] = product[8];
- tmp[7] = product[10];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- /* d2 */
- tmp[0] = product[12];
- tmp[1] = product[13];
- tmp[2] = product[14];
- tmp[3] = product[15];
- tmp[4] = tmp[5] = 0;
- tmp[6] = product[9];
- tmp[7] = product[11];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- /* d3 */
- tmp[0] = product[13];
- tmp[1] = product[14];
- tmp[2] = product[15];
- tmp[3] = product[8];
- tmp[4] = product[9];
- tmp[5] = product[10];
- tmp[6] = 0;
- tmp[7] = product[12];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- /* d4 */
- tmp[0] = product[14];
- tmp[1] = product[15];
- tmp[2] = 0;
- tmp[3] = product[9];
- tmp[4] = product[10];
- tmp[5] = product[11];
- tmp[6] = 0;
- tmp[7] = product[13];
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- if (carry < 0) {
- do {
- carry += uECC_vli_add(result, result, curve_secp256r1.p, num_words_secp256r1);
- } while (carry < 0);
- } else {
- while (carry || uECC_vli_cmp_unsafe(curve_secp256r1.p, result, num_words_secp256r1) != 1) {
- carry -= uECC_vli_sub(result, result, curve_secp256r1.p, num_words_secp256r1);
- }
- }
-}
-#else
-static void vli_mmod_fast_secp256r1(uint64_t *result, uint64_t *product) {
- uint64_t tmp[num_words_secp256r1];
- int carry;
-
- /* t */
- uECC_vli_set(result, product, num_words_secp256r1);
-
- /* s1 */
- tmp[0] = 0;
- tmp[1] = product[5] & 0xffffffff00000000ull;
- tmp[2] = product[6];
- tmp[3] = product[7];
- carry = (int)uECC_vli_add(tmp, tmp, tmp, num_words_secp256r1);
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* s2 */
- tmp[1] = product[6] << 32;
- tmp[2] = (product[6] >> 32) | (product[7] << 32);
- tmp[3] = product[7] >> 32;
- carry += uECC_vli_add(tmp, tmp, tmp, num_words_secp256r1);
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* s3 */
- tmp[0] = product[4];
- tmp[1] = product[5] & 0xffffffff;
- tmp[2] = 0;
- tmp[3] = product[7];
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* s4 */
- tmp[0] = (product[4] >> 32) | (product[5] << 32);
- tmp[1] = (product[5] >> 32) | (product[6] & 0xffffffff00000000ull);
- tmp[2] = product[7];
- tmp[3] = (product[6] >> 32) | (product[4] << 32);
- carry += uECC_vli_add(result, result, tmp, num_words_secp256r1);
-
- /* d1 */
- tmp[0] = (product[5] >> 32) | (product[6] << 32);
- tmp[1] = (product[6] >> 32);
- tmp[2] = 0;
- tmp[3] = (product[4] & 0xffffffff) | (product[5] << 32);
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- /* d2 */
- tmp[0] = product[6];
- tmp[1] = product[7];
- tmp[2] = 0;
- tmp[3] = (product[4] >> 32) | (product[5] & 0xffffffff00000000ull);
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- /* d3 */
- tmp[0] = (product[6] >> 32) | (product[7] << 32);
- tmp[1] = (product[7] >> 32) | (product[4] << 32);
- tmp[2] = (product[4] >> 32) | (product[5] << 32);
- tmp[3] = (product[6] << 32);
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- /* d4 */
- tmp[0] = product[7];
- tmp[1] = product[4] & 0xffffffff00000000ull;
- tmp[2] = product[5];
- tmp[3] = product[6] & 0xffffffff00000000ull;
- carry -= uECC_vli_sub(result, result, tmp, num_words_secp256r1);
-
- if (carry < 0) {
- do {
- carry += uECC_vli_add(result, result, curve_secp256r1.p, num_words_secp256r1);
- } while (carry < 0);
- } else {
- while (carry || uECC_vli_cmp_unsafe(curve_secp256r1.p, result, num_words_secp256r1) != 1) {
- carry -= uECC_vli_sub(result, result, curve_secp256r1.p, num_words_secp256r1);
- }
- }
-}
-#endif /* uECC_WORD_SIZE */
-#endif /* (uECC_OPTIMIZATION_LEVEL > 0 && !asm_mmod_fast_secp256r1) */
-
-#endif /* uECC_SUPPORTS_secp256r1 */
-
-#if uECC_SUPPORTS_secp256k1
-
-static void double_jacobian_secp256k1(uECC_word_t * X1,
- uECC_word_t * Y1,
- uECC_word_t * Z1,
- uECC_Curve curve);
-static void x_side_secp256k1(uECC_word_t *result, const uECC_word_t *x, uECC_Curve curve);
-#if (uECC_OPTIMIZATION_LEVEL > 0)
-static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product);
-#endif
-
-static const struct uECC_Curve_t curve_secp256k1 = {
- num_words_secp256k1,
- num_bytes_secp256k1,
- 256, /* num_n_bits */
- { BYTES_TO_WORDS_8(2F, FC, FF, FF, FE, FF, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF) },
- { BYTES_TO_WORDS_8(41, 41, 36, D0, 8C, 5E, D2, BF),
- BYTES_TO_WORDS_8(3B, A0, 48, AF, E6, DC, AE, BA),
- BYTES_TO_WORDS_8(FE, FF, FF, FF, FF, FF, FF, FF),
- BYTES_TO_WORDS_8(FF, FF, FF, FF, FF, FF, FF, FF) },
- { BYTES_TO_WORDS_8(98, 17, F8, 16, 5B, 81, F2, 59),
- BYTES_TO_WORDS_8(D9, 28, CE, 2D, DB, FC, 9B, 02),
- BYTES_TO_WORDS_8(07, 0B, 87, CE, 95, 62, A0, 55),
- BYTES_TO_WORDS_8(AC, BB, DC, F9, 7E, 66, BE, 79),
-
- BYTES_TO_WORDS_8(B8, D4, 10, FB, 8F, D0, 47, 9C),
- BYTES_TO_WORDS_8(19, 54, 85, A6, 48, B4, 17, FD),
- BYTES_TO_WORDS_8(A8, 08, 11, 0E, FC, FB, A4, 5D),
- BYTES_TO_WORDS_8(65, C4, A3, 26, 77, DA, 3A, 48) },
- { BYTES_TO_WORDS_8(07, 00, 00, 00, 00, 00, 00, 00),
- BYTES_TO_WORDS_8(00, 00, 00, 00, 00, 00, 00, 00),
- BYTES_TO_WORDS_8(00, 00, 00, 00, 00, 00, 00, 00),
- BYTES_TO_WORDS_8(00, 00, 00, 00, 00, 00, 00, 00) },
- &double_jacobian_secp256k1,
-#if uECC_SUPPORT_COMPRESSED_POINT
- &mod_sqrt_default,
-#endif
- &x_side_secp256k1,
-#if (uECC_OPTIMIZATION_LEVEL > 0)
- &vli_mmod_fast_secp256k1
-#endif
-};
-
-uECC_Curve uECC_secp256k1(void) { return &curve_secp256k1; }
-
-
-/* Double in place */
-static void double_jacobian_secp256k1(uECC_word_t * X1,
- uECC_word_t * Y1,
- uECC_word_t * Z1,
- uECC_Curve curve) {
- /* t1 = X, t2 = Y, t3 = Z */
- uECC_word_t t4[num_words_secp256k1];
- uECC_word_t t5[num_words_secp256k1];
-
- if (uECC_vli_isZero(Z1, num_words_secp256k1)) {
- return;
- }
-
- uECC_vli_modSquare_fast(t5, Y1, curve); /* t5 = y1^2 */
- uECC_vli_modMult_fast(t4, X1, t5, curve); /* t4 = x1*y1^2 = A */
- uECC_vli_modSquare_fast(X1, X1, curve); /* t1 = x1^2 */
- uECC_vli_modSquare_fast(t5, t5, curve); /* t5 = y1^4 */
- uECC_vli_modMult_fast(Z1, Y1, Z1, curve); /* t3 = y1*z1 = z3 */
-
- uECC_vli_modAdd(Y1, X1, X1, curve->p, num_words_secp256k1); /* t2 = 2*x1^2 */
- uECC_vli_modAdd(Y1, Y1, X1, curve->p, num_words_secp256k1); /* t2 = 3*x1^2 */
- if (uECC_vli_testBit(Y1, 0)) {
- uECC_word_t carry = uECC_vli_add(Y1, Y1, curve->p, num_words_secp256k1);
- uECC_vli_rshift1(Y1, num_words_secp256k1);
- Y1[num_words_secp256k1 - 1] |= carry << (uECC_WORD_BITS - 1);
- } else {
- uECC_vli_rshift1(Y1, num_words_secp256k1);
- }
- /* t2 = 3/2*(x1^2) = B */
-
- uECC_vli_modSquare_fast(X1, Y1, curve); /* t1 = B^2 */
- uECC_vli_modSub(X1, X1, t4, curve->p, num_words_secp256k1); /* t1 = B^2 - A */
- uECC_vli_modSub(X1, X1, t4, curve->p, num_words_secp256k1); /* t1 = B^2 - 2A = x3 */
-
- uECC_vli_modSub(t4, t4, X1, curve->p, num_words_secp256k1); /* t4 = A - x3 */
- uECC_vli_modMult_fast(Y1, Y1, t4, curve); /* t2 = B * (A - x3) */
- uECC_vli_modSub(Y1, Y1, t5, curve->p, num_words_secp256k1); /* t2 = B * (A - x3) - y1^4 = y3 */
-}
-
-/* Computes result = x^3 + b. result must not overlap x. */
-static void x_side_secp256k1(uECC_word_t *result, const uECC_word_t *x, uECC_Curve curve) {
- uECC_vli_modSquare_fast(result, x, curve); /* r = x^2 */
- uECC_vli_modMult_fast(result, result, x, curve); /* r = x^3 */
- uECC_vli_modAdd(result, result, curve->b, curve->p, num_words_secp256k1); /* r = x^3 + b */
-}
-
-#if (uECC_OPTIMIZATION_LEVEL > 0 && !asm_mmod_fast_secp256k1)
-static void omega_mult_secp256k1(uECC_word_t *result, const uECC_word_t *right);
-static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) {
- uECC_word_t tmp[2 * num_words_secp256k1];
- uECC_word_t carry;
-
- uECC_vli_clear(tmp, num_words_secp256k1);
- uECC_vli_clear(tmp + num_words_secp256k1, num_words_secp256k1);
-
- omega_mult_secp256k1(tmp, product + num_words_secp256k1); /* (Rq, q) = q * c */
-
- carry = uECC_vli_add(result, product, tmp, num_words_secp256k1); /* (C, r) = r + q */
- uECC_vli_clear(product, num_words_secp256k1);
- omega_mult_secp256k1(product, tmp + num_words_secp256k1); /* Rq*c */
- carry += uECC_vli_add(result, result, product, num_words_secp256k1); /* (C1, r) = r + Rq*c */
-
- while (carry > 0) {
- --carry;
- uECC_vli_sub(result, result, curve_secp256k1.p, num_words_secp256k1);
- }
- if (uECC_vli_cmp_unsafe(result, curve_secp256k1.p, num_words_secp256k1) > 0) {
- uECC_vli_sub(result, result, curve_secp256k1.p, num_words_secp256k1);
- }
-}
-
-#if uECC_WORD_SIZE == 1
-static void omega_mult_secp256k1(uint8_t * result, const uint8_t * right) {
- /* Multiply by (2^32 + 2^9 + 2^8 + 2^7 + 2^6 + 2^4 + 1). */
- uECC_word_t r0 = 0;
- uECC_word_t r1 = 0;
- uECC_word_t r2 = 0;
- wordcount_t k;
-
- /* Multiply by (2^9 + 2^8 + 2^7 + 2^6 + 2^4 + 1). */
- muladd(0xD1, right[0], &r0, &r1, &r2);
- result[0] = r0;
- r0 = r1;
- r1 = r2;
- /* r2 is still 0 */
-
- for (k = 1; k < num_words_secp256k1; ++k) {
- muladd(0x03, right[k - 1], &r0, &r1, &r2);
- muladd(0xD1, right[k], &r0, &r1, &r2);
- result[k] = r0;
- r0 = r1;
- r1 = r2;
- r2 = 0;
- }
- muladd(0x03, right[num_words_secp256k1 - 1], &r0, &r1, &r2);
- result[num_words_secp256k1] = r0;
- result[num_words_secp256k1 + 1] = r1;
- /* add the 2^32 multiple */
- result[4 + num_words_secp256k1] =
- uECC_vli_add(result + 4, result + 4, right, num_words_secp256k1);
-}
-#elif uECC_WORD_SIZE == 4
-static void omega_mult_secp256k1(uint32_t * result, const uint32_t * right) {
- /* Multiply by (2^9 + 2^8 + 2^7 + 2^6 + 2^4 + 1). */
- uint32_t carry = 0;
- wordcount_t k;
-
- for (k = 0; k < num_words_secp256k1; ++k) {
- uint64_t p = (uint64_t)0x3D1 * right[k] + carry;
- result[k] = (uint32_t) p;
- carry = p >> 32;
- }
- result[num_words_secp256k1] = carry;
- /* add the 2^32 multiple */
- result[1 + num_words_secp256k1] =
- uECC_vli_add(result + 1, result + 1, right, num_words_secp256k1);
-}
-#else
-static void omega_mult_secp256k1(uint64_t * result, const uint64_t * right) {
- uECC_word_t r0 = 0;
- uECC_word_t r1 = 0;
- uECC_word_t r2 = 0;
- wordcount_t k;
-
- /* Multiply by (2^32 + 2^9 + 2^8 + 2^7 + 2^6 + 2^4 + 1). */
- for (k = 0; k < num_words_secp256k1; ++k) {
- muladd(0x1000003D1ull, right[k], &r0, &r1, &r2);
- result[k] = r0;
- r0 = r1;
- r1 = r2;
- r2 = 0;
- }
- result[num_words_secp256k1] = r0;
-}
-#endif /* uECC_WORD_SIZE */
-#endif /* (uECC_OPTIMIZATION_LEVEL > 0 && && !asm_mmod_fast_secp256k1) */
-
-#endif /* uECC_SUPPORTS_secp256k1 */
-
-#endif /* _UECC_CURVE_SPECIFIC_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_project.py b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_project.py
deleted file mode 100644
index 957dd7920..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_project.py
+++ /dev/null
@@ -1,132 +0,0 @@
-import os
-
-c, link, asm, utils = emk.module("c", "link", "asm", "utils")
-
-default_compile_flags = ["-fvisibility=hidden", "-Wall", "-Wextra", "-Wshadow", "-Werror", "-Wno-missing-field-initializers", "-Wno-unused-parameter", \
- "-Wno-comment", "-Wno-unused", "-Wno-unknown-pragmas"]
-default_link_flags = []
-opt_flags = {"dbg":["-g"], "std":["-O2"], "max":["-O3"], "small":["-Os"]}
-opt_link_flags = {"dbg":[], "std":[], "max":[], "small":[]}
-c_flags = ["-std=c99"]
-cxx_flags = ["-std=c++11", "-Wno-reorder", "-fno-rtti", "-fno-exceptions"]
-c_link_flags = []
-cxx_link_flags = ["-fno-rtti", "-fno-exceptions"]
-
-if "root" in emk.options:
- root = emk.options["root"]
-else:
- root = "/"
-
-def setup_build_dir():
- build_arch = None
- if "arch" in emk.options:
- build_arch = emk.options["arch"]
- elif not emk.cleaning:
- build_arch = "osx"
- emk.options["arch"] = build_arch
-
- opt_level = None
- if "opt" in emk.options:
- level = emk.options["opt"]
- if level in opt_flags:
- opt_level = level
- else:
- emk.log.warning("Unknown optimization level '%s'" % (level))
- elif not emk.cleaning:
- opt_level = "dbg"
- emk.options["opt"] = opt_level
-
- dirs = ["__build__"]
- if build_arch:
- dirs.append(build_arch)
- if opt_level:
- dirs.append(opt_level)
- emk.build_dir = os.path.join(*dirs)
-
-def setup_osx():
- global c
- global link
-
- flags = [("-arch", "x86_64"), "-fno-common", "-Wnewline-eof"]
- c.flags.extend(flags)
- c.cxx.flags += ["-stdlib=libc++"]
- link.cxx.flags += ["-stdlib=libc++"]
-
- link_flags = [("-arch", "x86_64")]
- link.local_flags.extend(link_flags)
-
-def setup_avr():
- global c
- global link
-
- c.compiler = c.GccCompiler(root + "Projects/avr-tools/bin/avr-")
- c.flags += ["-mmcu=atmega256rfr2", "-ffunction-sections", "-fdata-sections"]
- link.linker = link.GccLinker(root + "Projects/avr-tools/bin/avr-")
- link.flags += ["-mmcu=atmega256rfr2", "-mrelax", "-Wl,--gc-sections"]
- link.strip = True
-
-def setup_arm_thumb():
- global c
- global link
- global asm
- global utils
-
- asm.assembler = asm.GccAssembler(root + "cross/arm_cortex/bin/arm-none-eabi-")
- c.compiler = c.GccCompiler(root + "cross/arm_cortex/bin/arm-none-eabi-")
- link.linker = link.GccLinker(root + "cross/arm_cortex/bin/arm-none-eabi-")
-
- c.flags.extend(["-mcpu=cortex-m0", "-mthumb", "-ffunction-sections", "-fdata-sections", "-fno-builtin-fprintf", "-fno-builtin-printf"])
- c.defines["LPC11XX"] = 1
-
- link.local_flags.extend(["-mcpu=cortex-m0", "-mthumb", "-nostartfiles", "-nostdlib", "-Wl,--gc-sections"])
- link.local_flags.extend(["-Tflash.lds", "-L" + root + "Projects/lpc11xx/core", root + "Projects/lpc11xx/core/" + emk.build_dir + "/board_cstartup.o"])
- link.local_syslibs += ["gcc"]
- link.depdirs += [root + "Projects/lpc11xx/stdlib"]
-
- def do_objcopy(produces, requires):
- utils.call(root + "cross/arm_cortex/bin/arm-none-eabi-objcopy", "-O", "binary", requires[0], produces[0])
-
- def handle_exe(path):
- emk.depend(path, root + "Projects/lpc11xx/core/" + emk.build_dir + "/board_cstartup.o")
- emk.rule(do_objcopy, path + ".bin", path, cwd_safe=True, ex_safe=True)
- emk.autobuild(path + ".bin")
-
- link.exe_funcs.append(handle_exe)
- link.strip = True
-
- emk.recurse(root + "Projects/lpc11xx/core")
-
-def setup_linux_rpi():
- global c
- global link
-
- c.compiler = c.GccCompiler("/Volumes/xtools/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi-")
- link.linker = link.GccLinker("/Volumes/xtools/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi-")
-
- c.flags.extend(["-fomit-frame-pointer"])
-
-setup_build_dir()
-
-setup_funcs = {"osx":setup_osx, "avr":setup_avr, "arm_thumb":setup_arm_thumb, "rpi": setup_linux_rpi}
-
-if not emk.cleaning:
- build_arch = emk.options["arch"]
- opt_level = emk.options["opt"]
-
- c.flags.extend(default_compile_flags)
- c.flags.extend(opt_flags[opt_level])
- c.c.flags.extend(c_flags)
- c.cxx.flags.extend(cxx_flags)
- link.local_flags.extend(default_link_flags)
- link.local_flags.extend(opt_link_flags[opt_level])
- link.c.local_flags.extend(c_link_flags)
- link.cxx.local_flags.extend(cxx_link_flags)
-
- c.include_dirs.append("$:proj:$")
-
- if build_arch in setup_funcs:
- setup_funcs[build_arch]()
- else:
- raise emk.BuildError("Unknown target arch '%s'" % (build_arch))
-
- c.defines["TARGET_ARCH_" + build_arch.upper()] = 1
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_rules.py b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_rules.py
deleted file mode 100644
index b1d76c81a..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_rules.py
+++ /dev/null
@@ -1,3 +0,0 @@
-c, link = emk.module("c", "link")
-
-emk.subdir("test")
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/examples/ecc_test/ecc_test.ino b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/examples/ecc_test/ecc_test.ino
deleted file mode 100644
index 64a0be50f..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/examples/ecc_test/ecc_test.ino
+++ /dev/null
@@ -1,80 +0,0 @@
-#include
-
-static int RNG(uint8_t *dest, unsigned size) {
- // Use the least-significant bits from the ADC for an unconnected pin (or connected to a source of
- // random noise). This can take a long time to generate random data if the result of analogRead(0)
- // doesn't change very frequently.
- while (size) {
- uint8_t val = 0;
- for (unsigned i = 0; i < 8; ++i) {
- int init = analogRead(0);
- int count = 0;
- while (analogRead(0) == init) {
- ++count;
- }
-
- if (count == 0) {
- val = (val << 1) | (init & 0x01);
- } else {
- val = (val << 1) | (count & 0x01);
- }
- }
- *dest = val;
- ++dest;
- --size;
- }
- // NOTE: it would be a good idea to hash the resulting random data using SHA-256 or similar.
- return 1;
-}
-
-void setup() {
- Serial.begin(115200);
- Serial.print("Testing ecc\n");
- uECC_set_rng(&RNG);
-}
-
-void loop() {
- const struct uECC_Curve_t * curve = uECC_secp160r1();
- uint8_t private1[21];
- uint8_t private2[21];
-
- uint8_t public1[40];
- uint8_t public2[40];
-
- uint8_t secret1[20];
- uint8_t secret2[20];
-
- unsigned long a = millis();
- uECC_make_key(public1, private1, curve);
- unsigned long b = millis();
-
- Serial.print("Made key 1 in "); Serial.println(b-a);
- a = millis();
- uECC_make_key(public2, private2, curve);
- b = millis();
- Serial.print("Made key 2 in "); Serial.println(b-a);
-
- a = millis();
- int r = uECC_shared_secret(public2, private1, secret1, curve);
- b = millis();
- Serial.print("Shared secret 1 in "); Serial.println(b-a);
- if (!r) {
- Serial.print("shared_secret() failed (1)\n");
- return;
- }
-
- a = millis();
- r = uECC_shared_secret(public1, private2, secret2, curve);
- b = millis();
- Serial.print("Shared secret 2 in "); Serial.println(b-a);
- if (!r) {
- Serial.print("shared_secret() failed (2)\n");
- return;
- }
-
- if (memcmp(secret1, secret2, 20) != 0) {
- Serial.print("Shared secrets are not identical!\n");
- } else {
- Serial.print("Shared secrets are identical\n");
- }
-}
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/library.properties b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/library.properties
deleted file mode 100644
index 390bdc87a..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/library.properties
+++ /dev/null
@@ -1,9 +0,0 @@
-name=micro-ecc
-version=1.0.0
-author=Kenneth MacKay
-maintainer=Kenneth MacKay
-sentence=uECC
-paragraph=A small and fast ECDH and ECDSA implementation for 8-bit, 32-bit, and 64-bit processors.
-category=Other
-url=https://github.com/kmackay/micro-ecc
-architectures=*
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/platform-specific.inc b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/platform-specific.inc
deleted file mode 100644
index 7e0373f50..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/platform-specific.inc
+++ /dev/null
@@ -1,94 +0,0 @@
-/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_PLATFORM_SPECIFIC_H_
-#define _UECC_PLATFORM_SPECIFIC_H_
-
-#include "types.h"
-
-#if (defined(_WIN32) || defined(_WIN64))
-/* Windows */
-
-// use pragma syntax to prevent tweaking the linker script for getting CryptXYZ function
-#pragma comment(lib, "crypt32.lib")
-#pragma comment(lib, "advapi32.lib")
-
-#define WIN32_LEAN_AND_MEAN
-#include
-#include
-
-static int default_RNG(uint8_t *dest, unsigned size) {
- HCRYPTPROV prov;
- if (!CryptAcquireContext(&prov, NULL, NULL, PROV_RSA_FULL, CRYPT_VERIFYCONTEXT)) {
- return 0;
- }
-
- CryptGenRandom(prov, size, (BYTE *)dest);
- CryptReleaseContext(prov, 0);
- return 1;
-}
-#define default_RNG_defined 1
-
-#elif defined(unix) || defined(__linux__) || defined(__unix__) || defined(__unix) || \
- (defined(__APPLE__) && defined(__MACH__)) || defined(uECC_POSIX)
-
-/* Some POSIX-like system with /dev/urandom or /dev/random. */
-#include
-#include
-#include
-
-#ifndef O_CLOEXEC
- #define O_CLOEXEC 0
-#endif
-
-static int default_RNG(uint8_t *dest, unsigned size) {
- int fd = open("/dev/urandom", O_RDONLY | O_CLOEXEC);
- if (fd == -1) {
- fd = open("/dev/random", O_RDONLY | O_CLOEXEC);
- if (fd == -1) {
- return 0;
- }
- }
-
- char *ptr = (char *)dest;
- size_t left = size;
- while (left > 0) {
- ssize_t bytes_read = read(fd, ptr, left);
- if (bytes_read <= 0) { // read failed
- close(fd);
- return 0;
- }
- left -= bytes_read;
- ptr += bytes_read;
- }
-
- close(fd);
- return 1;
-}
-#define default_RNG_defined 1
-
-#elif defined(RIOT_VERSION)
-
-#include
-
-static int default_RNG(uint8_t *dest, unsigned size) {
- random_bytes(dest, size);
- return 1;
-}
-#define default_RNG_defined 1
-
-#elif defined(NRF52_SERIES)
-
-#include "app_error.h"
-#include "nrf_crypto_rng.h"
-
-static int default_RNG(uint8_t *dest, unsigned size)
-{
- // make sure to call nrf_crypto_init and nrf_crypto_rng_init first
- ret_code_t ret_code = nrf_crypto_rng_vector_generate(dest, size);
- return (ret_code == NRF_SUCCESS) ? 1 : 0;
-}
-#define default_RNG_defined 1
-
-#endif /* platform */
-
-#endif /* _UECC_PLATFORM_SPECIFIC_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/mult_arm.py b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/mult_arm.py
deleted file mode 100755
index 402ace190..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/mult_arm.py
+++ /dev/null
@@ -1,188 +0,0 @@
-#!/usr/bin/env python
-
-import sys
-
-if len(sys.argv) < 2:
- print "Provide the integer size in 32-bit words"
- sys.exit(1)
-
-size = int(sys.argv[1])
-
-full_rows = size // 3
-init_size = size % 3
-
-if init_size == 0:
- full_rows = full_rows - 1
- init_size = 3
-
-def emit(line, *args):
- s = '"' + line + r' \n\t"'
- print s % args
-
-rx = [3, 4, 5]
-ry = [6, 7, 8]
-
-#### set up registers
-emit("add r0, %s", (size - init_size) * 4) # move z
-emit("add r2, %s", (size - init_size) * 4) # move y
-
-emit("ldmia r1!, {%s}", ", ".join(["r%s" % (rx[i]) for i in xrange(init_size)]))
-emit("ldmia r2!, {%s}", ", ".join(["r%s" % (ry[i]) for i in xrange(init_size)]))
-
-print ""
-if init_size == 1:
- emit("umull r9, r10, r3, r6")
- emit("stmia r0!, {r9, r10}")
-else:
- #### first two multiplications of initial block
- emit("umull r11, r12, r3, r6")
- emit("stmia r0!, {r11}")
- print ""
- emit("mov r10, #0")
- emit("umull r11, r9, r3, r7")
- emit("adds r12, r12, r11")
- emit("adc r9, r9, #0")
- emit("umull r11, r14, r4, r6")
- emit("adds r12, r12, r11")
- emit("adcs r9, r9, r14")
- emit("adc r10, r10, #0")
- emit("stmia r0!, {r12}")
- print ""
-
- #### rest of initial block, with moving accumulator registers
- acc = [9, 10, 11, 12, 14]
- if init_size == 3:
- emit("mov r%s, #0", acc[2])
- for i in xrange(0, 3):
- emit("umull r%s, r%s, r%s, r%s", acc[3], acc[4], rx[i], ry[2 - i])
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], acc[4])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
- emit("stmia r0!, {r%s}", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- emit("mov r%s, #0", acc[2])
- for i in xrange(0, 2):
- emit("umull r%s, r%s, r%s, r%s", acc[3], acc[4], rx[i + 1], ry[2 - i])
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], acc[4])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
- emit("stmia r0!, {r%s}", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- emit("umull r%s, r%s, r%s, r%s", acc[3], acc[4], rx[init_size-1], ry[init_size-1])
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adc r%s, r%s, r%s", acc[1], acc[1], acc[4])
- emit("stmia r0!, {r%s}", acc[0])
- emit("stmia r0!, {r%s}", acc[1])
-print ""
-
-#### reset y and z pointers
-emit("sub r0, %s", (2 * init_size + 3) * 4)
-emit("sub r2, %s", (init_size + 3) * 4)
-
-#### load y registers
-emit("ldmia r2!, {%s}", ", ".join(["r%s" % (ry[i]) for i in xrange(3)]))
-
-#### load additional x registers
-if init_size != 3:
- emit("ldmia r1!, {%s}", ", ".join(["r%s" % (rx[i]) for i in xrange(init_size, 3)]))
-print ""
-
-prev_size = init_size
-for row in xrange(full_rows):
- emit("umull r11, r12, r3, r6")
- emit("stmia r0!, {r11}")
- print ""
- emit("mov r10, #0")
- emit("umull r11, r9, r3, r7")
- emit("adds r12, r12, r11")
- emit("adc r9, r9, #0")
- emit("umull r11, r14, r4, r6")
- emit("adds r12, r12, r11")
- emit("adcs r9, r9, r14")
- emit("adc r10, r10, #0")
- emit("stmia r0!, {r12}")
- print ""
-
- acc = [9, 10, 11, 12, 14]
- emit("mov r%s, #0", acc[2])
- for i in xrange(0, 3):
- emit("umull r%s, r%s, r%s, r%s", acc[3], acc[4], rx[i], ry[2 - i])
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], acc[4])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
- emit("stmia r0!, {r%s}", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- #### now we need to start shifting x and loading from z
- x_regs = [3, 4, 5]
- for r in xrange(0, prev_size):
- x_regs = x_regs[1:] + x_regs[:1]
- emit("ldmia r1!, {r%s}", x_regs[2])
- emit("mov r%s, #0", acc[2])
- for i in xrange(0, 3):
- emit("umull r%s, r%s, r%s, r%s", acc[3], acc[4], x_regs[i], ry[2 - i])
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], acc[4])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
- emit("ldr r%s, [r0]", acc[3]) # load stored value from initial block, and add to accumulator
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adcs r%s, r%s, #0", acc[1], acc[1])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
- emit("stmia r0!, {r%s}", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- # done shifting x, start shifting y
- y_regs = [6, 7, 8]
- for r in xrange(0, prev_size):
- y_regs = y_regs[1:] + y_regs[:1]
- emit("ldmia r2!, {r%s}", y_regs[2])
- emit("mov r%s, #0", acc[2])
- for i in xrange(0, 3):
- emit("umull r%s, r%s, r%s, r%s", acc[3], acc[4], x_regs[i], y_regs[2 - i])
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], acc[4])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
- emit("ldr r%s, [r0]", acc[3]) # load stored value from initial block, and add to accumulator
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adcs r%s, r%s, #0", acc[1], acc[1])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
- emit("stmia r0!, {r%s}", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- # done both shifts, do remaining corner
- emit("mov r%s, #0", acc[2])
- for i in xrange(0, 2):
- emit("umull r%s, r%s, r%s, r%s", acc[3], acc[4], x_regs[i + 1], y_regs[2 - i])
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], acc[4])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
- emit("stmia r0!, {r%s}", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- emit("umull r%s, r%s, r%s, r%s", acc[3], acc[4], x_regs[2], y_regs[2])
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[3])
- emit("adc r%s, r%s, r%s", acc[1], acc[1], acc[4])
- emit("stmia r0!, {r%s}", acc[0])
- emit("stmia r0!, {r%s}", acc[1])
- print ""
-
- prev_size = prev_size + 3
- if row < full_rows - 1:
- #### reset x, y and z pointers
- emit("sub r0, %s", (2 * prev_size + 3) * 4)
- emit("sub r1, %s", prev_size * 4)
- emit("sub r2, %s", (prev_size + 3) * 4)
-
- #### load x and y registers
- emit("ldmia r1!, {%s}", ",".join(["r%s" % (rx[i]) for i in xrange(3)]))
- emit("ldmia r2!, {%s}", ",".join(["r%s" % (ry[i]) for i in xrange(3)]))
-
- print ""
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/mult_avr.py b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/mult_avr.py
deleted file mode 100755
index d40e4c23d..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/mult_avr.py
+++ /dev/null
@@ -1,203 +0,0 @@
-#!/usr/bin/env python
-
-import sys
-
-if len(sys.argv) < 2:
- print "Provide the integer size in bytes"
- sys.exit(1)
-
-size = int(sys.argv[1])
-
-full_rows = size // 10
-init_size = size % 10
-
-if init_size == 0:
- full_rows = full_rows - 1
- init_size = 10
-
-def rx(i):
- return i + 2
-
-def ry(i):
- return i + 12
-
-def emit(line, *args):
- s = '"' + line + r' \n\t"'
- print s % args
-
-#### set up registers
-emit("adiw r30, %s", size - init_size) # move z
-emit("adiw r28, %s", size - init_size) # move y
-
-for i in xrange(init_size):
- emit("ld r%s, x+", rx(i))
-for i in xrange(init_size):
- emit("ld r%s, y+", ry(i))
-
-emit("ldi r25, 0")
-print ""
-if init_size == 1:
- emit("mul r2, r12")
- emit("st z+, r0")
- emit("st z+, r1")
-else:
- #### first two multiplications of initial block
- emit("ldi r23, 0")
- emit("mul r2, r12")
- emit("st z+, r0")
- emit("mov r22, r1")
- print ""
- emit("ldi r24, 0")
- emit("mul r2, r13")
- emit("add r22, r0")
- emit("adc r23, r1")
- emit("mul r3, r12")
- emit("add r22, r0")
- emit("adc r23, r1")
- emit("adc r24, r25")
- emit("st z+, r22")
- print ""
-
- #### rest of initial block, with moving accumulator registers
- acc = [23, 24, 22]
- for r in xrange(2, init_size):
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, r+1):
- emit("mul r%s, r%s", rx(i), ry(r - i))
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, r25", acc[2])
- emit("st z+, r%s", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
- for r in xrange(1, init_size-1):
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, init_size-r):
- emit("mul r%s, r%s", rx(r+i), ry((init_size-1) - i))
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, r25", acc[2])
- emit("st z+, r%s", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
- emit("mul r%s, r%s", rx(init_size-1), ry(init_size-1))
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("st z+, r%s", acc[0])
- emit("st z+, r%s", acc[1])
-print ""
-
-#### reset y and z pointers
-emit("sbiw r30, %s", 2 * init_size + 10)
-emit("sbiw r28, %s", init_size + 10)
-
-#### load y registers
-for i in xrange(10):
- emit("ld r%s, y+", ry(i))
-
-#### load additional x registers
-for i in xrange(init_size, 10):
- emit("ld r%s, x+", rx(i))
-print ""
-
-prev_size = init_size
-for row in xrange(full_rows):
- #### do x = 0-9, y = 0-9 multiplications
- emit("ldi r23, 0")
- emit("mul r2, r12")
- emit("st z+, r0")
- emit("mov r22, r1")
- print ""
- emit("ldi r24, 0")
- emit("mul r2, r13")
- emit("add r22, r0")
- emit("adc r23, r1")
- emit("mul r3, r12")
- emit("add r22, r0")
- emit("adc r23, r1")
- emit("adc r24, r25")
- emit("st z+, r22")
- print ""
-
- acc = [23, 24, 22]
- for r in xrange(2, 10):
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, r+1):
- emit("mul r%s, r%s", rx(i), ry(r - i))
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, r25", acc[2])
- emit("st z+, r%s", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- #### now we need to start shifting x and loading from z
- x_regs = [2, 3, 4, 5, 6, 7, 8, 9, 10, 11]
- for r in xrange(0, prev_size):
- x_regs = x_regs[1:] + x_regs[:1]
- emit("ld r%s, x+", x_regs[9]) # load next byte of left
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, 10):
- emit("mul r%s, r%s", x_regs[i], ry(9 - i))
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, r25", acc[2])
- emit("ld r0, z") # load stored value from initial block, and add to accumulator (note z does not increment)
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r25", acc[1])
- emit("adc r%s, r25", acc[2])
- emit("st z+, r%s", acc[0]) # store next byte (z increments)
- print ""
- acc = acc[1:] + acc[:1]
-
- # done shifting x, start shifting y
- y_regs = [12, 13, 14, 15, 16, 17, 18, 19, 20, 21]
- for r in xrange(0, prev_size):
- y_regs = y_regs[1:] + y_regs[:1]
- emit("ld r%s, y+", y_regs[9]) # load next byte of right
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, 10):
- emit("mul r%s, r%s", x_regs[i], y_regs[9 -i])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, r25", acc[2])
- emit("ld r0, z") # load stored value from initial block, and add to accumulator (note z does not increment)
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r25", acc[1])
- emit("adc r%s, r25", acc[2])
- emit("st z+, r%s", acc[0]) # store next byte (z increments)
- print ""
- acc = acc[1:] + acc[:1]
-
- # done both shifts, do remaining corner
- for r in xrange(1, 9):
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, 10-r):
- emit("mul r%s, r%s", x_regs[r+i], y_regs[9 - i])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, r25", acc[2])
- emit("st z+, r%s", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
- emit("mul r%s, r%s", x_regs[9], y_regs[9])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("st z+, r%s", acc[0])
- emit("st z+, r%s", acc[1])
- print ""
-
- prev_size = prev_size + 10
- if row < full_rows - 1:
- #### reset x, y and z pointers
- emit("sbiw r30, %s", 2 * prev_size + 10)
- emit("sbiw r28, %s", prev_size + 10)
- emit("sbiw r26, %s", prev_size)
-
- #### load x and y registers
- for i in xrange(10):
- emit("ld r%s, x+", rx(i))
- emit("ld r%s, y+", ry(i))
- print ""
-
-emit("eor r1, r1")
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/mult_avr_extra.py b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/mult_avr_extra.py
deleted file mode 100755
index f6e654f6a..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/mult_avr_extra.py
+++ /dev/null
@@ -1,143 +0,0 @@
-#!/usr/bin/env python
-
-import sys
-
-if len(sys.argv) < 2:
- print "Provide the integer size in bytes"
- sys.exit(1)
-
-size = int(sys.argv[1])
-
-def lhi(i):
- return i + 2
-
-def rhi(i):
- return i + 6
-
-left_lo = [10, 11, 12, 13]
-right_lo = [14, 15, 16, 17]
-
-def llo(i):
- return left_lo[i]
-
-def rlo(i):
- return right_lo[i]
-
-def emit(line, *args):
- s = '"' + line + r' \n\t"'
- print s % args
-
-def update_low():
- global left_lo
- global right_lo
- left_lo = left_lo[1:] + left_lo[:1]
- right_lo = right_lo[1:] + right_lo[:1]
- emit("ld r%s, x+", left_lo[3])
- emit("ld r%s, y+", right_lo[3])
-
-accum = [19, 20, 21]
-
-def acc(i):
- return accum[i]
-
-def rotate_acc():
- global accum
- accum = accum[1:] + accum[:1]
-
-# Load high values
-for i in xrange(4):
- emit("ld r%s, x+", lhi(i))
- emit("ld r%s, y+", rhi(i))
-
-emit("sbiw r26, %s", size + 4)
-emit("sbiw r28, %s", size + 4)
-emit("sbiw r30, %s", size)
-
-# Load low values
-for i in xrange(4):
- emit("ld r%s, x+", llo(i))
- emit("ld r%s, y+", rlo(i))
-print ""
-
-# Compute initial triangles
-emit("mul r%s, r%s", lhi(0), rlo(0))
-emit("mov r%s, r0", acc(0))
-emit("mov r%s, r1", acc(1))
-emit("ldi r%s, 0", acc(2))
-emit("ld r0, z")
-emit("add r%s, r0", acc(0))
-emit("adc r%s, r25", acc(1))
-emit("mul r%s, r%s", rhi(0), llo(0))
-emit("add r%s, r0", acc(0))
-emit("adc r%s, r1", acc(1))
-emit("adc r%s, r25", acc(2))
-emit("st z+, r%s", acc(0))
-print ""
-rotate_acc()
-
-for i in xrange(1, 4):
- emit("ldi r%s, 0", acc(2))
- emit("ld r0, z")
- emit("add r%s, r0", acc(0))
- emit("adc r%s, r25", acc(1))
- for j in xrange(i + 1):
- emit("mul r%s, r%s", lhi(j), rlo(i-j))
- emit("add r%s, r0", acc(0))
- emit("adc r%s, r1", acc(1))
- emit("adc r%s, r25", acc(2))
- emit("mul r%s, r%s", rhi(j), llo(i-j))
- emit("add r%s, r0", acc(0))
- emit("adc r%s, r1", acc(1))
- emit("adc r%s, r25", acc(2))
- emit("st z+, r%s", acc(0))
- print ""
- rotate_acc()
-
-# Compute rows overlapping old block
-for i in xrange(4, size):
- emit("ldi r%s, 0", acc(2))
- emit("ld r0, z")
- emit("add r%s, r0", acc(0))
- emit("adc r%s, r25", acc(1))
- update_low()
- for j in xrange(4):
- emit("mul r%s, r%s", lhi(j), rlo(3-j))
- emit("add r%s, r0", acc(0))
- emit("adc r%s, r1", acc(1))
- emit("adc r%s, r25", acc(2))
- emit("mul r%s, r%s", rhi(j), llo(3-j))
- emit("add r%s, r0", acc(0))
- emit("adc r%s, r1", acc(1))
- emit("adc r%s, r25", acc(2))
- emit("st z+, r%s", acc(0))
- print ""
- rotate_acc()
-
-# Compute new triangle
-left_combined = [llo(1), llo(2), llo(3), lhi(0), lhi(1), lhi(2), lhi(3)]
-right_combined = [rlo(1), rlo(2), rlo(3), rhi(0), rhi(1), rhi(2), rhi(3)]
-
-def left(i):
- return left_combined[i]
-
-def right(i):
- return right_combined[i]
-
-for i in xrange(6):
- emit("ldi r%s, 0", acc(2))
- for j in xrange(7 - i):
- emit("mul r%s, r%s", left(i+j), right(6-j))
- emit("add r%s, r0", acc(0))
- emit("adc r%s, r1", acc(1))
- emit("adc r%s, r25", acc(2))
- emit("st z+, r%s", acc(0))
- print ""
- rotate_acc()
-
-emit("mul r%s, r%s", left(6), right(6))
-emit("add r%s, r0", acc(0))
-emit("adc r%s, r1", acc(1))
-emit("st z+, r%s", acc(0))
-emit("st z+, r%s", acc(1))
-emit("adiw r26, 4")
-emit("adiw r28, 4")
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/square_arm.py b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/square_arm.py
deleted file mode 100755
index 5330c7e63..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/square_arm.py
+++ /dev/null
@@ -1,242 +0,0 @@
-#!/usr/bin/env python
-
-import sys
-
-if len(sys.argv) < 2:
- print "Provide the integer size in 32-bit words"
- sys.exit(1)
-
-size = int(sys.argv[1])
-
-if size > 8:
- print "This script doesn't work with integer size %s due to laziness" % (size)
- sys.exit(1)
-
-init_size = 0
-if size > 6:
- init_size = size - 6
-
-def emit(line, *args):
- s = '"' + line + r' \n\t"'
- print s % args
-
-def mulacc(acc, r1, r2):
- if size <= 6:
- emit("umull r1, r14, r%s, r%s", r1, r2)
- emit("adds r%s, r%s, r1", acc[0], acc[0])
- emit("adcs r%s, r%s, r14", acc[1], acc[1])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
- else:
- emit("mov r14, r%s", acc[1])
- emit("umlal r%s, r%s, r%s, r%s", acc[0], acc[1], r1, r2)
- emit("cmp r14, r%s", acc[1])
- emit("it hi")
- emit("adchi r%s, r%s, #0", acc[2], acc[2])
-
-r = [2, 3, 4, 5, 6, 7]
-
-s = size - init_size
-
-if init_size == 1:
- emit("ldmia r1!, {r2}")
- emit("add r1, %s", (size - init_size * 2) * 4)
- emit("ldmia r1!, {r5}")
-
- emit("add r0, %s", (size - init_size) * 4)
- emit("umull r8, r9, r2, r5")
- emit("stmia r0!, {r8, r9}")
-
- emit("sub r0, %s", (size + init_size) * 4)
- emit("sub r1, %s", (size) * 4)
- print ""
-elif init_size == 2:
- emit("ldmia r1!, {r2, r3}")
- emit("add r1, %s", (size - init_size * 2) * 4)
- emit("ldmia r1!, {r5, r6}")
-
- emit("add r0, %s", (size - init_size) * 4)
- print ""
-
- emit("umull r8, r9, r2, r5")
- emit("stmia r0!, {r8}")
- print ""
-
- emit("umull r12, r10, r2, r6")
- emit("adds r9, r9, r12")
- emit("adc r10, r10, #0")
- emit("stmia r0!, {r9}")
- print ""
-
- emit("umull r8, r9, r3, r6")
- emit("adds r10, r10, r8")
- emit("adc r11, r9, #0")
- emit("stmia r0!, {r10, r11}")
- print ""
-
- emit("sub r0, %s", (size + init_size) * 4)
- emit("sub r1, %s", (size) * 4)
-
-# load input words
-emit("ldmia r1!, {%s}", ", ".join(["r%s" % (r[i]) for i in xrange(s)]))
-print ""
-
-emit("umull r11, r12, r2, r2")
-emit("stmia r0!, {r11}")
-print ""
-emit("mov r9, #0")
-emit("umull r10, r11, r2, r3")
-emit("adds r12, r12, r10")
-emit("adcs r8, r11, #0")
-emit("adc r9, r9, #0")
-emit("adds r12, r12, r10")
-emit("adcs r8, r8, r11")
-emit("adc r9, r9, #0")
-emit("stmia r0!, {r12}")
-print ""
-emit("mov r10, #0")
-emit("umull r11, r12, r2, r4")
-emit("adds r11, r11, r11")
-emit("adcs r12, r12, r12")
-emit("adc r10, r10, #0")
-emit("adds r8, r8, r11")
-emit("adcs r9, r9, r12")
-emit("adc r10, r10, #0")
-emit("umull r11, r12, r3, r3")
-emit("adds r8, r8, r11")
-emit("adcs r9, r9, r12")
-emit("adc r10, r10, #0")
-emit("stmia r0!, {r8}")
-print ""
-
-acc = [8, 9, 10]
-old_acc = [11, 12]
-for i in xrange(3, s):
- emit("mov r%s, #0", old_acc[1])
- tmp = [acc[1], acc[2]]
- acc = [acc[0], old_acc[0], old_acc[1]]
- old_acc = tmp
-
- # gather non-equal words
- emit("umull r%s, r%s, r%s, r%s", acc[0], acc[1], r[0], r[i])
- for j in xrange(1, (i+1)//2):
- mulacc(acc, r[j], r[i-j])
- # multiply by 2
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[0])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], acc[1])
- emit("adc r%s, r%s, r%s", acc[2], acc[2], acc[2])
-
- # add equal word (if any)
- if ((i+1) % 2) != 0:
- mulacc(acc, r[i//2], r[i//2])
-
- # add old accumulator
- emit("adds r%s, r%s, r%s", acc[0], acc[0], old_acc[0])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], old_acc[1])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
-
- # store
- emit("stmia r0!, {r%s}", acc[0])
- print ""
-
-regs = list(r)
-for i in xrange(init_size):
- regs = regs[1:] + regs[:1]
- emit("ldmia r1!, {r%s}", regs[5])
-
- for limit in [4, 5]:
- emit("mov r%s, #0", old_acc[1])
- tmp = [acc[1], acc[2]]
- acc = [acc[0], old_acc[0], old_acc[1]]
- old_acc = tmp
-
- # gather non-equal words
- emit("umull r%s, r%s, r%s, r%s", acc[0], acc[1], regs[0], regs[limit])
- for j in xrange(1, (limit+1)//2):
- mulacc(acc, regs[j], regs[limit-j])
-
- emit("ldr r14, [r0]") # load stored value from initial block, and add to accumulator
- emit("adds r%s, r%s, r14", acc[0], acc[0])
- emit("adcs r%s, r%s, #0", acc[1], acc[1])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
-
- # multiply by 2
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[0])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], acc[1])
- emit("adc r%s, r%s, r%s", acc[2], acc[2], acc[2])
-
- # add equal word
- if limit == 4:
- mulacc(acc, regs[2], regs[2])
-
- # add old accumulator
- emit("adds r%s, r%s, r%s", acc[0], acc[0], old_acc[0])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], old_acc[1])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
-
- # store
- emit("stmia r0!, {r%s}", acc[0])
- print ""
-
-for i in xrange(1, s-3):
- emit("mov r%s, #0", old_acc[1])
- tmp = [acc[1], acc[2]]
- acc = [acc[0], old_acc[0], old_acc[1]]
- old_acc = tmp
-
- # gather non-equal words
- emit("umull r%s, r%s, r%s, r%s", acc[0], acc[1], regs[i], regs[s - 1])
- for j in xrange(1, (s-i)//2):
- mulacc(acc, regs[i+j], regs[s - 1 - j])
-
- # multiply by 2
- emit("adds r%s, r%s, r%s", acc[0], acc[0], acc[0])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], acc[1])
- emit("adc r%s, r%s, r%s", acc[2], acc[2], acc[2])
-
- # add equal word (if any)
- if ((s-i) % 2) != 0:
- mulacc(acc, regs[i + (s-i)//2], regs[i + (s-i)//2])
-
- # add old accumulator
- emit("adds r%s, r%s, r%s", acc[0], acc[0], old_acc[0])
- emit("adcs r%s, r%s, r%s", acc[1], acc[1], old_acc[1])
- emit("adc r%s, r%s, #0", acc[2], acc[2])
-
- # store
- emit("stmia r0!, {r%s}", acc[0])
- print ""
-
-acc = acc[1:] + acc[:1]
-emit("mov r%s, #0", acc[2])
-emit("umull r1, r%s, r%s, r%s", old_acc[1], regs[s - 3], regs[s - 1])
-emit("adds r1, r1, r1")
-emit("adcs r%s, r%s, r%s", old_acc[1], old_acc[1], old_acc[1])
-emit("adc r%s, r%s, #0", acc[2], acc[2])
-emit("adds r%s, r%s, r1", acc[0], acc[0])
-emit("adcs r%s, r%s, r%s", acc[1], acc[1], old_acc[1])
-emit("adc r%s, r%s, #0", acc[2], acc[2])
-emit("umull r1, r%s, r%s, r%s", old_acc[1], regs[s - 2], regs[s - 2])
-emit("adds r%s, r%s, r1", acc[0], acc[0])
-emit("adcs r%s, r%s, r%s", acc[1], acc[1], old_acc[1])
-emit("adc r%s, r%s, #0", acc[2], acc[2])
-emit("stmia r0!, {r%s}", acc[0])
-print ""
-
-acc = acc[1:] + acc[:1]
-emit("mov r%s, #0", acc[2])
-emit("umull r1, r%s, r%s, r%s", old_acc[1], regs[s - 2], regs[s - 1])
-emit("adds r1, r1, r1")
-emit("adcs r%s, r%s, r%s", old_acc[1], old_acc[1], old_acc[1])
-emit("adc r%s, r%s, #0", acc[2], acc[2])
-emit("adds r%s, r%s, r1", acc[0], acc[0])
-emit("adcs r%s, r%s, r%s", acc[1], acc[1], old_acc[1])
-emit("adc r%s, r%s, #0", acc[2], acc[2])
-emit("stmia r0!, {r%s}", acc[0])
-print ""
-
-acc = acc[1:] + acc[:1]
-emit("umull r1, r%s, r%s, r%s", old_acc[1], regs[s - 1], regs[s - 1])
-emit("adds r%s, r%s, r1", acc[0], acc[0])
-emit("adcs r%s, r%s, r%s", acc[1], acc[1], old_acc[1])
-emit("stmia r0!, {r%s}", acc[0])
-emit("stmia r0!, {r%s}", acc[1])
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/square_avr.py b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/square_avr.py
deleted file mode 100755
index 6571c3b3c..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/scripts/square_avr.py
+++ /dev/null
@@ -1,327 +0,0 @@
-#!/usr/bin/env python
-
-import sys
-
-if len(sys.argv) < 2:
- print "Provide the integer size in bytes"
- sys.exit(1)
-
-size = int(sys.argv[1])
-
-if size > 40:
- print "This script doesn't work with integer size %s due to laziness" % (size)
- sys.exit(1)
-
-init_size = size - 20
-if size < 20:
- init_size = 0
-
-def rg(i):
- return i + 2
-
-def lo(i):
- return i + 2
-
-def hi(i):
- return i + 12
-
-def emit(line, *args):
- s = '"' + line + r' \n\t"'
- print s % args
-
-#### set up registers
-zero = "r25"
-emit("ldi %s, 0", zero) # zero register
-
-if init_size > 0:
- emit("movw r28, r26") # y = x
- h = (init_size + 1)//2
-
- for i in xrange(h):
- emit("ld r%s, x+", lo(i))
- emit("adiw r28, %s", size - init_size) # move y to other end
- for i in xrange(h):
- emit("ld r%s, y+", hi(i))
-
- emit("adiw r30, %s", size - init_size) # move z
-
- if init_size == 1:
- emit("mul %s, %s", lo(0), hi(0))
- emit("st z+, r0")
- emit("st z+, r1")
- else:
- #### first one
- print ""
- emit("ldi r23, 0")
- emit("mul %s, %s", lo(0), hi(0))
- emit("st z+, r0")
- emit("mov r22, r1")
- print ""
-
- #### rest of initial block, with moving accumulator registers
- acc = [22, 23, 24]
- for r in xrange(1, h):
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, (r+2)//2):
- emit("mul r%s, r%s", lo(i), hi(r - i))
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
- emit("st z+, r%s", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- lo_r = range(2, 2 + h)
- hi_r = range(12, 12 + h)
-
- # now we need to start loading more from the high end
- for r in xrange(h, init_size):
- hi_r = hi_r[1:] + hi_r[:1]
- emit("ld r%s, y+", hi_r[h-1])
-
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, (r+2)//2):
- emit("mul r%s, r%s", lo(i), hi_r[h - 1 - i])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
- emit("st z+, r%s", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- # loaded all of the high end bytes; now need to start loading the rest of the low end
- for r in xrange(1, init_size-h):
- lo_r = lo_r[1:] + lo_r[:1]
- emit("ld r%s, x+", lo_r[h-1])
-
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, (init_size+1 - r)//2):
- emit("mul r%s, r%s", lo_r[i], hi_r[h - 1 - i])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
- emit("st z+, r%s", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
-
- lo_r = lo_r[1:] + lo_r[:1]
- emit("ld r%s, x+", lo_r[h-1])
-
- # now we have loaded everything, and we just need to finish the last corner
- for r in xrange(init_size-h, init_size-1):
- emit("ldi r%s, 0", acc[2])
- for i in xrange(0, (init_size+1 - r)//2):
- emit("mul r%s, r%s", lo_r[i], hi_r[h - 1 - i])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
- emit("st z+, r%s", acc[0])
- print ""
- acc = acc[1:] + acc[:1]
- lo_r = lo_r[1:] + lo_r[:1] # make the indexing easy
-
- emit("mul r%s, r%s", lo_r[0], hi_r[h - 1])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("st z+, r%s", acc[0])
- emit("st z+, r%s", acc[1])
- print ""
- emit("sbiw r26, %s", init_size) # reset x
- emit("sbiw r30, %s", size + init_size) # reset z
-
-# TODO you could do more rows of size 20 here if your integers are larger than 40 bytes
-
-s = size - init_size
-
-for i in xrange(s):
- emit("ld r%s, x+", rg(i))
-
-#### first few columns
-# NOTE: this is only valid if size >= 3
-print ""
-emit("ldi r23, 0")
-emit("mul r%s, r%s", rg(0), rg(0))
-emit("st z+, r0")
-emit("mov r22, r1")
-print ""
-emit("ldi r24, 0")
-emit("mul r%s, r%s", rg(0), rg(1))
-emit("add r22, r0")
-emit("adc r23, r1")
-emit("adc r24, %s", zero)
-emit("add r22, r0")
-emit("adc r23, r1")
-emit("adc r24, %s", zero)
-emit("st z+, r22")
-print ""
-emit("ldi r22, 0")
-emit("mul r%s, r%s", rg(0), rg(2))
-emit("add r23, r0")
-emit("adc r24, r1")
-emit("adc r22, %s", zero)
-emit("add r23, r0")
-emit("adc r24, r1")
-emit("adc r22, %s", zero)
-emit("mul r%s, r%s", rg(1), rg(1))
-emit("add r23, r0")
-emit("adc r24, r1")
-emit("adc r22, %s", zero)
-emit("st z+, r23")
-print ""
-
-acc = [23, 24, 22]
-old_acc = [28, 29]
-for i in xrange(3, s):
- emit("ldi r%s, 0", old_acc[1])
- tmp = [acc[1], acc[2]]
- acc = [acc[0], old_acc[0], old_acc[1]]
- old_acc = tmp
-
- # gather non-equal words
- emit("mul r%s, r%s", rg(0), rg(i))
- emit("mov r%s, r0", acc[0])
- emit("mov r%s, r1", acc[1])
- for j in xrange(1, (i+1)//2):
- emit("mul r%s, r%s", rg(j), rg(i-j))
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
- # multiply by 2
- emit("lsl r%s", acc[0])
- emit("rol r%s", acc[1])
- emit("rol r%s", acc[2])
-
- # add equal word (if any)
- if ((i+1) % 2) != 0:
- emit("mul r%s, r%s", rg(i//2), rg(i//2))
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
-
- # add old accumulator
- emit("add r%s, r%s", acc[0], old_acc[0])
- emit("adc r%s, r%s", acc[1], old_acc[1])
- emit("adc r%s, %s", acc[2], zero)
-
- # store
- emit("st z+, r%s", acc[0])
- print ""
-
-regs = range(2, 22)
-for i in xrange(init_size):
- regs = regs[1:] + regs[:1]
- emit("ld r%s, x+", regs[19])
-
- for limit in [18, 19]:
- emit("ldi r%s, 0", old_acc[1])
- tmp = [acc[1], acc[2]]
- acc = [acc[0], old_acc[0], old_acc[1]]
- old_acc = tmp
-
- # gather non-equal words
- emit("mul r%s, r%s", regs[0], regs[limit])
- emit("mov r%s, r0", acc[0])
- emit("mov r%s, r1", acc[1])
- for j in xrange(1, (limit+1)//2):
- emit("mul r%s, r%s", regs[j], regs[limit-j])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
-
- emit("ld r0, z") # load stored value from initial block, and add to accumulator (note z does not increment)
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r25", acc[1])
- emit("adc r%s, r25", acc[2])
-
- # multiply by 2
- emit("lsl r%s", acc[0])
- emit("rol r%s", acc[1])
- emit("rol r%s", acc[2])
-
- # add equal word
- if limit == 18:
- emit("mul r%s, r%s", regs[9], regs[9])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
-
- # add old accumulator
- emit("add r%s, r%s", acc[0], old_acc[0])
- emit("adc r%s, r%s", acc[1], old_acc[1])
- emit("adc r%s, %s", acc[2], zero)
-
- # store
- emit("st z+, r%s", acc[0])
- print ""
-
-for i in xrange(1, s-3):
- emit("ldi r%s, 0", old_acc[1])
- tmp = [acc[1], acc[2]]
- acc = [acc[0], old_acc[0], old_acc[1]]
- old_acc = tmp
-
- # gather non-equal words
- emit("mul r%s, r%s", regs[i], regs[s - 1])
- emit("mov r%s, r0", acc[0])
- emit("mov r%s, r1", acc[1])
- for j in xrange(1, (s-i)//2):
- emit("mul r%s, r%s", regs[i+j], regs[s - 1 - j])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
- # multiply by 2
- emit("lsl r%s", acc[0])
- emit("rol r%s", acc[1])
- emit("rol r%s", acc[2])
-
- # add equal word (if any)
- if ((s-i) % 2) != 0:
- emit("mul r%s, r%s", regs[i + (s-i)//2], regs[i + (s-i)//2])
- emit("add r%s, r0", acc[0])
- emit("adc r%s, r1", acc[1])
- emit("adc r%s, %s", acc[2], zero)
-
- # add old accumulator
- emit("add r%s, r%s", acc[0], old_acc[0])
- emit("adc r%s, r%s", acc[1], old_acc[1])
- emit("adc r%s, %s", acc[2], zero)
-
- # store
- emit("st z+, r%s", acc[0])
- print ""
-
-acc = acc[1:] + acc[:1]
-emit("ldi r%s, 0", acc[2])
-emit("mul r%s, r%s", regs[17], regs[19])
-emit("add r%s, r0", acc[0])
-emit("adc r%s, r1", acc[1])
-emit("adc r%s, %s", acc[2], zero)
-emit("add r%s, r0", acc[0])
-emit("adc r%s, r1", acc[1])
-emit("adc r%s, %s", acc[2], zero)
-emit("mul r%s, r%s", regs[18], regs[18])
-emit("add r%s, r0", acc[0])
-emit("adc r%s, r1", acc[1])
-emit("adc r%s, %s", acc[2], zero)
-emit("st z+, r%s", acc[0])
-print ""
-
-acc = acc[1:] + acc[:1]
-emit("ldi r%s, 0", acc[2])
-emit("mul r%s, r%s", regs[18], regs[19])
-emit("add r%s, r0", acc[0])
-emit("adc r%s, r1", acc[1])
-emit("adc r%s, %s", acc[2], zero)
-emit("add r%s, r0", acc[0])
-emit("adc r%s, r1", acc[1])
-emit("adc r%s, %s", acc[2], zero)
-emit("st z+, r%s", acc[0])
-print ""
-
-emit("mul r%s, r%s", regs[19], regs[19])
-emit("add r%s, r0", acc[1])
-emit("adc r%s, r1", acc[2])
-emit("st z+, r%s", acc[1])
-
-emit("st z+, r%s", acc[2])
-emit("eor r1, r1")
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/test/ecdsa_test_vectors.c b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/test/ecdsa_test_vectors.c
deleted file mode 100644
index 1e902b266..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/test/ecdsa_test_vectors.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/* Copyright 2020, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#include "uECC.h"
-
-#include
-#include
-#include
-
-typedef struct {
- const char* private_key;
- const char* public_key;
- const char* k;
- const char* hash;
- const char* r;
- const char* s;
-} Test;
-
-Test secp256k1_tests[] = {
- {
- "ebb2c082fd7727890a28ac82f6bdf97bad8de9f5d7c9028692de1a255cad3e0f",
- "779dd197a5df977ed2cf6cb31d82d43328b790dc6b3b7d4437a427bd5847dfcde94b724a555b6d017bb7607c3e3281daf5b1699d6ef4124975c9237b917d426f",
- "49a0d7b786ec9cde0d0721d72804befd06571c974b191efb42ecf322ba9ddd9a",
- "4b688df40bcedbe641ddb16ff0a1842d9c67ea1c3bf63f3e0471baa664531d1a",
- "241097efbf8b63bf145c8961dbdf10c310efbb3b2676bbc0f8b08505c9e2f795",
- "021006b7838609339e8b415a7f9acb1b661828131aef1ecbc7955dfb01f3ca0e"
- },
-};
-
-extern int uECC_sign_with_k(const uint8_t *private_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- const uint8_t *k,
- uint8_t *signature,
- uECC_Curve curve);
-
-
-void vli_print(uint8_t *vli, unsigned int size) {
- for(unsigned i=0; i
-#include
-#include
-
-typedef struct {
- const char* k;
- const char* Q;
- int success;
-} Test;
-
-Test secp160r1_tests[] = {
- /* Note, I couldn't find any test vectors for secp160r1 online, so these are just
- generated on my desktop using uECC. */
- {
- "000000000000000000000000000000000000000000",
- "00000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
- {
- "000000000000000000000000000000000000000001",
- "00000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
- {
- "000000000000000000000000000000000000000002",
- "02F997F33C5ED04C55D3EDF8675D3E92E8F46686F083A323482993E9440E817E21CFB7737DF8797B",
- 1
- },
- {
- "000000000000000000000000000000000000000003",
- "7B76FF541EF363F2DF13DE1650BD48DAA958BC59C915CA790D8C8877B55BE0079D12854FFE9F6F5A",
- 1
- },
- { /* n - 4 */
- "0100000000000000000001F4C8F927AED3CA752253",
- "B4041D8683BE99F0AFE01C307B1AD4C100CF2A88C0CD35127BE0F73FF99F338B350B5A42864112F7",
- 1
- },
- { /* n - 3 */
- "0100000000000000000001F4C8F927AED3CA752254",
- "7B76FF541EF363F2DF13DE1650BD48DAA958BC5936EA3586F27377884AA41FF862ED7AAF816090A5",
- 1
- },
- { /* n - 2 */
- "0100000000000000000001F4C8F927AED3CA752255",
- "00000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
- { /* n - 1 */
- "0100000000000000000001F4C8F927AED3CA752256",
- "00000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
- { /* n */
- "0100000000000000000001F4C8F927AED3CA752257",
- "00000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
-};
-
-
-Test secp192r1_tests[] = {
- {
- "000000000000000000000000000000000000000000000000",
- "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
- {
- "000000000000000000000000000000000000000000000001",
- "188DA80EB03090F67CBF20EB43A18800F4FF0AFD82FF101207192B95FFC8DA78631011ED6B24CDD573F977A11E794811",
- 0
- },
- {
- "000000000000000000000000000000000000000000000002",
- "DAFEBF5828783F2AD35534631588A3F629A70FB16982A888DD6BDA0D993DA0FA46B27BBC141B868F59331AFA5C7E93AB",
- 1
- },
- {
- "000000000000000000000000000000000000000000000003",
- "76E32A2557599E6EDCD283201FB2B9AADFD0D359CBB263DA782C37E372BA4520AA62E0FED121D49EF3B543660CFD05FD",
- 1
- },
- { /* n - 4 */
- "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D2282D",
- "35433907297CC378B0015703374729D7A4FE46647084E4BA5D9B667B0DECA3CFE15C534F88932B0DDAC764CEE24C41CD",
- 1
- },
- { /* n - 3 */
- "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D2282E",
- "76E32A2557599E6EDCD283201FB2B9AADFD0D359CBB263DA87D3C81C8D45BADF559D1F012EDE2B600C4ABC99F302FA02",
- 1
- },
- { /* n - 2 */
- "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D2282F",
- "DAFEBF5828783F2AD35534631588A3F629A70FB16982A888229425F266C25F05B94D8443EBE4796FA6CCE505A3816C54",
- 0
- },
- { /* n - 1 */
- "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D22830",
- "188DA80EB03090F67CBF20EB43A18800F4FF0AFD82FF1012F8E6D46A003725879CEFEE1294DB32298C06885EE186B7EE",
- 0
- },
- { /* n */
- "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D22831",
- "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
-};
-
-Test secp224r1_tests[] = {
- {
- "00000000000000000000000000000000000000000000000000000000",
- "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
- {
- "00000000000000000000000000000000000000000000000000000001",
- "B70E0CBD6BB4BF7F321390B94A03C1D356C21122343280D6115C1D21BD376388B5F723FB4C22DFE6CD4375A05A07476444D5819985007E34",
- 0
- },
- {
- "00000000000000000000000000000000000000000000000000000002",
- "706A46DC76DCB76798E60E6D89474788D16DC18032D268FD1A704FA61C2B76A7BC25E7702A704FA986892849FCA629487ACF3709D2E4E8BB",
- 1
- },
- {
- "00000000000000000000000000000000000000000000000000000003",
- "DF1B1D66A551D0D31EFF822558B9D2CC75C2180279FE0D08FD896D04A3F7F03CADD0BE444C0AA56830130DDF77D317344E1AF3591981A925",
- 1
- },
- { /* n - 4 */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A39",
- "AE99FEEBB5D26945B54892092A8AEE02912930FA41CD114E40447301FB7DA7F5F13A43B81774373C879CD32D6934C05FA758EEB14FCFAB38",
- 1
- },
- { /* n - 3 */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3A",
- "DF1B1D66A551D0D31EFF822558B9D2CC75C2180279FE0D08FD896D045C080FC3522F41BBB3F55A97CFECF21F882CE8CBB1E50CA6E67E56DC",
- 1
- },
- { /* n - 2 */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3B",
- "706A46DC76DCB76798E60E6D89474788D16DC18032D268FD1A704FA6E3D4895843DA188FD58FB0567976D7B50359D6B78530C8F62D1B1746",
- 0
- },
- { /* n - 1 */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3C",
- "B70E0CBD6BB4BF7F321390B94A03C1D356C21122343280D6115C1D2142C89C774A08DC04B3DD201932BC8A5EA5F8B89BBB2A7E667AFF81CD",
- 0
- },
- { /* n */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3D",
- "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
-};
-
-Test secp256r1_tests[] = {
- {
- "0000000000000000000000000000000000000000000000000000000000000000",
- "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
- {
- "0000000000000000000000000000000000000000000000000000000000000001",
- "6B17D1F2E12C4247F8BCE6E563A440F277037D812DEB33A0F4A13945D898C2964FE342E2FE1A7F9B8EE7EB4A7C0F9E162BCE33576B315ECECBB6406837BF51F5",
- 0
- },
- {
- "0000000000000000000000000000000000000000000000000000000000000002",
- "7CF27B188D034F7E8A52380304B51AC3C08969E277F21B35A60B48FC4766997807775510DB8ED040293D9AC69F7430DBBA7DADE63CE982299E04B79D227873D1",
- 1
- },
- {
- "0000000000000000000000000000000000000000000000000000000000000003",
- "5ECBE4D1A6330A44C8F7EF951D4BF165E6C6B721EFADA985FB41661BC6E7FD6C8734640C4998FF7E374B06CE1A64A2ECD82AB036384FB83D9A79B127A27D5032",
- 1
- },
- { /* n - 4 */
- "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC63254D",
- "E2534A3532D08FBBA02DDE659EE62BD0031FE2DB785596EF509302446B0308521F0EA8A4B39CC339E62011A02579D289B103693D0CF11FFAA3BD3DC0E7B12739",
- 1
- },
- { /* n - 3 */
- "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC63254E",
- "5ECBE4D1A6330A44C8F7EF951D4BF165E6C6B721EFADA985FB41661BC6E7FD6C78CB9BF2B6670082C8B4F931E59B5D1327D54FCAC7B047C265864ED85D82AFCD",
- 1
- },
- { /* n - 2 */
- "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC63254F",
- "7CF27B188D034F7E8A52380304B51AC3C08969E277F21B35A60B48FC47669978F888AAEE24712FC0D6C26539608BCF244582521AC3167DD661FB4862DD878C2E",
- 0
- },
- { /* n - 1 */
- "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC632550",
- "6B17D1F2E12C4247F8BCE6E563A440F277037D812DEB33A0F4A13945D898C296B01CBD1C01E58065711814B583F061E9D431CCA994CEA1313449BF97C840AE0A",
- 0
- },
- { /* n */
- "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC632551",
- "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
-};
-
-Test secp256k1_tests[] = {
- {
- "0000000000000000000000000000000000000000000000000000000000000000",
- "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
- {
- "0000000000000000000000000000000000000000000000000000000000000001",
- "79BE667EF9DCBBAC55A06295CE870B07029BFCDB2DCE28D959F2815B16F81798483ADA7726A3C4655DA4FBFC0E1108A8FD17B448A68554199C47D08FFB10D4B8",
- 0
- },
- {
- "0000000000000000000000000000000000000000000000000000000000000002",
- "C6047F9441ED7D6D3045406E95C07CD85C778E4B8CEF3CA7ABAC09B95C709EE51AE168FEA63DC339A3C58419466CEAEEF7F632653266D0E1236431A950CFE52A",
- 1
- },
- {
- "0000000000000000000000000000000000000000000000000000000000000003",
- "F9308A019258C31049344F85F89D5229B531C845836F99B08601F113BCE036F9388F7B0F632DE8140FE337E62A37F3566500A99934C2231B6CB9FD7584B8E672",
- 1
- },
- { /* n - 4 */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD036413D",
- "E493DBF1C10D80F3581E4904930B1404CC6C13900EE0758474FA94ABE8C4CD13AE1266C15F2BAA48A9BD1DF6715AEBB7269851CC404201BF30168422B88C630D",
- 1
- },
- { /* n - 3 */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD036413E",
- "F9308A019258C31049344F85F89D5229B531C845836F99B08601F113BCE036F9C77084F09CD217EBF01CC819D5C80CA99AFF5666CB3DDCE4934602897B4715BD",
- 1
- },
- { /* n - 2 */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD036413F",
- "C6047F9441ED7D6D3045406E95C07CD85C778E4B8CEF3CA7ABAC09B95C709EE5E51E970159C23CC65C3A7BE6B99315110809CD9ACD992F1EDC9BCE55AF301705",
- 0
- },
- { /* n - 1 */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD0364140",
- "79BE667EF9DCBBAC55A06295CE870B07029BFCDB2DCE28D959F2815B16F81798B7C52588D95C3B9AA25B0403F1EEF75702E84BB7597AABE663B82F6F04EF2777",
- 0
- },
- { /* n */
- "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD0364141",
- "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000",
- 0
- },
-};
-
-
-void vli_print(uint8_t *vli, unsigned int size) {
- for(unsigned i=0; i
-#include
-
-#ifndef uECC_TEST_NUMBER_OF_ITERATIONS
-#define uECC_TEST_NUMBER_OF_ITERATIONS 256
-#endif
-
-void vli_print(char *str, uint8_t *vli, unsigned int size) {
- printf("%s ", str);
- for(unsigned i=0; i
-#include
-
-void vli_print(char *str, uint8_t *vli, unsigned int size) {
- printf("%s ", str);
- for(unsigned i=0; i
-#include
-
-void vli_print(uint8_t *vli, unsigned int size) {
- for(unsigned i=0; i
-#include
-
-int main() {
- int i, c;
- uint8_t private[32] = {0};
- uint8_t public[64] = {0};
- uint8_t hash[32] = {0};
- uint8_t sig[64] = {0};
-
- const struct uECC_Curve_t * curves[5];
- int num_curves = 0;
-#if uECC_SUPPORTS_secp160r1
- curves[num_curves++] = uECC_secp160r1();
-#endif
-#if uECC_SUPPORTS_secp192r1
- curves[num_curves++] = uECC_secp192r1();
-#endif
-#if uECC_SUPPORTS_secp224r1
- curves[num_curves++] = uECC_secp224r1();
-#endif
-#if uECC_SUPPORTS_secp256r1
- curves[num_curves++] = uECC_secp256r1();
-#endif
-#if uECC_SUPPORTS_secp256k1
- curves[num_curves++] = uECC_secp256k1();
-#endif
-
- printf("Testing 256 signatures\n");
- for (c = 0; c < num_curves; ++c) {
- for (i = 0; i < 256; ++i) {
- printf(".");
- fflush(stdout);
-
- if (!uECC_make_key(public, private, curves[c])) {
- printf("uECC_make_key() failed\n");
- return 1;
- }
- memcpy(hash, public, sizeof(hash));
-
- if (!uECC_sign(private, hash, sizeof(hash), sig, curves[c])) {
- printf("uECC_sign() failed\n");
- return 1;
- }
-
- if (!uECC_verify(public, hash, sizeof(hash), sig, curves[c])) {
- printf("uECC_verify() failed\n");
- return 1;
- }
- }
- printf("\n");
- }
-
- return 0;
-}
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/test/test_ecdsa_deterministic.c.example b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/test/test_ecdsa_deterministic.c.example
deleted file mode 100644
index df9aa101f..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/test/test_ecdsa_deterministic.c.example
+++ /dev/null
@@ -1,93 +0,0 @@
-/* Copyright 2014, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#include "uECC.h"
-
-#include
-#include
-
-#define SHA256_BLOCK_LENGTH 64
-#define SHA256_DIGEST_LENGTH 32
-
-typedef struct SHA256_CTX {
- uint32_t state[8];
- uint64_t bitcount;
- uint8_t buffer[SHA256_BLOCK_LENGTH];
-} SHA256_CTX;
-
-extern void SHA256_Init(SHA256_CTX *ctx);
-extern void SHA256_Update(SHA256_CTX *ctx, const uint8_t *message, size_t message_size);
-extern void SHA256_Final(uint8_t digest[SHA256_DIGEST_LENGTH], SHA256_CTX *ctx);
-
-typedef struct SHA256_HashContext {
- uECC_HashContext uECC;
- SHA256_CTX ctx;
-} SHA256_HashContext;
-
-static void init_SHA256(const uECC_HashContext *base) {
- SHA256_HashContext *context = (SHA256_HashContext *)base;
- SHA256_Init(&context->ctx);
-}
-
-static void update_SHA256(const uECC_HashContext *base,
- const uint8_t *message,
- unsigned message_size) {
- SHA256_HashContext *context = (SHA256_HashContext *)base;
- SHA256_Update(&context->ctx, message, message_size);
-}
-
-static void finish_SHA256(const uECC_HashContext *base, uint8_t *hash_result) {
- SHA256_HashContext *context = (SHA256_HashContext *)base;
- SHA256_Final(hash_result, &context->ctx);
-}
-
-int main() {
- int i, c;
- uint8_t private[32] = {0};
- uint8_t public[64] = {0};
- uint8_t hash[32] = {0};
- uint8_t sig[64] = {0};
-
- uint8_t tmp[2 * SHA256_DIGEST_LENGTH + SHA256_BLOCK_LENGTH];
- SHA256_HashContext ctx = {{
- &init_SHA256,
- &update_SHA256,
- &finish_SHA256,
- SHA256_BLOCK_LENGTH,
- SHA256_DIGEST_LENGTH,
- tmp
- }};
-
- const struct uECC_Curve_t * curves[5];
- curves[0] = uECC_secp160r1();
- curves[1] = uECC_secp192r1();
- curves[2] = uECC_secp224r1();
- curves[3] = uECC_secp256r1();
- curves[4] = uECC_secp256k1();
-
- printf("Testing 256 signatures\n");
- for (c = 0; c < 5; ++c) {
- for (i = 0; i < 256; ++i) {
- printf(".");
- fflush(stdout);
-
- if (!uECC_make_key(public, private, curves[c])) {
- printf("uECC_make_key() failed\n");
- return 1;
- }
- memcpy(hash, public, sizeof(hash));
-
- if (!uECC_sign_deterministic(private, hash, sizeof(hash), &ctx.uECC, sig, curves[c])) {
- printf("uECC_sign() failed\n");
- return 1;
- }
-
- if (!uECC_verify(public, hash, sizeof(hash), sig, curves[c])) {
- printf("uECC_verify() failed\n");
- return 1;
- }
- }
- printf("\n");
- }
-
- return 0;
-}
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/types.h b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/types.h
deleted file mode 100644
index 9ee81438f..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/types.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_TYPES_H_
-#define _UECC_TYPES_H_
-
-#ifndef uECC_PLATFORM
- #if __AVR__
- #define uECC_PLATFORM uECC_avr
- #elif defined(__thumb2__) || defined(_M_ARMT) /* I think MSVC only supports Thumb-2 targets */
- #define uECC_PLATFORM uECC_arm_thumb2
- #elif defined(__thumb__)
- #define uECC_PLATFORM uECC_arm_thumb
- #elif defined(__arm__) || defined(_M_ARM)
- #define uECC_PLATFORM uECC_arm
- #elif defined(__aarch64__)
- #define uECC_PLATFORM uECC_arm64
- #elif defined(__i386__) || defined(_M_IX86) || defined(_X86_) || defined(__I86__)
- #define uECC_PLATFORM uECC_x86
- #elif defined(__amd64__) || defined(_M_X64)
- #define uECC_PLATFORM uECC_x86_64
- #else
- #define uECC_PLATFORM uECC_arch_other
- #endif
-#endif
-
-#ifndef uECC_ARM_USE_UMAAL
- #if (uECC_PLATFORM == uECC_arm) && (__ARM_ARCH >= 6)
- #define uECC_ARM_USE_UMAAL 1
- #elif (uECC_PLATFORM == uECC_arm_thumb2) && (__ARM_ARCH >= 6) && !__ARM_ARCH_7M__
- #define uECC_ARM_USE_UMAAL 1
- #else
- #define uECC_ARM_USE_UMAAL 0
- #endif
-#endif
-
-#ifndef uECC_WORD_SIZE
- #if uECC_PLATFORM == uECC_avr
- #define uECC_WORD_SIZE 1
- #elif (uECC_PLATFORM == uECC_x86_64 || uECC_PLATFORM == uECC_arm64)
- #define uECC_WORD_SIZE 8
- #else
- #define uECC_WORD_SIZE 4
- #endif
-#endif
-
-#if (uECC_WORD_SIZE != 1) && (uECC_WORD_SIZE != 4) && (uECC_WORD_SIZE != 8)
- #error "Unsupported value for uECC_WORD_SIZE"
-#endif
-
-#if ((uECC_PLATFORM == uECC_avr) && (uECC_WORD_SIZE != 1))
- #pragma message ("uECC_WORD_SIZE must be 1 for AVR")
- #undef uECC_WORD_SIZE
- #define uECC_WORD_SIZE 1
-#endif
-
-#if ((uECC_PLATFORM == uECC_arm || uECC_PLATFORM == uECC_arm_thumb || \
- uECC_PLATFORM == uECC_arm_thumb2) && \
- (uECC_WORD_SIZE != 4))
- #pragma message ("uECC_WORD_SIZE must be 4 for ARM")
- #undef uECC_WORD_SIZE
- #define uECC_WORD_SIZE 4
-#endif
-
-#if defined(__SIZEOF_INT128__) || ((__clang_major__ * 100 + __clang_minor__) >= 302)
- #define SUPPORTS_INT128 1
-#else
- #define SUPPORTS_INT128 0
-#endif
-
-typedef int8_t wordcount_t;
-typedef int16_t bitcount_t;
-typedef int8_t cmpresult_t;
-
-#if (uECC_WORD_SIZE == 1)
-
-typedef uint8_t uECC_word_t;
-typedef uint16_t uECC_dword_t;
-
-#define HIGH_BIT_SET 0x80
-#define uECC_WORD_BITS 8
-#define uECC_WORD_BITS_SHIFT 3
-#define uECC_WORD_BITS_MASK 0x07
-
-#elif (uECC_WORD_SIZE == 4)
-
-typedef uint32_t uECC_word_t;
-typedef uint64_t uECC_dword_t;
-
-#define HIGH_BIT_SET 0x80000000
-#define uECC_WORD_BITS 32
-#define uECC_WORD_BITS_SHIFT 5
-#define uECC_WORD_BITS_MASK 0x01F
-
-#elif (uECC_WORD_SIZE == 8)
-
-typedef uint64_t uECC_word_t;
-#if SUPPORTS_INT128
-typedef unsigned __int128 uECC_dword_t;
-#endif
-
-#define HIGH_BIT_SET 0x8000000000000000ull
-#define uECC_WORD_BITS 64
-#define uECC_WORD_BITS_SHIFT 6
-#define uECC_WORD_BITS_MASK 0x03F
-
-#endif /* uECC_WORD_SIZE */
-
-#endif /* _UECC_TYPES_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.c b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.c
deleted file mode 100644
index a3d502cf2..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.c
+++ /dev/null
@@ -1,1669 +0,0 @@
-/* Copyright 2014, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#include "uECC.h"
-#include "uECC_vli.h"
-
-#ifndef uECC_RNG_MAX_TRIES
- #define uECC_RNG_MAX_TRIES 64
-#endif
-
-#if uECC_ENABLE_VLI_API
- #define uECC_VLI_API
-#else
- #define uECC_VLI_API static
-#endif
-
-#if (uECC_PLATFORM == uECC_avr) || \
- (uECC_PLATFORM == uECC_arm) || \
- (uECC_PLATFORM == uECC_arm_thumb) || \
- (uECC_PLATFORM == uECC_arm_thumb2)
- #define CONCATX(a, ...) a ## __VA_ARGS__
- #define CONCAT(a, ...) CONCATX(a, __VA_ARGS__)
-
- #define STRX(a) #a
- #define STR(a) STRX(a)
-
- #define EVAL(...) EVAL1(EVAL1(EVAL1(EVAL1(__VA_ARGS__))))
- #define EVAL1(...) EVAL2(EVAL2(EVAL2(EVAL2(__VA_ARGS__))))
- #define EVAL2(...) EVAL3(EVAL3(EVAL3(EVAL3(__VA_ARGS__))))
- #define EVAL3(...) EVAL4(EVAL4(EVAL4(EVAL4(__VA_ARGS__))))
- #define EVAL4(...) __VA_ARGS__
-
- #define DEC_1 0
- #define DEC_2 1
- #define DEC_3 2
- #define DEC_4 3
- #define DEC_5 4
- #define DEC_6 5
- #define DEC_7 6
- #define DEC_8 7
- #define DEC_9 8
- #define DEC_10 9
- #define DEC_11 10
- #define DEC_12 11
- #define DEC_13 12
- #define DEC_14 13
- #define DEC_15 14
- #define DEC_16 15
- #define DEC_17 16
- #define DEC_18 17
- #define DEC_19 18
- #define DEC_20 19
- #define DEC_21 20
- #define DEC_22 21
- #define DEC_23 22
- #define DEC_24 23
- #define DEC_25 24
- #define DEC_26 25
- #define DEC_27 26
- #define DEC_28 27
- #define DEC_29 28
- #define DEC_30 29
- #define DEC_31 30
- #define DEC_32 31
-
- #define DEC(N) CONCAT(DEC_, N)
-
- #define SECOND_ARG(_, val, ...) val
- #define SOME_CHECK_0 ~, 0
- #define GET_SECOND_ARG(...) SECOND_ARG(__VA_ARGS__, SOME,)
- #define SOME_OR_0(N) GET_SECOND_ARG(CONCAT(SOME_CHECK_, N))
-
- #define EMPTY(...)
- #define DEFER(...) __VA_ARGS__ EMPTY()
-
- #define REPEAT_NAME_0() REPEAT_0
- #define REPEAT_NAME_SOME() REPEAT_SOME
- #define REPEAT_0(...)
- #define REPEAT_SOME(N, stuff) DEFER(CONCAT(REPEAT_NAME_, SOME_OR_0(DEC(N))))()(DEC(N), stuff) stuff
- #define REPEAT(N, stuff) EVAL(REPEAT_SOME(N, stuff))
-
- #define REPEATM_NAME_0() REPEATM_0
- #define REPEATM_NAME_SOME() REPEATM_SOME
- #define REPEATM_0(...)
- #define REPEATM_SOME(N, macro) macro(N) \
- DEFER(CONCAT(REPEATM_NAME_, SOME_OR_0(DEC(N))))()(DEC(N), macro)
- #define REPEATM(N, macro) EVAL(REPEATM_SOME(N, macro))
-#endif
-
-#include "platform-specific.inc"
-
-#if (uECC_WORD_SIZE == 1)
- #if uECC_SUPPORTS_secp160r1
- #define uECC_MAX_WORDS 21 /* Due to the size of curve_n. */
- #endif
- #if uECC_SUPPORTS_secp192r1
- #undef uECC_MAX_WORDS
- #define uECC_MAX_WORDS 24
- #endif
- #if uECC_SUPPORTS_secp224r1
- #undef uECC_MAX_WORDS
- #define uECC_MAX_WORDS 28
- #endif
- #if (uECC_SUPPORTS_secp256r1 || uECC_SUPPORTS_secp256k1)
- #undef uECC_MAX_WORDS
- #define uECC_MAX_WORDS 32
- #endif
-#elif (uECC_WORD_SIZE == 4)
- #if uECC_SUPPORTS_secp160r1
- #define uECC_MAX_WORDS 6 /* Due to the size of curve_n. */
- #endif
- #if uECC_SUPPORTS_secp192r1
- #undef uECC_MAX_WORDS
- #define uECC_MAX_WORDS 6
- #endif
- #if uECC_SUPPORTS_secp224r1
- #undef uECC_MAX_WORDS
- #define uECC_MAX_WORDS 7
- #endif
- #if (uECC_SUPPORTS_secp256r1 || uECC_SUPPORTS_secp256k1)
- #undef uECC_MAX_WORDS
- #define uECC_MAX_WORDS 8
- #endif
-#elif (uECC_WORD_SIZE == 8)
- #if uECC_SUPPORTS_secp160r1
- #define uECC_MAX_WORDS 3
- #endif
- #if uECC_SUPPORTS_secp192r1
- #undef uECC_MAX_WORDS
- #define uECC_MAX_WORDS 3
- #endif
- #if uECC_SUPPORTS_secp224r1
- #undef uECC_MAX_WORDS
- #define uECC_MAX_WORDS 4
- #endif
- #if (uECC_SUPPORTS_secp256r1 || uECC_SUPPORTS_secp256k1)
- #undef uECC_MAX_WORDS
- #define uECC_MAX_WORDS 4
- #endif
-#endif /* uECC_WORD_SIZE */
-
-#define BITS_TO_WORDS(num_bits) ((num_bits + ((uECC_WORD_SIZE * 8) - 1)) / (uECC_WORD_SIZE * 8))
-#define BITS_TO_BYTES(num_bits) ((num_bits + 7) / 8)
-
-struct uECC_Curve_t {
- wordcount_t num_words;
- wordcount_t num_bytes;
- bitcount_t num_n_bits;
- uECC_word_t p[uECC_MAX_WORDS];
- uECC_word_t n[uECC_MAX_WORDS];
- uECC_word_t G[uECC_MAX_WORDS * 2];
- uECC_word_t b[uECC_MAX_WORDS];
- void (*double_jacobian)(uECC_word_t * X1,
- uECC_word_t * Y1,
- uECC_word_t * Z1,
- uECC_Curve curve);
-#if uECC_SUPPORT_COMPRESSED_POINT
- void (*mod_sqrt)(uECC_word_t *a, uECC_Curve curve);
-#endif
- void (*x_side)(uECC_word_t *result, const uECC_word_t *x, uECC_Curve curve);
-#if (uECC_OPTIMIZATION_LEVEL > 0)
- void (*mmod_fast)(uECC_word_t *result, uECC_word_t *product);
-#endif
-};
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
-static void bcopy(uint8_t *dst,
- const uint8_t *src,
- unsigned num_bytes) {
- while (0 != num_bytes) {
- num_bytes--;
- dst[num_bytes] = src[num_bytes];
- }
-}
-#endif
-
-static cmpresult_t uECC_vli_cmp_unsafe(const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words);
-
-#if (uECC_PLATFORM == uECC_arm || uECC_PLATFORM == uECC_arm_thumb || \
- uECC_PLATFORM == uECC_arm_thumb2)
- #include "asm_arm.inc"
-#endif
-
-#if (uECC_PLATFORM == uECC_avr)
- #include "asm_avr.inc"
-#endif
-
-#if default_RNG_defined
-static uECC_RNG_Function g_rng_function = &default_RNG;
-#else
-static uECC_RNG_Function g_rng_function = 0;
-#endif
-
-void uECC_set_rng(uECC_RNG_Function rng_function) {
- g_rng_function = rng_function;
-}
-
-uECC_RNG_Function uECC_get_rng(void) {
- return g_rng_function;
-}
-
-int uECC_curve_private_key_size(uECC_Curve curve) {
- return BITS_TO_BYTES(curve->num_n_bits);
-}
-
-int uECC_curve_public_key_size(uECC_Curve curve) {
- return 2 * curve->num_bytes;
-}
-
-#if !asm_clear
-uECC_VLI_API void uECC_vli_clear(uECC_word_t *vli, wordcount_t num_words) {
- wordcount_t i;
- for (i = 0; i < num_words; ++i) {
- vli[i] = 0;
- }
-}
-#endif /* !asm_clear */
-
-/* Constant-time comparison to zero - secure way to compare long integers */
-/* Returns 1 if vli == 0, 0 otherwise. */
-uECC_VLI_API uECC_word_t uECC_vli_isZero(const uECC_word_t *vli, wordcount_t num_words) {
- uECC_word_t bits = 0;
- wordcount_t i;
- for (i = 0; i < num_words; ++i) {
- bits |= vli[i];
- }
- return (bits == 0);
-}
-
-/* Returns nonzero if bit 'bit' of vli is set. */
-uECC_VLI_API uECC_word_t uECC_vli_testBit(const uECC_word_t *vli, bitcount_t bit) {
- return (vli[bit >> uECC_WORD_BITS_SHIFT] & ((uECC_word_t)1 << (bit & uECC_WORD_BITS_MASK)));
-}
-
-/* Counts the number of words in vli. */
-static wordcount_t vli_numDigits(const uECC_word_t *vli, const wordcount_t max_words) {
- wordcount_t i;
- /* Search from the end until we find a non-zero digit.
- We do it in reverse because we expect that most digits will be nonzero. */
- for (i = max_words - 1; i >= 0 && vli[i] == 0; --i) {
- }
-
- return (i + 1);
-}
-
-/* Counts the number of bits required to represent vli. */
-uECC_VLI_API bitcount_t uECC_vli_numBits(const uECC_word_t *vli, const wordcount_t max_words) {
- uECC_word_t i;
- uECC_word_t digit;
-
- wordcount_t num_digits = vli_numDigits(vli, max_words);
- if (num_digits == 0) {
- return 0;
- }
-
- digit = vli[num_digits - 1];
- for (i = 0; digit; ++i) {
- digit >>= 1;
- }
-
- return (((bitcount_t)(num_digits - 1) << uECC_WORD_BITS_SHIFT) + i);
-}
-
-/* Sets dest = src. */
-#if !asm_set
-uECC_VLI_API void uECC_vli_set(uECC_word_t *dest, const uECC_word_t *src, wordcount_t num_words) {
- wordcount_t i;
- for (i = 0; i < num_words; ++i) {
- dest[i] = src[i];
- }
-}
-#endif /* !asm_set */
-
-/* Returns sign of left - right. */
-static cmpresult_t uECC_vli_cmp_unsafe(const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- wordcount_t i;
- for (i = num_words - 1; i >= 0; --i) {
- if (left[i] > right[i]) {
- return 1;
- } else if (left[i] < right[i]) {
- return -1;
- }
- }
- return 0;
-}
-
-/* Constant-time comparison function - secure way to compare long integers */
-/* Returns one if left == right, zero otherwise. */
-uECC_VLI_API uECC_word_t uECC_vli_equal(const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- uECC_word_t diff = 0;
- wordcount_t i;
- for (i = num_words - 1; i >= 0; --i) {
- diff |= (left[i] ^ right[i]);
- }
- return (diff == 0);
-}
-
-uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words);
-
-/* Returns sign of left - right, in constant time. */
-uECC_VLI_API cmpresult_t uECC_vli_cmp(const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- uECC_word_t tmp[uECC_MAX_WORDS];
- uECC_word_t neg = !!uECC_vli_sub(tmp, left, right, num_words);
- uECC_word_t equal = uECC_vli_isZero(tmp, num_words);
- return (!equal - 2 * neg);
-}
-
-/* Computes vli = vli >> 1. */
-#if !asm_rshift1
-uECC_VLI_API void uECC_vli_rshift1(uECC_word_t *vli, wordcount_t num_words) {
- uECC_word_t *end = vli;
- uECC_word_t carry = 0;
-
- vli += num_words;
- while (vli-- > end) {
- uECC_word_t temp = *vli;
- *vli = (temp >> 1) | carry;
- carry = temp << (uECC_WORD_BITS - 1);
- }
-}
-#endif /* !asm_rshift1 */
-
-/* Computes result = left + right, returning carry. Can modify in place. */
-#if !asm_add
-uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- uECC_word_t carry = 0;
- wordcount_t i;
- for (i = 0; i < num_words; ++i) {
- uECC_word_t sum = left[i] + right[i] + carry;
- if (sum != left[i]) {
- carry = (sum < left[i]);
- }
- result[i] = sum;
- }
- return carry;
-}
-#endif /* !asm_add */
-
-/* Computes result = left - right, returning borrow. Can modify in place. */
-#if !asm_sub
-uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- uECC_word_t borrow = 0;
- wordcount_t i;
- for (i = 0; i < num_words; ++i) {
- uECC_word_t diff = left[i] - right[i] - borrow;
- if (diff != left[i]) {
- borrow = (diff > left[i]);
- }
- result[i] = diff;
- }
- return borrow;
-}
-#endif /* !asm_sub */
-
-#if !asm_mult || (uECC_SQUARE_FUNC && !asm_square) || \
- (uECC_SUPPORTS_secp256k1 && (uECC_OPTIMIZATION_LEVEL > 0) && \
- ((uECC_WORD_SIZE == 1) || (uECC_WORD_SIZE == 8)))
-static void muladd(uECC_word_t a,
- uECC_word_t b,
- uECC_word_t *r0,
- uECC_word_t *r1,
- uECC_word_t *r2) {
-#if uECC_WORD_SIZE == 8 && !SUPPORTS_INT128
- uint64_t a0 = a & 0xffffffffull;
- uint64_t a1 = a >> 32;
- uint64_t b0 = b & 0xffffffffull;
- uint64_t b1 = b >> 32;
-
- uint64_t i0 = a0 * b0;
- uint64_t i1 = a0 * b1;
- uint64_t i2 = a1 * b0;
- uint64_t i3 = a1 * b1;
-
- uint64_t p0, p1;
-
- i2 += (i0 >> 32);
- i2 += i1;
- if (i2 < i1) { /* overflow */
- i3 += 0x100000000ull;
- }
-
- p0 = (i0 & 0xffffffffull) | (i2 << 32);
- p1 = i3 + (i2 >> 32);
-
- *r0 += p0;
- *r1 += (p1 + (*r0 < p0));
- *r2 += ((*r1 < p1) || (*r1 == p1 && *r0 < p0));
-#else
- uECC_dword_t p = (uECC_dword_t)a * b;
- uECC_dword_t r01 = ((uECC_dword_t)(*r1) << uECC_WORD_BITS) | *r0;
- r01 += p;
- *r2 += (r01 < p);
- *r1 = r01 >> uECC_WORD_BITS;
- *r0 = (uECC_word_t)r01;
-#endif
-}
-#endif /* muladd needed */
-
-#if !asm_mult
-uECC_VLI_API void uECC_vli_mult(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words) {
- uECC_word_t r0 = 0;
- uECC_word_t r1 = 0;
- uECC_word_t r2 = 0;
- wordcount_t i, k;
-
- /* Compute each digit of result in sequence, maintaining the carries. */
- for (k = 0; k < num_words; ++k) {
- for (i = 0; i <= k; ++i) {
- muladd(left[i], right[k - i], &r0, &r1, &r2);
- }
- result[k] = r0;
- r0 = r1;
- r1 = r2;
- r2 = 0;
- }
- for (k = num_words; k < num_words * 2 - 1; ++k) {
- for (i = (k + 1) - num_words; i < num_words; ++i) {
- muladd(left[i], right[k - i], &r0, &r1, &r2);
- }
- result[k] = r0;
- r0 = r1;
- r1 = r2;
- r2 = 0;
- }
- result[num_words * 2 - 1] = r0;
-}
-#endif /* !asm_mult */
-
-#if uECC_SQUARE_FUNC
-
-#if !asm_square
-static void mul2add(uECC_word_t a,
- uECC_word_t b,
- uECC_word_t *r0,
- uECC_word_t *r1,
- uECC_word_t *r2) {
-#if uECC_WORD_SIZE == 8 && !SUPPORTS_INT128
- uint64_t a0 = a & 0xffffffffull;
- uint64_t a1 = a >> 32;
- uint64_t b0 = b & 0xffffffffull;
- uint64_t b1 = b >> 32;
-
- uint64_t i0 = a0 * b0;
- uint64_t i1 = a0 * b1;
- uint64_t i2 = a1 * b0;
- uint64_t i3 = a1 * b1;
-
- uint64_t p0, p1;
-
- i2 += (i0 >> 32);
- i2 += i1;
- if (i2 < i1)
- { /* overflow */
- i3 += 0x100000000ull;
- }
-
- p0 = (i0 & 0xffffffffull) | (i2 << 32);
- p1 = i3 + (i2 >> 32);
-
- *r2 += (p1 >> 63);
- p1 = (p1 << 1) | (p0 >> 63);
- p0 <<= 1;
-
- *r0 += p0;
- *r1 += (p1 + (*r0 < p0));
- *r2 += ((*r1 < p1) || (*r1 == p1 && *r0 < p0));
-#else
- uECC_dword_t p = (uECC_dword_t)a * b;
- uECC_dword_t r01 = ((uECC_dword_t)(*r1) << uECC_WORD_BITS) | *r0;
- *r2 += (p >> (uECC_WORD_BITS * 2 - 1));
- p *= 2;
- r01 += p;
- *r2 += (r01 < p);
- *r1 = r01 >> uECC_WORD_BITS;
- *r0 = (uECC_word_t)r01;
-#endif
-}
-
-uECC_VLI_API void uECC_vli_square(uECC_word_t *result,
- const uECC_word_t *left,
- wordcount_t num_words) {
- uECC_word_t r0 = 0;
- uECC_word_t r1 = 0;
- uECC_word_t r2 = 0;
-
- wordcount_t i, k;
-
- for (k = 0; k < num_words * 2 - 1; ++k) {
- uECC_word_t min = (k < num_words ? 0 : (k + 1) - num_words);
- for (i = min; i <= k && i <= k - i; ++i) {
- if (i < k-i) {
- mul2add(left[i], left[k - i], &r0, &r1, &r2);
- } else {
- muladd(left[i], left[k - i], &r0, &r1, &r2);
- }
- }
- result[k] = r0;
- r0 = r1;
- r1 = r2;
- r2 = 0;
- }
-
- result[num_words * 2 - 1] = r0;
-}
-#endif /* !asm_square */
-
-#else /* uECC_SQUARE_FUNC */
-
-#if uECC_ENABLE_VLI_API
-uECC_VLI_API void uECC_vli_square(uECC_word_t *result,
- const uECC_word_t *left,
- wordcount_t num_words) {
- uECC_vli_mult(result, left, left, num_words);
-}
-#endif /* uECC_ENABLE_VLI_API */
-
-#endif /* uECC_SQUARE_FUNC */
-
-/* Computes result = (left + right) % mod.
- Assumes that left < mod and right < mod, and that result does not overlap mod. */
-uECC_VLI_API void uECC_vli_modAdd(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- const uECC_word_t *mod,
- wordcount_t num_words) {
- uECC_word_t carry = uECC_vli_add(result, left, right, num_words);
- if (carry || uECC_vli_cmp_unsafe(mod, result, num_words) != 1) {
- /* result > mod (result = mod + remainder), so subtract mod to get remainder. */
- uECC_vli_sub(result, result, mod, num_words);
- }
-}
-
-/* Computes result = (left - right) % mod.
- Assumes that left < mod and right < mod, and that result does not overlap mod. */
-uECC_VLI_API void uECC_vli_modSub(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- const uECC_word_t *mod,
- wordcount_t num_words) {
- uECC_word_t l_borrow = uECC_vli_sub(result, left, right, num_words);
- if (l_borrow) {
- /* In this case, result == -diff == (max int) - diff. Since -x % d == d - x,
- we can get the correct result from result + mod (with overflow). */
- uECC_vli_add(result, result, mod, num_words);
- }
-}
-
-/* Computes result = product % mod, where product is 2N words long. */
-/* Currently only designed to work for curve_p or curve_n. */
-uECC_VLI_API void uECC_vli_mmod(uECC_word_t *result,
- uECC_word_t *product,
- const uECC_word_t *mod,
- wordcount_t num_words) {
- uECC_word_t mod_multiple[2 * uECC_MAX_WORDS];
- uECC_word_t tmp[2 * uECC_MAX_WORDS];
- uECC_word_t *v[2] = {tmp, product};
- uECC_word_t index;
-
- /* Shift mod so its highest set bit is at the maximum position. */
- bitcount_t shift = (num_words * 2 * uECC_WORD_BITS) - uECC_vli_numBits(mod, num_words);
- wordcount_t word_shift = shift / uECC_WORD_BITS;
- wordcount_t bit_shift = shift % uECC_WORD_BITS;
- uECC_word_t carry = 0;
- uECC_vli_clear(mod_multiple, word_shift);
- if (bit_shift > 0) {
- for(index = 0; index < (uECC_word_t)num_words; ++index) {
- mod_multiple[word_shift + index] = (mod[index] << bit_shift) | carry;
- carry = mod[index] >> (uECC_WORD_BITS - bit_shift);
- }
- } else {
- uECC_vli_set(mod_multiple + word_shift, mod, num_words);
- }
-
- for (index = 1; shift >= 0; --shift) {
- uECC_word_t borrow = 0;
- wordcount_t i;
- for (i = 0; i < num_words * 2; ++i) {
- uECC_word_t diff = v[index][i] - mod_multiple[i] - borrow;
- if (diff != v[index][i]) {
- borrow = (diff > v[index][i]);
- }
- v[1 - index][i] = diff;
- }
- index = !(index ^ borrow); /* Swap the index if there was no borrow */
- uECC_vli_rshift1(mod_multiple, num_words);
- mod_multiple[num_words - 1] |= mod_multiple[num_words] << (uECC_WORD_BITS - 1);
- uECC_vli_rshift1(mod_multiple + num_words, num_words);
- }
- uECC_vli_set(result, v[index], num_words);
-}
-
-/* Computes result = (left * right) % mod. */
-uECC_VLI_API void uECC_vli_modMult(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- const uECC_word_t *mod,
- wordcount_t num_words) {
- uECC_word_t product[2 * uECC_MAX_WORDS];
- uECC_vli_mult(product, left, right, num_words);
- uECC_vli_mmod(result, product, mod, num_words);
-}
-
-uECC_VLI_API void uECC_vli_modMult_fast(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- uECC_Curve curve) {
- uECC_word_t product[2 * uECC_MAX_WORDS];
- uECC_vli_mult(product, left, right, curve->num_words);
-#if (uECC_OPTIMIZATION_LEVEL > 0)
- curve->mmod_fast(result, product);
-#else
- uECC_vli_mmod(result, product, curve->p, curve->num_words);
-#endif
-}
-
-#if uECC_SQUARE_FUNC
-
-#if uECC_ENABLE_VLI_API
-/* Computes result = left^2 % mod. */
-uECC_VLI_API void uECC_vli_modSquare(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *mod,
- wordcount_t num_words) {
- uECC_word_t product[2 * uECC_MAX_WORDS];
- uECC_vli_square(product, left, num_words);
- uECC_vli_mmod(result, product, mod, num_words);
-}
-#endif /* uECC_ENABLE_VLI_API */
-
-uECC_VLI_API void uECC_vli_modSquare_fast(uECC_word_t *result,
- const uECC_word_t *left,
- uECC_Curve curve) {
- uECC_word_t product[2 * uECC_MAX_WORDS];
- uECC_vli_square(product, left, curve->num_words);
-#if (uECC_OPTIMIZATION_LEVEL > 0)
- curve->mmod_fast(result, product);
-#else
- uECC_vli_mmod(result, product, curve->p, curve->num_words);
-#endif
-}
-
-#else /* uECC_SQUARE_FUNC */
-
-#if uECC_ENABLE_VLI_API
-uECC_VLI_API void uECC_vli_modSquare(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *mod,
- wordcount_t num_words) {
- uECC_vli_modMult(result, left, left, mod, num_words);
-}
-#endif /* uECC_ENABLE_VLI_API */
-
-uECC_VLI_API void uECC_vli_modSquare_fast(uECC_word_t *result,
- const uECC_word_t *left,
- uECC_Curve curve) {
- uECC_vli_modMult_fast(result, left, left, curve);
-}
-
-#endif /* uECC_SQUARE_FUNC */
-
-#define EVEN(vli) (!(vli[0] & 1))
-static void vli_modInv_update(uECC_word_t *uv,
- const uECC_word_t *mod,
- wordcount_t num_words) {
- uECC_word_t carry = 0;
- if (!EVEN(uv)) {
- carry = uECC_vli_add(uv, uv, mod, num_words);
- }
- uECC_vli_rshift1(uv, num_words);
- if (carry) {
- uv[num_words - 1] |= HIGH_BIT_SET;
- }
-}
-
-/* Computes result = (1 / input) % mod. All VLIs are the same size.
- See "From Euclid's GCD to Montgomery Multiplication to the Great Divide" */
-uECC_VLI_API void uECC_vli_modInv(uECC_word_t *result,
- const uECC_word_t *input,
- const uECC_word_t *mod,
- wordcount_t num_words) {
- uECC_word_t a[uECC_MAX_WORDS], b[uECC_MAX_WORDS], u[uECC_MAX_WORDS], v[uECC_MAX_WORDS];
- cmpresult_t cmpResult;
-
- if (uECC_vli_isZero(input, num_words)) {
- uECC_vli_clear(result, num_words);
- return;
- }
-
- uECC_vli_set(a, input, num_words);
- uECC_vli_set(b, mod, num_words);
- uECC_vli_clear(u, num_words);
- u[0] = 1;
- uECC_vli_clear(v, num_words);
- while ((cmpResult = uECC_vli_cmp_unsafe(a, b, num_words)) != 0) {
- if (EVEN(a)) {
- uECC_vli_rshift1(a, num_words);
- vli_modInv_update(u, mod, num_words);
- } else if (EVEN(b)) {
- uECC_vli_rshift1(b, num_words);
- vli_modInv_update(v, mod, num_words);
- } else if (cmpResult > 0) {
- uECC_vli_sub(a, a, b, num_words);
- uECC_vli_rshift1(a, num_words);
- if (uECC_vli_cmp_unsafe(u, v, num_words) < 0) {
- uECC_vli_add(u, u, mod, num_words);
- }
- uECC_vli_sub(u, u, v, num_words);
- vli_modInv_update(u, mod, num_words);
- } else {
- uECC_vli_sub(b, b, a, num_words);
- uECC_vli_rshift1(b, num_words);
- if (uECC_vli_cmp_unsafe(v, u, num_words) < 0) {
- uECC_vli_add(v, v, mod, num_words);
- }
- uECC_vli_sub(v, v, u, num_words);
- vli_modInv_update(v, mod, num_words);
- }
- }
- uECC_vli_set(result, u, num_words);
-}
-
-/* ------ Point operations ------ */
-
-#include "curve-specific.inc"
-
-/* Returns 1 if 'point' is the point at infinity, 0 otherwise. */
-#define EccPoint_isZero(point, curve) uECC_vli_isZero((point), (curve)->num_words * 2)
-
-/* Point multiplication algorithm using Montgomery's ladder with co-Z coordinates.
-From http://eprint.iacr.org/2011/338.pdf
-*/
-
-/* Modify (x1, y1) => (x1 * z^2, y1 * z^3) */
-static void apply_z(uECC_word_t * X1,
- uECC_word_t * Y1,
- const uECC_word_t * const Z,
- uECC_Curve curve) {
- uECC_word_t t1[uECC_MAX_WORDS];
-
- uECC_vli_modSquare_fast(t1, Z, curve); /* z^2 */
- uECC_vli_modMult_fast(X1, X1, t1, curve); /* x1 * z^2 */
- uECC_vli_modMult_fast(t1, t1, Z, curve); /* z^3 */
- uECC_vli_modMult_fast(Y1, Y1, t1, curve); /* y1 * z^3 */
-}
-
-/* P = (x1, y1) => 2P, (x2, y2) => P' */
-static void XYcZ_initial_double(uECC_word_t * X1,
- uECC_word_t * Y1,
- uECC_word_t * X2,
- uECC_word_t * Y2,
- const uECC_word_t * const initial_Z,
- uECC_Curve curve) {
- uECC_word_t z[uECC_MAX_WORDS];
- wordcount_t num_words = curve->num_words;
- if (initial_Z) {
- uECC_vli_set(z, initial_Z, num_words);
- } else {
- uECC_vli_clear(z, num_words);
- z[0] = 1;
- }
-
- uECC_vli_set(X2, X1, num_words);
- uECC_vli_set(Y2, Y1, num_words);
-
- apply_z(X1, Y1, z, curve);
- curve->double_jacobian(X1, Y1, z, curve);
- apply_z(X2, Y2, z, curve);
-}
-
-/* Input P = (x1, y1, Z), Q = (x2, y2, Z)
- Output P' = (x1', y1', Z3), P + Q = (x3, y3, Z3)
- or P => P', Q => P + Q
-*/
-static void XYcZ_add(uECC_word_t * X1,
- uECC_word_t * Y1,
- uECC_word_t * X2,
- uECC_word_t * Y2,
- uECC_Curve curve) {
- /* t1 = X1, t2 = Y1, t3 = X2, t4 = Y2 */
- uECC_word_t t5[uECC_MAX_WORDS];
- wordcount_t num_words = curve->num_words;
-
- uECC_vli_modSub(t5, X2, X1, curve->p, num_words); /* t5 = x2 - x1 */
- uECC_vli_modSquare_fast(t5, t5, curve); /* t5 = (x2 - x1)^2 = A */
- uECC_vli_modMult_fast(X1, X1, t5, curve); /* t1 = x1*A = B */
- uECC_vli_modMult_fast(X2, X2, t5, curve); /* t3 = x2*A = C */
- uECC_vli_modSub(Y2, Y2, Y1, curve->p, num_words); /* t4 = y2 - y1 */
- uECC_vli_modSquare_fast(t5, Y2, curve); /* t5 = (y2 - y1)^2 = D */
-
- uECC_vli_modSub(t5, t5, X1, curve->p, num_words); /* t5 = D - B */
- uECC_vli_modSub(t5, t5, X2, curve->p, num_words); /* t5 = D - B - C = x3 */
- uECC_vli_modSub(X2, X2, X1, curve->p, num_words); /* t3 = C - B */
- uECC_vli_modMult_fast(Y1, Y1, X2, curve); /* t2 = y1*(C - B) */
- uECC_vli_modSub(X2, X1, t5, curve->p, num_words); /* t3 = B - x3 */
- uECC_vli_modMult_fast(Y2, Y2, X2, curve); /* t4 = (y2 - y1)*(B - x3) */
- uECC_vli_modSub(Y2, Y2, Y1, curve->p, num_words); /* t4 = y3 */
-
- uECC_vli_set(X2, t5, num_words);
-}
-
-/* Input P = (x1, y1, Z), Q = (x2, y2, Z)
- Output P + Q = (x3, y3, Z3), P - Q = (x3', y3', Z3)
- or P => P - Q, Q => P + Q
-*/
-static void XYcZ_addC(uECC_word_t * X1,
- uECC_word_t * Y1,
- uECC_word_t * X2,
- uECC_word_t * Y2,
- uECC_Curve curve) {
- /* t1 = X1, t2 = Y1, t3 = X2, t4 = Y2 */
- uECC_word_t t5[uECC_MAX_WORDS];
- uECC_word_t t6[uECC_MAX_WORDS];
- uECC_word_t t7[uECC_MAX_WORDS];
- wordcount_t num_words = curve->num_words;
-
- uECC_vli_modSub(t5, X2, X1, curve->p, num_words); /* t5 = x2 - x1 */
- uECC_vli_modSquare_fast(t5, t5, curve); /* t5 = (x2 - x1)^2 = A */
- uECC_vli_modMult_fast(X1, X1, t5, curve); /* t1 = x1*A = B */
- uECC_vli_modMult_fast(X2, X2, t5, curve); /* t3 = x2*A = C */
- uECC_vli_modAdd(t5, Y2, Y1, curve->p, num_words); /* t5 = y2 + y1 */
- uECC_vli_modSub(Y2, Y2, Y1, curve->p, num_words); /* t4 = y2 - y1 */
-
- uECC_vli_modSub(t6, X2, X1, curve->p, num_words); /* t6 = C - B */
- uECC_vli_modMult_fast(Y1, Y1, t6, curve); /* t2 = y1 * (C - B) = E */
- uECC_vli_modAdd(t6, X1, X2, curve->p, num_words); /* t6 = B + C */
- uECC_vli_modSquare_fast(X2, Y2, curve); /* t3 = (y2 - y1)^2 = D */
- uECC_vli_modSub(X2, X2, t6, curve->p, num_words); /* t3 = D - (B + C) = x3 */
-
- uECC_vli_modSub(t7, X1, X2, curve->p, num_words); /* t7 = B - x3 */
- uECC_vli_modMult_fast(Y2, Y2, t7, curve); /* t4 = (y2 - y1)*(B - x3) */
- uECC_vli_modSub(Y2, Y2, Y1, curve->p, num_words); /* t4 = (y2 - y1)*(B - x3) - E = y3 */
-
- uECC_vli_modSquare_fast(t7, t5, curve); /* t7 = (y2 + y1)^2 = F */
- uECC_vli_modSub(t7, t7, t6, curve->p, num_words); /* t7 = F - (B + C) = x3' */
- uECC_vli_modSub(t6, t7, X1, curve->p, num_words); /* t6 = x3' - B */
- uECC_vli_modMult_fast(t6, t6, t5, curve); /* t6 = (y2+y1)*(x3' - B) */
- uECC_vli_modSub(Y1, t6, Y1, curve->p, num_words); /* t2 = (y2+y1)*(x3' - B) - E = y3' */
-
- uECC_vli_set(X1, t7, num_words);
-}
-
-/* result may overlap point. */
-static void EccPoint_mult(uECC_word_t * result,
- const uECC_word_t * point,
- const uECC_word_t * scalar,
- const uECC_word_t * initial_Z,
- bitcount_t num_bits,
- uECC_Curve curve) {
- /* R0 and R1 */
- uECC_word_t Rx[2][uECC_MAX_WORDS];
- uECC_word_t Ry[2][uECC_MAX_WORDS];
- uECC_word_t z[uECC_MAX_WORDS];
- bitcount_t i;
- uECC_word_t nb;
- wordcount_t num_words = curve->num_words;
-
- uECC_vli_set(Rx[1], point, num_words);
- uECC_vli_set(Ry[1], point + num_words, num_words);
-
- XYcZ_initial_double(Rx[1], Ry[1], Rx[0], Ry[0], initial_Z, curve);
-
- for (i = num_bits - 2; i > 0; --i) {
- nb = !uECC_vli_testBit(scalar, i);
- XYcZ_addC(Rx[1 - nb], Ry[1 - nb], Rx[nb], Ry[nb], curve);
- XYcZ_add(Rx[nb], Ry[nb], Rx[1 - nb], Ry[1 - nb], curve);
- }
-
- nb = !uECC_vli_testBit(scalar, 0);
- XYcZ_addC(Rx[1 - nb], Ry[1 - nb], Rx[nb], Ry[nb], curve);
-
- /* Find final 1/Z value. */
- uECC_vli_modSub(z, Rx[1], Rx[0], curve->p, num_words); /* X1 - X0 */
- uECC_vli_modMult_fast(z, z, Ry[1 - nb], curve); /* Yb * (X1 - X0) */
- uECC_vli_modMult_fast(z, z, point, curve); /* xP * Yb * (X1 - X0) */
- uECC_vli_modInv(z, z, curve->p, num_words); /* 1 / (xP * Yb * (X1 - X0)) */
- /* yP / (xP * Yb * (X1 - X0)) */
- uECC_vli_modMult_fast(z, z, point + num_words, curve);
- uECC_vli_modMult_fast(z, z, Rx[1 - nb], curve); /* Xb * yP / (xP * Yb * (X1 - X0)) */
- /* End 1/Z calculation */
-
- XYcZ_add(Rx[nb], Ry[nb], Rx[1 - nb], Ry[1 - nb], curve);
- apply_z(Rx[0], Ry[0], z, curve);
-
- uECC_vli_set(result, Rx[0], num_words);
- uECC_vli_set(result + num_words, Ry[0], num_words);
-}
-
-static uECC_word_t regularize_k(const uECC_word_t * const k,
- uECC_word_t *k0,
- uECC_word_t *k1,
- uECC_Curve curve) {
- wordcount_t num_n_words = BITS_TO_WORDS(curve->num_n_bits);
- bitcount_t num_n_bits = curve->num_n_bits;
- uECC_word_t carry = uECC_vli_add(k0, k, curve->n, num_n_words) ||
- (num_n_bits < ((bitcount_t)num_n_words * uECC_WORD_SIZE * 8) &&
- uECC_vli_testBit(k0, num_n_bits));
- uECC_vli_add(k1, k0, curve->n, num_n_words);
- return carry;
-}
-
-/* Generates a random integer in the range 0 < random < top.
- Both random and top have num_words words. */
-uECC_VLI_API int uECC_generate_random_int(uECC_word_t *random,
- const uECC_word_t *top,
- wordcount_t num_words) {
- uECC_word_t mask = (uECC_word_t)-1;
- uECC_word_t tries;
- bitcount_t num_bits = uECC_vli_numBits(top, num_words);
-
- if (!g_rng_function) {
- return 0;
- }
-
- for (tries = 0; tries < uECC_RNG_MAX_TRIES; ++tries) {
- if (!g_rng_function((uint8_t *)random, num_words * uECC_WORD_SIZE)) {
- return 0;
- }
- random[num_words - 1] &= mask >> ((bitcount_t)(num_words * uECC_WORD_SIZE * 8 - num_bits));
- if (!uECC_vli_isZero(random, num_words) &&
- uECC_vli_cmp(top, random, num_words) == 1) {
- return 1;
- }
- }
- return 0;
-}
-
-static uECC_word_t EccPoint_compute_public_key(uECC_word_t *result,
- uECC_word_t *private_key,
- uECC_Curve curve) {
- uECC_word_t tmp1[uECC_MAX_WORDS];
- uECC_word_t tmp2[uECC_MAX_WORDS];
- uECC_word_t *p2[2] = {tmp1, tmp2};
- uECC_word_t *initial_Z = 0;
- uECC_word_t carry;
-
- /* Regularize the bitcount for the private key so that attackers cannot use a side channel
- attack to learn the number of leading zeros. */
- carry = regularize_k(private_key, tmp1, tmp2, curve);
-
- /* If an RNG function was specified, try to get a random initial Z value to improve
- protection against side-channel attacks. */
- if (g_rng_function) {
- if (!uECC_generate_random_int(p2[carry], curve->p, curve->num_words)) {
- return 0;
- }
- initial_Z = p2[carry];
- }
- EccPoint_mult(result, curve->G, p2[!carry], initial_Z, curve->num_n_bits + 1, curve);
-
- if (EccPoint_isZero(result, curve)) {
- return 0;
- }
- return 1;
-}
-
-#if uECC_WORD_SIZE == 1
-
-uECC_VLI_API void uECC_vli_nativeToBytes(uint8_t *bytes,
- int num_bytes,
- const uint8_t *native) {
- wordcount_t i;
- for (i = 0; i < num_bytes; ++i) {
- bytes[i] = native[(num_bytes - 1) - i];
- }
-}
-
-uECC_VLI_API void uECC_vli_bytesToNative(uint8_t *native,
- const uint8_t *bytes,
- int num_bytes) {
- uECC_vli_nativeToBytes(native, num_bytes, bytes);
-}
-
-#else
-
-uECC_VLI_API void uECC_vli_nativeToBytes(uint8_t *bytes,
- int num_bytes,
- const uECC_word_t *native) {
- int i;
- for (i = 0; i < num_bytes; ++i) {
- unsigned b = num_bytes - 1 - i;
- bytes[i] = native[b / uECC_WORD_SIZE] >> (8 * (b % uECC_WORD_SIZE));
- }
-}
-
-uECC_VLI_API void uECC_vli_bytesToNative(uECC_word_t *native,
- const uint8_t *bytes,
- int num_bytes) {
- int i;
- uECC_vli_clear(native, (num_bytes + (uECC_WORD_SIZE - 1)) / uECC_WORD_SIZE);
- for (i = 0; i < num_bytes; ++i) {
- unsigned b = num_bytes - 1 - i;
- native[b / uECC_WORD_SIZE] |=
- (uECC_word_t)bytes[i] << (8 * (b % uECC_WORD_SIZE));
- }
-}
-
-#endif /* uECC_WORD_SIZE */
-
-int uECC_make_key(uint8_t *public_key,
- uint8_t *private_key,
- uECC_Curve curve) {
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- uECC_word_t *_private = (uECC_word_t *)private_key;
- uECC_word_t *_public = (uECC_word_t *)public_key;
-#else
- uECC_word_t _private[uECC_MAX_WORDS];
- uECC_word_t _public[uECC_MAX_WORDS * 2];
-#endif
- uECC_word_t tries;
-
- for (tries = 0; tries < uECC_RNG_MAX_TRIES; ++tries) {
- if (!uECC_generate_random_int(_private, curve->n, BITS_TO_WORDS(curve->num_n_bits))) {
- return 0;
- }
-
- if (EccPoint_compute_public_key(_public, _private, curve)) {
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN == 0
- uECC_vli_nativeToBytes(private_key, BITS_TO_BYTES(curve->num_n_bits), _private);
- uECC_vli_nativeToBytes(public_key, curve->num_bytes, _public);
- uECC_vli_nativeToBytes(
- public_key + curve->num_bytes, curve->num_bytes, _public + curve->num_words);
-#endif
- return 1;
- }
- }
- return 0;
-}
-
-int uECC_shared_secret(const uint8_t *public_key,
- const uint8_t *private_key,
- uint8_t *secret,
- uECC_Curve curve) {
- uECC_word_t _public[uECC_MAX_WORDS * 2];
- uECC_word_t _private[uECC_MAX_WORDS];
-
- uECC_word_t tmp[uECC_MAX_WORDS];
- uECC_word_t *p2[2] = {_private, tmp};
- uECC_word_t *initial_Z = 0;
- uECC_word_t carry;
- wordcount_t num_words = curve->num_words;
- wordcount_t num_bytes = curve->num_bytes;
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- bcopy((uint8_t *) _private, private_key, num_bytes);
- bcopy((uint8_t *) _public, public_key, num_bytes*2);
-#else
- uECC_vli_bytesToNative(_private, private_key, BITS_TO_BYTES(curve->num_n_bits));
- uECC_vli_bytesToNative(_public, public_key, num_bytes);
- uECC_vli_bytesToNative(_public + num_words, public_key + num_bytes, num_bytes);
-#endif
-
- /* Regularize the bitcount for the private key so that attackers cannot use a side channel
- attack to learn the number of leading zeros. */
- carry = regularize_k(_private, _private, tmp, curve);
-
- /* If an RNG function was specified, try to get a random initial Z value to improve
- protection against side-channel attacks. */
- if (g_rng_function) {
- if (!uECC_generate_random_int(p2[carry], curve->p, num_words)) {
- return 0;
- }
- initial_Z = p2[carry];
- }
-
- EccPoint_mult(_public, _public, p2[!carry], initial_Z, curve->num_n_bits + 1, curve);
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- bcopy((uint8_t *) secret, (uint8_t *) _public, num_bytes);
-#else
- uECC_vli_nativeToBytes(secret, num_bytes, _public);
-#endif
- return !EccPoint_isZero(_public, curve);
-}
-
-#if uECC_SUPPORT_COMPRESSED_POINT
-void uECC_compress(const uint8_t *public_key, uint8_t *compressed, uECC_Curve curve) {
- wordcount_t i;
- for (i = 0; i < curve->num_bytes; ++i) {
- compressed[i+1] = public_key[i];
- }
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- compressed[0] = 2 + (public_key[curve->num_bytes] & 0x01);
-#else
- compressed[0] = 2 + (public_key[curve->num_bytes * 2 - 1] & 0x01);
-#endif
-}
-
-void uECC_decompress(const uint8_t *compressed, uint8_t *public_key, uECC_Curve curve) {
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- uECC_word_t *point = (uECC_word_t *)public_key;
-#else
- uECC_word_t point[uECC_MAX_WORDS * 2];
-#endif
- uECC_word_t *y = point + curve->num_words;
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- bcopy(public_key, compressed+1, curve->num_bytes);
-#else
- uECC_vli_bytesToNative(point, compressed + 1, curve->num_bytes);
-#endif
- curve->x_side(y, point, curve);
- curve->mod_sqrt(y, curve);
-
- if ((y[0] & 0x01) != (compressed[0] & 0x01)) {
- uECC_vli_sub(y, curve->p, y, curve->num_words);
- }
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN == 0
- uECC_vli_nativeToBytes(public_key, curve->num_bytes, point);
- uECC_vli_nativeToBytes(public_key + curve->num_bytes, curve->num_bytes, y);
-#endif
-}
-#endif /* uECC_SUPPORT_COMPRESSED_POINT */
-
-uECC_VLI_API int uECC_valid_point(const uECC_word_t *point, uECC_Curve curve) {
- uECC_word_t tmp1[uECC_MAX_WORDS];
- uECC_word_t tmp2[uECC_MAX_WORDS];
- wordcount_t num_words = curve->num_words;
-
- /* The point at infinity is invalid. */
- if (EccPoint_isZero(point, curve)) {
- return 0;
- }
-
- /* x and y must be smaller than p. */
- if (uECC_vli_cmp_unsafe(curve->p, point, num_words) != 1 ||
- uECC_vli_cmp_unsafe(curve->p, point + num_words, num_words) != 1) {
- return 0;
- }
-
- uECC_vli_modSquare_fast(tmp1, point + num_words, curve);
- curve->x_side(tmp2, point, curve); /* tmp2 = x^3 + ax + b */
-
- /* Make sure that y^2 == x^3 + ax + b */
- return (int)(uECC_vli_equal(tmp1, tmp2, num_words));
-}
-
-int uECC_valid_public_key(const uint8_t *public_key, uECC_Curve curve) {
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- uECC_word_t *_public = (uECC_word_t *)public_key;
-#else
- uECC_word_t _public[uECC_MAX_WORDS * 2];
-#endif
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN == 0
- uECC_vli_bytesToNative(_public, public_key, curve->num_bytes);
- uECC_vli_bytesToNative(
- _public + curve->num_words, public_key + curve->num_bytes, curve->num_bytes);
-#endif
- return uECC_valid_point(_public, curve);
-}
-
-int uECC_compute_public_key(const uint8_t *private_key, uint8_t *public_key, uECC_Curve curve) {
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- uECC_word_t *_private = (uECC_word_t *)private_key;
- uECC_word_t *_public = (uECC_word_t *)public_key;
-#else
- uECC_word_t _private[uECC_MAX_WORDS];
- uECC_word_t _public[uECC_MAX_WORDS * 2];
-#endif
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN == 0
- uECC_vli_bytesToNative(_private, private_key, BITS_TO_BYTES(curve->num_n_bits));
-#endif
-
- /* Make sure the private key is in the range [1, n-1]. */
- if (uECC_vli_isZero(_private, BITS_TO_WORDS(curve->num_n_bits))) {
- return 0;
- }
-
- if (uECC_vli_cmp(curve->n, _private, BITS_TO_WORDS(curve->num_n_bits)) != 1) {
- return 0;
- }
-
- /* Compute public key. */
- if (!EccPoint_compute_public_key(_public, _private, curve)) {
- return 0;
- }
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN == 0
- uECC_vli_nativeToBytes(public_key, curve->num_bytes, _public);
- uECC_vli_nativeToBytes(
- public_key + curve->num_bytes, curve->num_bytes, _public + curve->num_words);
-#endif
- return 1;
-}
-
-
-/* -------- ECDSA code -------- */
-
-static void bits2int(uECC_word_t *native,
- const uint8_t *bits,
- unsigned bits_size,
- uECC_Curve curve) {
- unsigned num_n_bytes = BITS_TO_BYTES(curve->num_n_bits);
- unsigned num_n_words = BITS_TO_WORDS(curve->num_n_bits);
- int shift;
- uECC_word_t carry;
- uECC_word_t *ptr;
-
- if (bits_size > num_n_bytes) {
- bits_size = num_n_bytes;
- }
-
- uECC_vli_clear(native, num_n_words);
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- bcopy((uint8_t *) native, bits, bits_size);
-#else
- uECC_vli_bytesToNative(native, bits, bits_size);
-#endif
- if (bits_size * 8 <= (unsigned)curve->num_n_bits) {
- return;
- }
- shift = bits_size * 8 - curve->num_n_bits;
- carry = 0;
- ptr = native + num_n_words;
- while (ptr-- > native) {
- uECC_word_t temp = *ptr;
- *ptr = (temp >> shift) | carry;
- carry = temp << (uECC_WORD_BITS - shift);
- }
-
- /* Reduce mod curve_n */
- if (uECC_vli_cmp_unsafe(curve->n, native, num_n_words) != 1) {
- uECC_vli_sub(native, native, curve->n, num_n_words);
- }
-}
-
-static int uECC_sign_with_k_internal(const uint8_t *private_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- uECC_word_t *k,
- uint8_t *signature,
- uECC_Curve curve) {
-
- uECC_word_t tmp[uECC_MAX_WORDS];
- uECC_word_t s[uECC_MAX_WORDS];
- uECC_word_t *k2[2] = {tmp, s};
- uECC_word_t *initial_Z = 0;
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- uECC_word_t *p = (uECC_word_t *)signature;
-#else
- uECC_word_t p[uECC_MAX_WORDS * 2];
-#endif
- uECC_word_t carry;
- wordcount_t num_words = curve->num_words;
- wordcount_t num_n_words = BITS_TO_WORDS(curve->num_n_bits);
- bitcount_t num_n_bits = curve->num_n_bits;
-
- /* Make sure 0 < k < curve_n */
- if (uECC_vli_isZero(k, num_words) || uECC_vli_cmp(curve->n, k, num_n_words) != 1) {
- return 0;
- }
-
- carry = regularize_k(k, tmp, s, curve);
- /* If an RNG function was specified, try to get a random initial Z value to improve
- protection against side-channel attacks. */
- if (g_rng_function) {
- if (!uECC_generate_random_int(k2[carry], curve->p, num_words)) {
- return 0;
- }
- initial_Z = k2[carry];
- }
- EccPoint_mult(p, curve->G, k2[!carry], initial_Z, num_n_bits + 1, curve);
- if (uECC_vli_isZero(p, num_words)) {
- return 0;
- }
-
- /* If an RNG function was specified, get a random number
- to prevent side channel analysis of k. */
- if (!g_rng_function) {
- uECC_vli_clear(tmp, num_n_words);
- tmp[0] = 1;
- } else if (!uECC_generate_random_int(tmp, curve->n, num_n_words)) {
- return 0;
- }
-
- /* Prevent side channel analysis of uECC_vli_modInv() to determine
- bits of k / the private key by premultiplying by a random number */
- uECC_vli_modMult(k, k, tmp, curve->n, num_n_words); /* k' = rand * k */
- uECC_vli_modInv(k, k, curve->n, num_n_words); /* k = 1 / k' */
- uECC_vli_modMult(k, k, tmp, curve->n, num_n_words); /* k = 1 / k */
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN == 0
- uECC_vli_nativeToBytes(signature, curve->num_bytes, p); /* store r */
-#endif
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- bcopy((uint8_t *) tmp, private_key, BITS_TO_BYTES(curve->num_n_bits));
-#else
- uECC_vli_bytesToNative(tmp, private_key, BITS_TO_BYTES(curve->num_n_bits)); /* tmp = d */
-#endif
-
- s[num_n_words - 1] = 0;
- uECC_vli_set(s, p, num_words);
- uECC_vli_modMult(s, tmp, s, curve->n, num_n_words); /* s = r*d */
-
- bits2int(tmp, message_hash, hash_size, curve);
- uECC_vli_modAdd(s, tmp, s, curve->n, num_n_words); /* s = e + r*d */
- uECC_vli_modMult(s, s, k, curve->n, num_n_words); /* s = (e + r*d) / k */
- if (uECC_vli_numBits(s, num_n_words) > (bitcount_t)curve->num_bytes * 8) {
- return 0;
- }
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- bcopy((uint8_t *) signature + curve->num_bytes, (uint8_t *) s, curve->num_bytes);
-#else
- uECC_vli_nativeToBytes(signature + curve->num_bytes, curve->num_bytes, s);
-#endif
- return 1;
-}
-
-/* For testing - sign with an explicitly specified k value */
-int uECC_sign_with_k(const uint8_t *private_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- const uint8_t *k,
- uint8_t *signature,
- uECC_Curve curve) {
- uECC_word_t k2[uECC_MAX_WORDS];
- bits2int(k2, k, BITS_TO_BYTES(curve->num_n_bits), curve);
- return uECC_sign_with_k_internal(private_key, message_hash, hash_size, k2, signature, curve);
-}
-
-int uECC_sign(const uint8_t *private_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- uint8_t *signature,
- uECC_Curve curve) {
- uECC_word_t k[uECC_MAX_WORDS];
- uECC_word_t tries;
-
- for (tries = 0; tries < uECC_RNG_MAX_TRIES; ++tries) {
- if (!uECC_generate_random_int(k, curve->n, BITS_TO_WORDS(curve->num_n_bits))) {
- return 0;
- }
-
- if (uECC_sign_with_k_internal(private_key, message_hash, hash_size, k, signature, curve)) {
- return 1;
- }
- }
- return 0;
-}
-
-/* Compute an HMAC using K as a key (as in RFC 6979). Note that K is always
- the same size as the hash result size. */
-static void HMAC_init(const uECC_HashContext *hash_context, const uint8_t *K) {
- uint8_t *pad = hash_context->tmp + 2 * hash_context->result_size;
- unsigned i;
- for (i = 0; i < hash_context->result_size; ++i)
- pad[i] = K[i] ^ 0x36;
- for (; i < hash_context->block_size; ++i)
- pad[i] = 0x36;
-
- hash_context->init_hash(hash_context);
- hash_context->update_hash(hash_context, pad, hash_context->block_size);
-}
-
-static void HMAC_update(const uECC_HashContext *hash_context,
- const uint8_t *message,
- unsigned message_size) {
- hash_context->update_hash(hash_context, message, message_size);
-}
-
-static void HMAC_finish(const uECC_HashContext *hash_context,
- const uint8_t *K,
- uint8_t *result) {
- uint8_t *pad = hash_context->tmp + 2 * hash_context->result_size;
- unsigned i;
- for (i = 0; i < hash_context->result_size; ++i)
- pad[i] = K[i] ^ 0x5c;
- for (; i < hash_context->block_size; ++i)
- pad[i] = 0x5c;
-
- hash_context->finish_hash(hash_context, result);
-
- hash_context->init_hash(hash_context);
- hash_context->update_hash(hash_context, pad, hash_context->block_size);
- hash_context->update_hash(hash_context, result, hash_context->result_size);
- hash_context->finish_hash(hash_context, result);
-}
-
-/* V = HMAC_K(V) */
-static void update_V(const uECC_HashContext *hash_context, uint8_t *K, uint8_t *V) {
- HMAC_init(hash_context, K);
- HMAC_update(hash_context, V, hash_context->result_size);
- HMAC_finish(hash_context, K, V);
-}
-
-/* Deterministic signing, similar to RFC 6979. Differences are:
- * We just use H(m) directly rather than bits2octets(H(m))
- (it is not reduced modulo curve_n).
- * We generate a value for k (aka T) directly rather than converting endianness.
-
- Layout of hash_context->tmp: | | (1 byte overlapped 0x00 or 0x01) / */
-int uECC_sign_deterministic(const uint8_t *private_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- const uECC_HashContext *hash_context,
- uint8_t *signature,
- uECC_Curve curve) {
- uint8_t *K = hash_context->tmp;
- uint8_t *V = K + hash_context->result_size;
- wordcount_t num_bytes = curve->num_bytes;
- wordcount_t num_n_words = BITS_TO_WORDS(curve->num_n_bits);
- bitcount_t num_n_bits = curve->num_n_bits;
- uECC_word_t tries;
- unsigned i;
- for (i = 0; i < hash_context->result_size; ++i) {
- V[i] = 0x01;
- K[i] = 0;
- }
-
- /* K = HMAC_K(V || 0x00 || int2octets(x) || h(m)) */
- HMAC_init(hash_context, K);
- V[hash_context->result_size] = 0x00;
- HMAC_update(hash_context, V, hash_context->result_size + 1);
- HMAC_update(hash_context, private_key, num_bytes);
- HMAC_update(hash_context, message_hash, hash_size);
- HMAC_finish(hash_context, K, K);
-
- update_V(hash_context, K, V);
-
- /* K = HMAC_K(V || 0x01 || int2octets(x) || h(m)) */
- HMAC_init(hash_context, K);
- V[hash_context->result_size] = 0x01;
- HMAC_update(hash_context, V, hash_context->result_size + 1);
- HMAC_update(hash_context, private_key, num_bytes);
- HMAC_update(hash_context, message_hash, hash_size);
- HMAC_finish(hash_context, K, K);
-
- update_V(hash_context, K, V);
-
- for (tries = 0; tries < uECC_RNG_MAX_TRIES; ++tries) {
- uECC_word_t T[uECC_MAX_WORDS];
- uint8_t *T_ptr = (uint8_t *)T;
- wordcount_t T_bytes = 0;
- for (;;) {
- update_V(hash_context, K, V);
- for (i = 0; i < hash_context->result_size; ++i) {
- T_ptr[T_bytes++] = V[i];
- if (T_bytes >= num_n_words * uECC_WORD_SIZE) {
- goto filled;
- }
- }
- }
- filled:
- if ((bitcount_t)num_n_words * uECC_WORD_SIZE * 8 > num_n_bits) {
- uECC_word_t mask = (uECC_word_t)-1;
- T[num_n_words - 1] &=
- mask >> ((bitcount_t)(num_n_words * uECC_WORD_SIZE * 8 - num_n_bits));
- }
-
- if (uECC_sign_with_k_internal(private_key, message_hash, hash_size, T, signature, curve)) {
- return 1;
- }
-
- /* K = HMAC_K(V || 0x00) */
- HMAC_init(hash_context, K);
- V[hash_context->result_size] = 0x00;
- HMAC_update(hash_context, V, hash_context->result_size + 1);
- HMAC_finish(hash_context, K, K);
-
- update_V(hash_context, K, V);
- }
- return 0;
-}
-
-static bitcount_t smax(bitcount_t a, bitcount_t b) {
- return (a > b ? a : b);
-}
-
-int uECC_verify(const uint8_t *public_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- const uint8_t *signature,
- uECC_Curve curve) {
- uECC_word_t u1[uECC_MAX_WORDS], u2[uECC_MAX_WORDS];
- uECC_word_t z[uECC_MAX_WORDS];
- uECC_word_t sum[uECC_MAX_WORDS * 2];
- uECC_word_t rx[uECC_MAX_WORDS];
- uECC_word_t ry[uECC_MAX_WORDS];
- uECC_word_t tx[uECC_MAX_WORDS];
- uECC_word_t ty[uECC_MAX_WORDS];
- uECC_word_t tz[uECC_MAX_WORDS];
- const uECC_word_t *points[4];
- const uECC_word_t *point;
- bitcount_t num_bits;
- bitcount_t i;
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- uECC_word_t *_public = (uECC_word_t *)public_key;
-#else
- uECC_word_t _public[uECC_MAX_WORDS * 2];
-#endif
- uECC_word_t r[uECC_MAX_WORDS], s[uECC_MAX_WORDS];
- wordcount_t num_words = curve->num_words;
- wordcount_t num_n_words = BITS_TO_WORDS(curve->num_n_bits);
-
- rx[num_n_words - 1] = 0;
- r[num_n_words - 1] = 0;
- s[num_n_words - 1] = 0;
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- bcopy((uint8_t *) r, signature, curve->num_bytes);
- bcopy((uint8_t *) s, signature + curve->num_bytes, curve->num_bytes);
-#else
- uECC_vli_bytesToNative(_public, public_key, curve->num_bytes);
- uECC_vli_bytesToNative(
- _public + num_words, public_key + curve->num_bytes, curve->num_bytes);
- uECC_vli_bytesToNative(r, signature, curve->num_bytes);
- uECC_vli_bytesToNative(s, signature + curve->num_bytes, curve->num_bytes);
-#endif
-
- /* r, s must not be 0. */
- if (uECC_vli_isZero(r, num_words) || uECC_vli_isZero(s, num_words)) {
- return 0;
- }
-
- /* r, s must be < n. */
- if (uECC_vli_cmp_unsafe(curve->n, r, num_n_words) != 1 ||
- uECC_vli_cmp_unsafe(curve->n, s, num_n_words) != 1) {
- return 0;
- }
-
- /* Calculate u1 and u2. */
- uECC_vli_modInv(z, s, curve->n, num_n_words); /* z = 1/s */
- u1[num_n_words - 1] = 0;
- bits2int(u1, message_hash, hash_size, curve);
- uECC_vli_modMult(u1, u1, z, curve->n, num_n_words); /* u1 = e/s */
- uECC_vli_modMult(u2, r, z, curve->n, num_n_words); /* u2 = r/s */
-
- /* Calculate sum = G + Q. */
- uECC_vli_set(sum, _public, num_words);
- uECC_vli_set(sum + num_words, _public + num_words, num_words);
- uECC_vli_set(tx, curve->G, num_words);
- uECC_vli_set(ty, curve->G + num_words, num_words);
- uECC_vli_modSub(z, sum, tx, curve->p, num_words); /* z = x2 - x1 */
- XYcZ_add(tx, ty, sum, sum + num_words, curve);
- uECC_vli_modInv(z, z, curve->p, num_words); /* z = 1/z */
- apply_z(sum, sum + num_words, z, curve);
-
- /* Use Shamir's trick to calculate u1*G + u2*Q */
- points[0] = 0;
- points[1] = curve->G;
- points[2] = _public;
- points[3] = sum;
- num_bits = smax(uECC_vli_numBits(u1, num_n_words),
- uECC_vli_numBits(u2, num_n_words));
-
- point = points[(!!uECC_vli_testBit(u1, num_bits - 1)) |
- ((!!uECC_vli_testBit(u2, num_bits - 1)) << 1)];
- uECC_vli_set(rx, point, num_words);
- uECC_vli_set(ry, point + num_words, num_words);
- uECC_vli_clear(z, num_words);
- z[0] = 1;
-
- for (i = num_bits - 2; i >= 0; --i) {
- uECC_word_t index;
- curve->double_jacobian(rx, ry, z, curve);
-
- index = (!!uECC_vli_testBit(u1, i)) | ((!!uECC_vli_testBit(u2, i)) << 1);
- point = points[index];
- if (point) {
- uECC_vli_set(tx, point, num_words);
- uECC_vli_set(ty, point + num_words, num_words);
- apply_z(tx, ty, z, curve);
- uECC_vli_modSub(tz, rx, tx, curve->p, num_words); /* Z = x2 - x1 */
- XYcZ_add(tx, ty, rx, ry, curve);
- uECC_vli_modMult_fast(z, z, tz, curve);
- }
- }
-
- uECC_vli_modInv(z, z, curve->p, num_words); /* Z = 1/Z */
- apply_z(rx, ry, z, curve);
-
- /* v = x1 (mod n) */
- if (uECC_vli_cmp_unsafe(curve->n, rx, num_n_words) != 1) {
- uECC_vli_sub(rx, rx, curve->n, num_n_words);
- }
-
- /* Accept only if v == r. */
- return (int)(uECC_vli_equal(rx, r, num_words));
-}
-
-#if uECC_ENABLE_VLI_API
-
-unsigned uECC_curve_num_words(uECC_Curve curve) {
- return curve->num_words;
-}
-
-unsigned uECC_curve_num_bytes(uECC_Curve curve) {
- return curve->num_bytes;
-}
-
-unsigned uECC_curve_num_bits(uECC_Curve curve) {
- return curve->num_bytes * 8;
-}
-
-unsigned uECC_curve_num_n_words(uECC_Curve curve) {
- return BITS_TO_WORDS(curve->num_n_bits);
-}
-
-unsigned uECC_curve_num_n_bytes(uECC_Curve curve) {
- return BITS_TO_BYTES(curve->num_n_bits);
-}
-
-unsigned uECC_curve_num_n_bits(uECC_Curve curve) {
- return curve->num_n_bits;
-}
-
-const uECC_word_t *uECC_curve_p(uECC_Curve curve) {
- return curve->p;
-}
-
-const uECC_word_t *uECC_curve_n(uECC_Curve curve) {
- return curve->n;
-}
-
-const uECC_word_t *uECC_curve_G(uECC_Curve curve) {
- return curve->G;
-}
-
-const uECC_word_t *uECC_curve_b(uECC_Curve curve) {
- return curve->b;
-}
-
-#if uECC_SUPPORT_COMPRESSED_POINT
-void uECC_vli_mod_sqrt(uECC_word_t *a, uECC_Curve curve) {
- curve->mod_sqrt(a, curve);
-}
-#endif
-
-void uECC_vli_mmod_fast(uECC_word_t *result, uECC_word_t *product, uECC_Curve curve) {
-#if (uECC_OPTIMIZATION_LEVEL > 0)
- curve->mmod_fast(result, product);
-#else
- uECC_vli_mmod(result, product, curve->p, curve->num_words);
-#endif
-}
-
-void uECC_point_mult(uECC_word_t *result,
- const uECC_word_t *point,
- const uECC_word_t *scalar,
- uECC_Curve curve) {
- uECC_word_t tmp1[uECC_MAX_WORDS];
- uECC_word_t tmp2[uECC_MAX_WORDS];
- uECC_word_t *p2[2] = {tmp1, tmp2};
- uECC_word_t carry = regularize_k(scalar, tmp1, tmp2, curve);
-
- EccPoint_mult(result, point, p2[!carry], 0, curve->num_n_bits + 1, curve);
-}
-
-#endif /* uECC_ENABLE_VLI_API */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.h b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.h
deleted file mode 100644
index dcbdbfa8b..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.h
+++ /dev/null
@@ -1,367 +0,0 @@
-/* Copyright 2014, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_H_
-#define _UECC_H_
-
-#include
-
-/* Platform selection options.
-If uECC_PLATFORM is not defined, the code will try to guess it based on compiler macros.
-Possible values for uECC_PLATFORM are defined below: */
-#define uECC_arch_other 0
-#define uECC_x86 1
-#define uECC_x86_64 2
-#define uECC_arm 3
-#define uECC_arm_thumb 4
-#define uECC_arm_thumb2 5
-#define uECC_arm64 6
-#define uECC_avr 7
-
-/* If desired, you can define uECC_WORD_SIZE as appropriate for your platform (1, 4, or 8 bytes).
-If uECC_WORD_SIZE is not explicitly defined then it will be automatically set based on your
-platform. */
-
-/* Optimization level; trade speed for code size.
- Larger values produce code that is faster but larger.
- Currently supported values are 0 - 4; 0 is unusably slow for most applications.
- Optimization level 4 currently only has an effect ARM platforms where more than one
- curve is enabled. */
-#ifndef uECC_OPTIMIZATION_LEVEL
- #define uECC_OPTIMIZATION_LEVEL 2
-#endif
-
-/* uECC_SQUARE_FUNC - If enabled (defined as nonzero), this will cause a specific function to be
-used for (scalar) squaring instead of the generic multiplication function. This can make things
-faster somewhat faster, but increases the code size. */
-#ifndef uECC_SQUARE_FUNC
- #define uECC_SQUARE_FUNC 0
-#endif
-
-/* uECC_VLI_NATIVE_LITTLE_ENDIAN - If enabled (defined as nonzero), this will switch to native
-little-endian format for *all* arrays passed in and out of the public API. This includes public
-and private keys, shared secrets, signatures and message hashes.
-Using this switch reduces the amount of call stack memory used by uECC, since less intermediate
-translations are required.
-Note that this will *only* work on native little-endian processors and it will treat the uint8_t
-arrays passed into the public API as word arrays, therefore requiring the provided byte arrays
-to be word aligned on architectures that do not support unaligned accesses.
-IMPORTANT: Keys and signatures generated with uECC_VLI_NATIVE_LITTLE_ENDIAN=1 are incompatible
-with keys and signatures generated with uECC_VLI_NATIVE_LITTLE_ENDIAN=0; all parties must use
-the same endianness. */
-#ifndef uECC_VLI_NATIVE_LITTLE_ENDIAN
- #define uECC_VLI_NATIVE_LITTLE_ENDIAN 0
-#endif
-
-/* Curve support selection. Set to 0 to remove that curve. */
-#ifndef uECC_SUPPORTS_secp160r1
- #define uECC_SUPPORTS_secp160r1 1
-#endif
-#ifndef uECC_SUPPORTS_secp192r1
- #define uECC_SUPPORTS_secp192r1 1
-#endif
-#ifndef uECC_SUPPORTS_secp224r1
- #define uECC_SUPPORTS_secp224r1 1
-#endif
-#ifndef uECC_SUPPORTS_secp256r1
- #define uECC_SUPPORTS_secp256r1 1
-#endif
-#ifndef uECC_SUPPORTS_secp256k1
- #define uECC_SUPPORTS_secp256k1 1
-#endif
-
-/* Specifies whether compressed point format is supported.
- Set to 0 to disable point compression/decompression functions. */
-#ifndef uECC_SUPPORT_COMPRESSED_POINT
- #define uECC_SUPPORT_COMPRESSED_POINT 1
-#endif
-
-struct uECC_Curve_t;
-typedef const struct uECC_Curve_t * uECC_Curve;
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#if uECC_SUPPORTS_secp160r1
-uECC_Curve uECC_secp160r1(void);
-#endif
-#if uECC_SUPPORTS_secp192r1
-uECC_Curve uECC_secp192r1(void);
-#endif
-#if uECC_SUPPORTS_secp224r1
-uECC_Curve uECC_secp224r1(void);
-#endif
-#if uECC_SUPPORTS_secp256r1
-uECC_Curve uECC_secp256r1(void);
-#endif
-#if uECC_SUPPORTS_secp256k1
-uECC_Curve uECC_secp256k1(void);
-#endif
-
-/* uECC_RNG_Function type
-The RNG function should fill 'size' random bytes into 'dest'. It should return 1 if
-'dest' was filled with random data, or 0 if the random data could not be generated.
-The filled-in values should be either truly random, or from a cryptographically-secure PRNG.
-
-A correctly functioning RNG function must be set (using uECC_set_rng()) before calling
-uECC_make_key() or uECC_sign().
-
-Setting a correctly functioning RNG function improves the resistance to side-channel attacks
-for uECC_shared_secret() and uECC_sign_deterministic().
-
-A correct RNG function is set by default when building for Windows, Linux, or OS X.
-If you are building on another POSIX-compliant system that supports /dev/random or /dev/urandom,
-you can define uECC_POSIX to use the predefined RNG. For embedded platforms there is no predefined
-RNG function; you must provide your own.
-*/
-typedef int (*uECC_RNG_Function)(uint8_t *dest, unsigned size);
-
-/* uECC_set_rng() function.
-Set the function that will be used to generate random bytes. The RNG function should
-return 1 if the random data was generated, or 0 if the random data could not be generated.
-
-On platforms where there is no predefined RNG function (eg embedded platforms), this must
-be called before uECC_make_key() or uECC_sign() are used.
-
-Inputs:
- rng_function - The function that will be used to generate random bytes.
-*/
-void uECC_set_rng(uECC_RNG_Function rng_function);
-
-/* uECC_get_rng() function.
-
-Returns the function that will be used to generate random bytes.
-*/
-uECC_RNG_Function uECC_get_rng(void);
-
-/* uECC_curve_private_key_size() function.
-
-Returns the size of a private key for the curve in bytes.
-*/
-int uECC_curve_private_key_size(uECC_Curve curve);
-
-/* uECC_curve_public_key_size() function.
-
-Returns the size of a public key for the curve in bytes.
-*/
-int uECC_curve_public_key_size(uECC_Curve curve);
-
-/* uECC_make_key() function.
-Create a public/private key pair.
-
-Outputs:
- public_key - Will be filled in with the public key. Must be at least 2 * the curve size
- (in bytes) long. For example, if the curve is secp256r1, public_key must be 64
- bytes long.
- private_key - Will be filled in with the private key. Must be as long as the curve order; this
- is typically the same as the curve size, except for secp160r1. For example, if the
- curve is secp256r1, private_key must be 32 bytes long.
-
- For secp160r1, private_key must be 21 bytes long! Note that the first byte will
- almost always be 0 (there is about a 1 in 2^80 chance of it being non-zero).
-
-Returns 1 if the key pair was generated successfully, 0 if an error occurred.
-*/
-int uECC_make_key(uint8_t *public_key, uint8_t *private_key, uECC_Curve curve);
-
-/* uECC_shared_secret() function.
-Compute a shared secret given your secret key and someone else's public key. If the public key
-is not from a trusted source and has not been previously verified, you should verify it first
-using uECC_valid_public_key().
-Note: It is recommended that you hash the result of uECC_shared_secret() before using it for
-symmetric encryption or HMAC.
-
-Inputs:
- public_key - The public key of the remote party.
- private_key - Your private key.
-
-Outputs:
- secret - Will be filled in with the shared secret value. Must be the same size as the
- curve size; for example, if the curve is secp256r1, secret must be 32 bytes long.
-
-Returns 1 if the shared secret was generated successfully, 0 if an error occurred.
-*/
-int uECC_shared_secret(const uint8_t *public_key,
- const uint8_t *private_key,
- uint8_t *secret,
- uECC_Curve curve);
-
-#if uECC_SUPPORT_COMPRESSED_POINT
-/* uECC_compress() function.
-Compress a public key.
-
-Inputs:
- public_key - The public key to compress.
-
-Outputs:
- compressed - Will be filled in with the compressed public key. Must be at least
- (curve size + 1) bytes long; for example, if the curve is secp256r1,
- compressed must be 33 bytes long.
-*/
-void uECC_compress(const uint8_t *public_key, uint8_t *compressed, uECC_Curve curve);
-
-/* uECC_decompress() function.
-Decompress a compressed public key.
-
-Inputs:
- compressed - The compressed public key.
-
-Outputs:
- public_key - Will be filled in with the decompressed public key.
-*/
-void uECC_decompress(const uint8_t *compressed, uint8_t *public_key, uECC_Curve curve);
-#endif /* uECC_SUPPORT_COMPRESSED_POINT */
-
-/* uECC_valid_public_key() function.
-Check to see if a public key is valid.
-
-Note that you are not required to check for a valid public key before using any other uECC
-functions. However, you may wish to avoid spending CPU time computing a shared secret or
-verifying a signature using an invalid public key.
-
-Inputs:
- public_key - The public key to check.
-
-Returns 1 if the public key is valid, 0 if it is invalid.
-*/
-int uECC_valid_public_key(const uint8_t *public_key, uECC_Curve curve);
-
-/* uECC_compute_public_key() function.
-Compute the corresponding public key for a private key.
-
-Inputs:
- private_key - The private key to compute the public key for
-
-Outputs:
- public_key - Will be filled in with the corresponding public key
-
-Returns 1 if the key was computed successfully, 0 if an error occurred.
-*/
-int uECC_compute_public_key(const uint8_t *private_key, uint8_t *public_key, uECC_Curve curve);
-
-/* uECC_sign() function.
-Generate an ECDSA signature for a given hash value.
-
-Usage: Compute a hash of the data you wish to sign (SHA-2 is recommended) and pass it in to
-this function along with your private key.
-
-Inputs:
- private_key - Your private key.
- message_hash - The hash of the message to sign.
- hash_size - The size of message_hash in bytes.
-
-Outputs:
- signature - Will be filled in with the signature value. Must be at least 2 * curve size long.
- For example, if the curve is secp256r1, signature must be 64 bytes long.
-
-Returns 1 if the signature generated successfully, 0 if an error occurred.
-*/
-int uECC_sign(const uint8_t *private_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- uint8_t *signature,
- uECC_Curve curve);
-
-/* uECC_HashContext structure.
-This is used to pass in an arbitrary hash function to uECC_sign_deterministic().
-The structure will be used for multiple hash computations; each time a new hash
-is computed, init_hash() will be called, followed by one or more calls to
-update_hash(), and finally a call to finish_hash() to produce the resulting hash.
-
-The intention is that you will create a structure that includes uECC_HashContext
-followed by any hash-specific data. For example:
-
-typedef struct SHA256_HashContext {
- uECC_HashContext uECC;
- SHA256_CTX ctx;
-} SHA256_HashContext;
-
-void init_SHA256(uECC_HashContext *base) {
- SHA256_HashContext *context = (SHA256_HashContext *)base;
- SHA256_Init(&context->ctx);
-}
-
-void update_SHA256(uECC_HashContext *base,
- const uint8_t *message,
- unsigned message_size) {
- SHA256_HashContext *context = (SHA256_HashContext *)base;
- SHA256_Update(&context->ctx, message, message_size);
-}
-
-void finish_SHA256(uECC_HashContext *base, uint8_t *hash_result) {
- SHA256_HashContext *context = (SHA256_HashContext *)base;
- SHA256_Final(hash_result, &context->ctx);
-}
-
-... when signing ...
-{
- uint8_t tmp[32 + 32 + 64];
- SHA256_HashContext ctx = {{&init_SHA256, &update_SHA256, &finish_SHA256, 64, 32, tmp}};
- uECC_sign_deterministic(key, message_hash, &ctx.uECC, signature);
-}
-*/
-typedef struct uECC_HashContext {
- void (*init_hash)(const struct uECC_HashContext *context);
- void (*update_hash)(const struct uECC_HashContext *context,
- const uint8_t *message,
- unsigned message_size);
- void (*finish_hash)(const struct uECC_HashContext *context, uint8_t *hash_result);
- unsigned block_size; /* Hash function block size in bytes, eg 64 for SHA-256. */
- unsigned result_size; /* Hash function result size in bytes, eg 32 for SHA-256. */
- uint8_t *tmp; /* Must point to a buffer of at least (2 * result_size + block_size) bytes. */
-} uECC_HashContext;
-
-/* uECC_sign_deterministic() function.
-Generate an ECDSA signature for a given hash value, using a deterministic algorithm
-(see RFC 6979). You do not need to set the RNG using uECC_set_rng() before calling
-this function; however, if the RNG is defined it will improve resistance to side-channel
-attacks.
-
-Usage: Compute a hash of the data you wish to sign (SHA-2 is recommended) and pass it to
-this function along with your private key and a hash context. Note that the message_hash
-does not need to be computed with the same hash function used by hash_context.
-
-Inputs:
- private_key - Your private key.
- message_hash - The hash of the message to sign.
- hash_size - The size of message_hash in bytes.
- hash_context - A hash context to use.
-
-Outputs:
- signature - Will be filled in with the signature value.
-
-Returns 1 if the signature generated successfully, 0 if an error occurred.
-*/
-int uECC_sign_deterministic(const uint8_t *private_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- const uECC_HashContext *hash_context,
- uint8_t *signature,
- uECC_Curve curve);
-
-/* uECC_verify() function.
-Verify an ECDSA signature.
-
-Usage: Compute the hash of the signed data using the same hash as the signer and
-pass it to this function along with the signer's public key and the signature values (r and s).
-
-Inputs:
- public_key - The signer's public key.
- message_hash - The hash of the signed data.
- hash_size - The size of message_hash in bytes.
- signature - The signature value.
-
-Returns 1 if the signature is valid, 0 if it is invalid.
-*/
-int uECC_verify(const uint8_t *public_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- const uint8_t *signature,
- uECC_Curve curve);
-
-#ifdef __cplusplus
-} /* end of extern "C" */
-#endif
-
-#endif /* _UECC_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC_vli.h b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC_vli.h
deleted file mode 100644
index 864cc3335..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC_vli.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */
-
-#ifndef _UECC_VLI_H_
-#define _UECC_VLI_H_
-
-#include "uECC.h"
-#include "types.h"
-
-/* Functions for raw large-integer manipulation. These are only available
- if uECC.c is compiled with uECC_ENABLE_VLI_API defined to 1. */
-#ifndef uECC_ENABLE_VLI_API
- #define uECC_ENABLE_VLI_API 0
-#endif
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-#if uECC_ENABLE_VLI_API
-
-void uECC_vli_clear(uECC_word_t *vli, wordcount_t num_words);
-
-/* Constant-time comparison to zero - secure way to compare long integers */
-/* Returns 1 if vli == 0, 0 otherwise. */
-uECC_word_t uECC_vli_isZero(const uECC_word_t *vli, wordcount_t num_words);
-
-/* Returns nonzero if bit 'bit' of vli is set. */
-uECC_word_t uECC_vli_testBit(const uECC_word_t *vli, bitcount_t bit);
-
-/* Counts the number of bits required to represent vli. */
-bitcount_t uECC_vli_numBits(const uECC_word_t *vli, const wordcount_t max_words);
-
-/* Sets dest = src. */
-void uECC_vli_set(uECC_word_t *dest, const uECC_word_t *src, wordcount_t num_words);
-
-/* Constant-time comparison function - secure way to compare long integers */
-/* Returns one if left == right, zero otherwise */
-uECC_word_t uECC_vli_equal(const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words);
-
-/* Constant-time comparison function - secure way to compare long integers */
-/* Returns sign of left - right, in constant time. */
-cmpresult_t uECC_vli_cmp(const uECC_word_t *left, const uECC_word_t *right, wordcount_t num_words);
-
-/* Computes vli = vli >> 1. */
-void uECC_vli_rshift1(uECC_word_t *vli, wordcount_t num_words);
-
-/* Computes result = left + right, returning carry. Can modify in place. */
-uECC_word_t uECC_vli_add(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words);
-
-/* Computes result = left - right, returning borrow. Can modify in place. */
-uECC_word_t uECC_vli_sub(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words);
-
-/* Computes result = left * right. Result must be 2 * num_words long. */
-void uECC_vli_mult(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- wordcount_t num_words);
-
-/* Computes result = left^2. Result must be 2 * num_words long. */
-void uECC_vli_square(uECC_word_t *result, const uECC_word_t *left, wordcount_t num_words);
-
-/* Computes result = (left + right) % mod.
- Assumes that left < mod and right < mod, and that result does not overlap mod. */
-void uECC_vli_modAdd(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- const uECC_word_t *mod,
- wordcount_t num_words);
-
-/* Computes result = (left - right) % mod.
- Assumes that left < mod and right < mod, and that result does not overlap mod. */
-void uECC_vli_modSub(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- const uECC_word_t *mod,
- wordcount_t num_words);
-
-/* Computes result = product % mod, where product is 2N words long.
- Currently only designed to work for mod == curve->p or curve_n. */
-void uECC_vli_mmod(uECC_word_t *result,
- uECC_word_t *product,
- const uECC_word_t *mod,
- wordcount_t num_words);
-
-/* Calculates result = product (mod curve->p), where product is up to
- 2 * curve->num_words long. */
-void uECC_vli_mmod_fast(uECC_word_t *result, uECC_word_t *product, uECC_Curve curve);
-
-/* Computes result = (left * right) % mod.
- Currently only designed to work for mod == curve->p or curve_n. */
-void uECC_vli_modMult(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- const uECC_word_t *mod,
- wordcount_t num_words);
-
-/* Computes result = (left * right) % curve->p. */
-void uECC_vli_modMult_fast(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *right,
- uECC_Curve curve);
-
-/* Computes result = left^2 % mod.
- Currently only designed to work for mod == curve->p or curve_n. */
-void uECC_vli_modSquare(uECC_word_t *result,
- const uECC_word_t *left,
- const uECC_word_t *mod,
- wordcount_t num_words);
-
-/* Computes result = left^2 % curve->p. */
-void uECC_vli_modSquare_fast(uECC_word_t *result, const uECC_word_t *left, uECC_Curve curve);
-
-/* Computes result = (1 / input) % mod.*/
-void uECC_vli_modInv(uECC_word_t *result,
- const uECC_word_t *input,
- const uECC_word_t *mod,
- wordcount_t num_words);
-
-#if uECC_SUPPORT_COMPRESSED_POINT
-/* Calculates a = sqrt(a) (mod curve->p) */
-void uECC_vli_mod_sqrt(uECC_word_t *a, uECC_Curve curve);
-#endif
-
-/* Converts an integer in uECC native format to big-endian bytes. */
-void uECC_vli_nativeToBytes(uint8_t *bytes, int num_bytes, const uECC_word_t *native);
-/* Converts big-endian bytes to an integer in uECC native format. */
-void uECC_vli_bytesToNative(uECC_word_t *native, const uint8_t *bytes, int num_bytes);
-
-unsigned uECC_curve_num_words(uECC_Curve curve);
-unsigned uECC_curve_num_bytes(uECC_Curve curve);
-unsigned uECC_curve_num_bits(uECC_Curve curve);
-unsigned uECC_curve_num_n_words(uECC_Curve curve);
-unsigned uECC_curve_num_n_bytes(uECC_Curve curve);
-unsigned uECC_curve_num_n_bits(uECC_Curve curve);
-
-const uECC_word_t *uECC_curve_p(uECC_Curve curve);
-const uECC_word_t *uECC_curve_n(uECC_Curve curve);
-const uECC_word_t *uECC_curve_G(uECC_Curve curve);
-const uECC_word_t *uECC_curve_b(uECC_Curve curve);
-
-int uECC_valid_point(const uECC_word_t *point, uECC_Curve curve);
-
-/* Multiplies a point by a scalar. Points are represented by the X coordinate followed by
- the Y coordinate in the same array, both coordinates are curve->num_words long. Note
- that scalar must be curve->num_n_words long (NOT curve->num_words). */
-void uECC_point_mult(uECC_word_t *result,
- const uECC_word_t *point,
- const uECC_word_t *scalar,
- uECC_Curve curve);
-
-/* Generates a random integer in the range 0 < random < top.
- Both random and top have num_words words. */
-int uECC_generate_random_int(uECC_word_t *random,
- const uECC_word_t *top,
- wordcount_t num_words);
-
-#endif /* uECC_ENABLE_VLI_API */
-
-#ifdef __cplusplus
-} /* end of extern "C" */
-#endif
-
-#endif /* _UECC_VLI_H_ */
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/uECC_verify_antifault.c b/ports/espressif/components/bootloader/subproject/components/micro-ecc/uECC_verify_antifault.c
deleted file mode 100644
index e5d58b5c5..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/uECC_verify_antifault.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2014, Kenneth MacKay
- *
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * SPDX-FileContributor: 2020-2021 Espressif Systems (Shanghai) CO LTD
- */
-
-/* uECC_verify() calls a number of static functions form here and
- uses other definitions, so we just build that whole source file here and then append
- our modified version uECC_verify_antifault(). */
-#include "micro-ecc/uECC.c"
-
-/* Version of uECC_verify() which also copies message_hash into verified_hash,
- but only if the signature is valid. Does this in an FI resistant way.
-*/
-int uECC_verify_antifault(const uint8_t *public_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- const uint8_t *signature,
- uECC_Curve curve,
- uint8_t *verified_hash) {
- uECC_word_t u1[uECC_MAX_WORDS], u2[uECC_MAX_WORDS];
- uECC_word_t z[uECC_MAX_WORDS];
- uECC_word_t sum[uECC_MAX_WORDS * 2];
- uECC_word_t rx[uECC_MAX_WORDS];
- uECC_word_t ry[uECC_MAX_WORDS];
- uECC_word_t tx[uECC_MAX_WORDS];
- uECC_word_t ty[uECC_MAX_WORDS];
- uECC_word_t tz[uECC_MAX_WORDS];
- const uECC_word_t *points[4];
- const uECC_word_t *point;
- bitcount_t num_bits;
- bitcount_t i;
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- uECC_word_t *_public = (uECC_word_t *)public_key;
-#else
- uECC_word_t _public[uECC_MAX_WORDS * 2];
-#endif
- uECC_word_t r[uECC_MAX_WORDS], s[uECC_MAX_WORDS];
- wordcount_t num_words = curve->num_words;
- wordcount_t num_n_words = BITS_TO_WORDS(curve->num_n_bits);
-
- rx[num_n_words - 1] = 0;
- r[num_n_words - 1] = 0;
- s[num_n_words - 1] = 0;
-
-#if uECC_VLI_NATIVE_LITTLE_ENDIAN
- bcopy((uint8_t *) r, signature, curve->num_bytes);
- bcopy((uint8_t *) s, signature + curve->num_bytes, curve->num_bytes);
-#else
- uECC_vli_bytesToNative(_public, public_key, curve->num_bytes);
- uECC_vli_bytesToNative(
- _public + num_words, public_key + curve->num_bytes, curve->num_bytes);
- uECC_vli_bytesToNative(r, signature, curve->num_bytes);
- uECC_vli_bytesToNative(s, signature + curve->num_bytes, curve->num_bytes);
-#endif
-
- /* r, s must not be 0. */
- if (uECC_vli_isZero(r, num_words) || uECC_vli_isZero(s, num_words)) {
- return 0;
- }
-
- /* r, s must be < n. */
- if (uECC_vli_cmp(curve->n, r, num_n_words) != 1 ||
- uECC_vli_cmp(curve->n, s, num_n_words) != 1) {
- return 0;
- }
-
- /* Calculate u1 and u2. */
- uECC_vli_modInv(z, s, curve->n, num_n_words); /* z = 1/s */
- u1[num_n_words - 1] = 0;
- bits2int(u1, message_hash, hash_size, curve);
- uECC_vli_modMult(u1, u1, z, curve->n, num_n_words); /* u1 = e/s */
- uECC_vli_modMult(u2, r, z, curve->n, num_n_words); /* u2 = r/s */
-
- /* Calculate sum = G + Q. */
- uECC_vli_set(sum, _public, num_words);
- uECC_vli_set(sum + num_words, _public + num_words, num_words);
- uECC_vli_set(tx, curve->G, num_words);
- uECC_vli_set(ty, curve->G + num_words, num_words);
- uECC_vli_modSub(z, sum, tx, curve->p, num_words); /* z = x2 - x1 */
- XYcZ_add(tx, ty, sum, sum + num_words, curve);
- uECC_vli_modInv(z, z, curve->p, num_words); /* z = 1/z */
- apply_z(sum, sum + num_words, z, curve);
-
- /* Use Shamir's trick to calculate u1*G + u2*Q */
- points[0] = 0;
- points[1] = curve->G;
- points[2] = _public;
- points[3] = sum;
- num_bits = smax(uECC_vli_numBits(u1, num_n_words),
- uECC_vli_numBits(u2, num_n_words));
-
- point = points[(!!uECC_vli_testBit(u1, num_bits - 1)) |
- ((!!uECC_vli_testBit(u2, num_bits - 1)) << 1)];
- uECC_vli_set(rx, point, num_words);
- uECC_vli_set(ry, point + num_words, num_words);
- uECC_vli_clear(z, num_words);
- z[0] = 1;
-
- for (i = num_bits - 2; i >= 0; --i) {
- uECC_word_t index;
- curve->double_jacobian(rx, ry, z, curve);
-
- index = (!!uECC_vli_testBit(u1, i)) | ((!!uECC_vli_testBit(u2, i)) << 1);
- point = points[index];
- if (point) {
- uECC_vli_set(tx, point, num_words);
- uECC_vli_set(ty, point + num_words, num_words);
- apply_z(tx, ty, z, curve);
- uECC_vli_modSub(tz, rx, tx, curve->p, num_words); /* Z = x2 - x1 */
- XYcZ_add(tx, ty, rx, ry, curve);
- uECC_vli_modMult_fast(z, z, tz, curve);
- }
- }
-
- uECC_vli_modInv(z, z, curve->p, num_words); /* Z = 1/Z */
- apply_z(rx, ry, z, curve);
-
- /* v = x1 (mod n) */
- if (uECC_vli_cmp(curve->n, rx, num_n_words) != 1) {
- uECC_vli_sub(rx, rx, curve->n, num_n_words);
- }
-
- /* Anti-FI addition. Copy message_hash into verified_hash, but do it in a
- way that it will only happen if v == r (ie, rx == r)
- */
- const uECC_word_t *mhash_words = (const uECC_word_t *)message_hash;
- uECC_word_t *vhash_words = (uECC_word_t *)verified_hash;
- unsigned hash_words = hash_size / sizeof(uECC_word_t);
- for (unsigned int w = 0; w < hash_words; w++) {
- /* note: using curve->num_words here to encourage compiler to re-read this variable */
- vhash_words[w] = mhash_words[w] ^ rx[w % curve->num_words] ^ r[w % curve->num_words];
- }
- /* Curve may be longer than hash, in which case keep reading the rest of the bytes */
- for (int w = hash_words; w < curve->num_words; w++) {
- vhash_words[w % hash_words] |= rx[w] ^ r[w];
- }
-
- /* Accept only if v == r. */
- return (int)(uECC_vli_equal(rx, r, num_words));
-}
diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/uECC_verify_antifault.h b/ports/espressif/components/bootloader/subproject/components/micro-ecc/uECC_verify_antifault.h
deleted file mode 100644
index 46fa49d13..000000000
--- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/uECC_verify_antifault.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2014, Kenneth MacKay
- *
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * SPDX-FileContributor: 2020-2021 Espressif Systems (Shanghai) CO LTD
- */
-#pragma once
-#include "uECC.h"
-
-/* Version uECC_verify() that also copies message_hash to verified_hash
- if the signature is valid, and does it in a way that is harder to attack
- with fault injection.
-*/
-int uECC_verify_antifault(const uint8_t *public_key,
- const uint8_t *message_hash,
- unsigned hash_size,
- const uint8_t *signature,
- uECC_Curve curve,
- uint8_t *verified_hash);
diff --git a/ports/espressif/components/bootloader/subproject/main/CMakeLists.txt b/ports/espressif/components/bootloader/subproject/main/CMakeLists.txt
deleted file mode 100644
index 159260adb..000000000
--- a/ports/espressif/components/bootloader/subproject/main/CMakeLists.txt
+++ /dev/null
@@ -1,11 +0,0 @@
-idf_component_register(SRCS "bootloader_start.c"
- INCLUDE_DIRS "../../../../boards/${BOARD}"
- REQUIRES bootloader bootloader_support hal)
-
-idf_build_get_property(target IDF_TARGET)
-set(scripts "ld/${target}/bootloader.ld")
-
-list(APPEND scripts "ld/${target}/bootloader.rom.ld")
-target_linker_script(${COMPONENT_LIB} INTERFACE "${scripts}")
-
-target_link_libraries(${COMPONENT_LIB} INTERFACE "-u bootloader_hooks_include")
diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.ld
deleted file mode 100644
index 6516fc3c2..000000000
--- a/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.ld
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/*
-Linker file used to link the bootloader.
-*/
-
-
-/* Simplified memory map for the bootloader
-
- The main purpose is to make sure the bootloader can load into main memory
- without overwriting itself.
-*/
-
-MEMORY
-{
- /* IRAM POOL1, used for APP CPU cache. Bootloader runs from here during the final stage of loading the app because APP CPU is still held in reset, the main app enables APP CPU cache */
- iram_loader_seg (RWX) : org = 0x40078000, len = 0x8000 /* 32KB, APP CPU cache */
- /* 63kB, IRAM. We skip the first 1k to prevent the entry point being
- placed into the same range as exception vectors in the app.
- This leads to idf_monitor decoding ROM bootloader "entry 0x40080xxx"
- message as one of the exception vectors, which looks scary to users.
- */
- iram_seg (RWX) : org = 0x40080400, len = 0xfc00
- /* 64k at the end of DRAM, after ROM bootloader stack */
- dram_seg (RW) : org = 0x3FFF0000, len = 0x6000
-}
-
-/* Default entry point: */
-ENTRY(call_start_cpu0);
-
-
-SECTIONS
-{
-
- .iram_loader.text :
- {
- . = ALIGN (16);
- _loader_text_start = ABSOLUTE(.);
- *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *liblog.a:(.literal .text .literal.* .text.*)
- *libgcc.a:(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random)
- *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
- *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libefuse.a:*.*(.literal .text .literal.* .text.*)
- *libesp_rom.a:*.*(.literal .text .literal.* .text.*)
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
- _loader_text_end = ABSOLUTE(.);
- } > iram_loader_seg
-
- .iram.text :
- {
- . = ALIGN (16);
- *(.entry.text)
- *(.init.literal)
- *(.init)
- } > iram_seg
-
-
- /* Shared RAM */
- .dram0.bss (NOLOAD) :
- {
- . = ALIGN (8);
- _dram_start = ABSOLUTE(.);
- _bss_start = ABSOLUTE(.);
- *(.dynsbss)
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- *(.dynbss)
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN (8);
- _bss_end = ABSOLUTE(.);
- } >dram_seg
-
- .dram0.data :
- {
- _data_start = ABSOLUTE(.);
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- *(.data1)
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- *(.gnu.linkonce.s2.*)
- *(.jcr)
- _data_end = ABSOLUTE(.);
- } >dram_seg
-
- .dram0.rodata :
- {
- _rodata_start = ABSOLUTE(.);
- *(.rodata)
- *(.rodata.*)
- *(.gnu.linkonce.r.*)
- *(.rodata1)
- *(.sdata2 .sdata2.*)
- __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
- *(.xt_except_table)
- *(.gcc_except_table)
- *(.gnu.linkonce.e.*)
- *(.gnu.version_r)
- *(.eh_frame)
- . = (. + 3) & ~ 3;
- /* C++ constructor and destructor tables, properly ordered: */
- __init_array_start = ABSOLUTE(.);
- KEEP (*crtbegin.*(.ctors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- __init_array_end = ABSOLUTE(.);
- KEEP (*crtbegin.*(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- /* C++ exception handlers table: */
- __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
- *(.xt_except_desc)
- *(.gnu.linkonce.h.*)
- __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
- *(.xt_except_desc_end)
- *(.dynamic)
- *(.gnu.version_d)
- _rodata_end = ABSOLUTE(.);
- /* Literals are also RO data. */
- _lit4_start = ABSOLUTE(.);
- *(*.lit4)
- *(.lit4.*)
- *(.gnu.linkonce.lit4.*)
- _lit4_end = ABSOLUTE(.);
- . = ALIGN(4);
- _dram_end = ABSOLUTE(.);
- } >dram_seg
-
- .iram.text :
- {
- _stext = .;
- _text_start = ABSOLUTE(.);
- *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram .iram.*) /* catch stray IRAM_ATTR */
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
-
- /** CPU will try to prefetch up to 16 bytes of
- * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
- * safe access to up to 16 bytes after the last real instruction, add
- * dummy bytes to ensure this
- */
- . += 16;
-
- _text_end = ABSOLUTE(.);
- _etext = .;
- } > iram_seg
-
- /** This section will be used by the debugger and disassembler to get more information
- * about raw data present in the code.
- * Indeed, it may be required to add some padding at some points in the code
- * in order to align a branch/jump destination on a particular bound.
- * Padding these instructions will generate null bytes that shall be
- * interpreted as data, and not code by the debugger or disassembler.
- * This section will only be present in the ELF file, not in the final binary
- * For more details, check GCC-212
- */
- .xt.prop 0 :
- {
- KEEP (*(.xt.prop .gnu.linkonce.prop.*))
- }
-
- .xt.lit 0 :
- {
- KEEP (*(.xt.lit .gnu.linkonce.p.*))
- }
-
-}
diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld
deleted file mode 100644
index e69de29bb..000000000
diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld
deleted file mode 100644
index 68e3a1c38..000000000
--- a/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld
+++ /dev/null
@@ -1,251 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/** Simplified memory map for the bootloader.
- * Make sure the bootloader can load into main memory without overwriting itself.
- *
- * ESP32-C3 ROM static data usage is as follows:
- * - 0x3fccae00 - 0x3fcdc710: Shared buffers, used in UART/USB/SPI download mode only
- * - 0x3fcdc710 - 0x3fcde710: PRO CPU stack, can be reclaimed as heap after RTOS startup
- * - 0x3fcde710 - 0x3fce0000: ROM .bss and .data (not easily reclaimable)
- *
- * The 2nd stage bootloader can take space up to the end of ROM shared
- * buffers area (0x3fcdc710).
- */
-
-/* The offset between Dbus and Ibus. Used to convert between 0x403xxxxx and 0x3fcxxxxx addresses. */
-iram_dram_offset = 0x700000;
-
-/* We consider 0x3fcdc710 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
- * and work out iram_seg and iram_loader_seg addresses from there, backwards.
- */
-
-/* These lengths can be adjusted, if necessary: */
-bootloader_usable_dram_end = 0x3fcdc710;
-bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
-bootloader_dram_seg_len = 0x5000;
-bootloader_iram_loader_seg_len = 0x7000;
-bootloader_iram_seg_len = 0x2000;
-
-/* Start of the lower region is determined by region size and the end of the higher region */
-bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
-bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len;
-bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len + iram_dram_offset;
-bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len;
-
-MEMORY
-{
- iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len
- iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len
- dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len
-}
-
-/* The app may use RAM for static allocations up to the start of iram_loader_seg.
- * If you have changed something above and this assert fails:
- * 1. Check what the new value of bootloader_iram_loader_seg start is.
- * 2. Update the value in this assert.
- * 3. Update (SRAM_DRAM_END + I_D_SRAM_OFFSET) in components/esp_system/ld/esp32c3/memory.ld.in to the same value.
- */
-ASSERT(bootloader_iram_loader_seg_start == 0x403ce710, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
-
-/* Default entry point: */
-ENTRY(call_start_cpu0);
-
-SECTIONS
-{
-
- .iram_loader.text :
- {
- . = ALIGN (16);
- _loader_text_start = ABSOLUTE(.);
- *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *liblog.a:(.literal .text .literal.* .text.*)
- *libgcc.a:(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
- *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
- *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
- *libefuse.a:*.*(.literal .text .literal.* .text.*)
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
- _loader_text_end = ABSOLUTE(.);
- } > iram_loader_seg
-
- .iram.text :
- {
- . = ALIGN (16);
- *(.entry.text)
- *(.init.literal)
- *(.init)
- } > iram_seg
-
-
- /* Shared RAM */
- .dram0.bss (NOLOAD) :
- {
- . = ALIGN (8);
- _dram_start = ABSOLUTE(.);
- _bss_start = ABSOLUTE(.);
- *(.dynsbss)
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- *(.dynbss)
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN (8);
- _bss_end = ABSOLUTE(.);
- } > dram_seg
-
- .dram0.data :
- {
- _data_start = ABSOLUTE(.);
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- *(.data1)
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- *(.gnu.linkonce.s2.*)
- *(.jcr)
- _data_end = ABSOLUTE(.);
- } > dram_seg
-
- .dram0.rodata :
- {
- _rodata_start = ABSOLUTE(.);
- *(.rodata)
- *(.rodata.*)
- *(.gnu.linkonce.r.*)
- *(.rodata1)
- *(.sdata2 .sdata2.* .srodata .srodata.*)
- __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
- *(.xt_except_table)
- *(.gcc_except_table)
- *(.gnu.linkonce.e.*)
- *(.gnu.version_r)
- *(.eh_frame)
- . = (. + 3) & ~ 3;
- /* C++ constructor and destructor tables, properly ordered: */
- __init_array_start = ABSOLUTE(.);
- KEEP (*crtbegin.*(.ctors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- __init_array_end = ABSOLUTE(.);
- KEEP (*crtbegin.*(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- /* C++ exception handlers table: */
- __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
- *(.xt_except_desc)
- *(.gnu.linkonce.h.*)
- __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
- *(.xt_except_desc_end)
- *(.dynamic)
- *(.gnu.version_d)
- _rodata_end = ABSOLUTE(.);
- /* Literals are also RO data. */
- _lit4_start = ABSOLUTE(.);
- *(*.lit4)
- *(.lit4.*)
- *(.gnu.linkonce.lit4.*)
- _lit4_end = ABSOLUTE(.);
- . = ALIGN(4);
- _dram_end = ABSOLUTE(.);
- } > dram_seg
-
- .iram.text :
- {
- _stext = .;
- _text_start = ABSOLUTE(.);
- *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram .iram.*) /* catch stray IRAM_ATTR */
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
-
- /** CPU will try to prefetch up to 16 bytes of
- * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
- * safe access to up to 16 bytes after the last real instruction, add
- * dummy bytes to ensure this
- */
- . += 16;
-
- _text_end = ABSOLUTE(.);
- _etext = .;
- } > iram_seg
-
-}
-
-
-/**
- * Appendix: Memory Usage of ROM bootloader
- *
- * 0x3fccae00 ------------------> _dram0_0_start
- * | |
- * | |
- * | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h
- * | |
- * | |
- * 0x3fcdc710 ------------------> __stack_sentry
- * | |
- * | | 2. Startup pro cpu stack (freed when IDF app is running)
- * | |
- * 0x3fcde710 ------------------> __stack (pro cpu)
- * | |
- * | |
- * | | 3. Shared memory only used in startup code or nonos/early boot*
- * | | (can be freed when IDF runs)
- * | |
- * | |
- * 0x3fcdf060 ------------------> _dram0_rtos_reserved_start
- * | |
- * | |
- * | | 4. Shared memory used in startup code and when IDF runs
- * | |
- * | |
- * 0x3fcdf664 ------------------> _dram0_rtos_reserved_end
- * | |
- * 0x3fcdf830 ------------------> _data_start_interface
- * | |
- * | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
- * | |
- * 0x3fce0000 ------------------> _data_end_interface
- */
diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.rom.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.rom.ld
deleted file mode 100644
index 54f8c5412..000000000
--- a/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.rom.ld
+++ /dev/null
@@ -1 +0,0 @@
-/* No definition for ESP32-C3 target */
diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32h2/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32h2/bootloader.ld
deleted file mode 100644
index b40c4ed46..000000000
--- a/ports/espressif/components/bootloader/subproject/main/ld/esp32h2/bootloader.ld
+++ /dev/null
@@ -1,248 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/** Simplified memory map for the bootloader.
- * Make sure the bootloader can load into main memory without overwriting itself.
- *
- * ESP32-H2 ROM static data usage is as follows:
- * - 0x4083ba78 - 0x4084d380: Shared buffers, used in UART/USB/SPI download mode only
- * - 0x4084d380 - 0x4084f380: PRO CPU stack, can be reclaimed as heap after RTOS startup
- * - 0x4084f380 - 0x4084fee0: ROM .bss and .data used in startup code or nonos/early boot (can be freed when IDF runs)
- * - 0x4084fee0 - 0x40850000: ROM .bss and .data used in startup code and when IDF runs (cannot be freed)
- *
- * The 2nd stage bootloader can take space up to the end of ROM shared
- * buffers area (0x4084d380).
- */
-
-/* We consider 0x3fcdc710 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
- * and work out iram_seg and iram_loader_seg addresses from there, backwards.
- */
-
-/* These lengths can be adjusted, if necessary: */
-bootloader_usable_dram_end = 0x4084cfd0;
-bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
-bootloader_dram_seg_len = 0x5000;
-bootloader_iram_loader_seg_len = 0x7000;
-bootloader_iram_seg_len = 0x2000;
-
-/* Start of the lower region is determined by region size and the end of the higher region */
-bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
-bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len;
-bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len;
-bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len;
-
-MEMORY
-{
- iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len
- iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len
- dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len
-}
-
-/* The app may use RAM for static allocations up to the start of iram_loader_seg.
- * If you have changed something above and this assert fails:
- * 1. Check what the new value of bootloader_iram_loader_seg start is.
- * 2. Update the value in this assert.
- * 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32h2/memory.ld.in to the same value.
- */
-ASSERT(bootloader_iram_loader_seg_start == 0x4083EFD0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
-
-/* Default entry point: */
-ENTRY(call_start_cpu0);
-
-SECTIONS
-{
-
- .iram_loader.text :
- {
- . = ALIGN (16);
- _loader_text_start = ABSOLUTE(.);
- *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *liblog.a:(.literal .text .literal.* .text.*)
- *libgcc.a:(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable)
- *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
- *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
- *libefuse.a:*.*(.literal .text .literal.* .text.*)
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
- _loader_text_end = ABSOLUTE(.);
- } > iram_loader_seg
-
- .iram.text :
- {
- . = ALIGN (16);
- *(.entry.text)
- *(.init.literal)
- *(.init)
- } > iram_seg
-
-
- /* Shared RAM */
- .dram0.bss (NOLOAD) :
- {
- . = ALIGN (8);
- _dram_start = ABSOLUTE(.);
- _bss_start = ABSOLUTE(.);
- *(.dynsbss)
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- *(.dynbss)
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN (8);
- _bss_end = ABSOLUTE(.);
- } > dram_seg
-
- .dram0.data :
- {
- _data_start = ABSOLUTE(.);
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- *(.data1)
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- *(.gnu.linkonce.s2.*)
- *(.jcr)
- _data_end = ABSOLUTE(.);
- } > dram_seg
-
- .dram0.rodata :
- {
- _rodata_start = ABSOLUTE(.);
- *(.rodata)
- *(.rodata.*)
- *(.gnu.linkonce.r.*)
- *(.rodata1)
- *(.sdata2 .sdata2.* .srodata .srodata.*)
- __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
- *(.xt_except_table)
- *(.gcc_except_table)
- *(.gnu.linkonce.e.*)
- *(.gnu.version_r)
- *(.eh_frame)
- . = (. + 3) & ~ 3;
- /* C++ constructor and destructor tables, properly ordered: */
- __init_array_start = ABSOLUTE(.);
- KEEP (*crtbegin.*(.ctors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- __init_array_end = ABSOLUTE(.);
- KEEP (*crtbegin.*(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- /* C++ exception handlers table: */
- __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
- *(.xt_except_desc)
- *(.gnu.linkonce.h.*)
- __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
- *(.xt_except_desc_end)
- *(.dynamic)
- *(.gnu.version_d)
- _rodata_end = ABSOLUTE(.);
- /* Literals are also RO data. */
- _lit4_start = ABSOLUTE(.);
- *(*.lit4)
- *(.lit4.*)
- *(.gnu.linkonce.lit4.*)
- _lit4_end = ABSOLUTE(.);
- . = ALIGN(4);
- _dram_end = ABSOLUTE(.);
- } > dram_seg
-
- .iram.text :
- {
- _stext = .;
- _text_start = ABSOLUTE(.);
- *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram .iram.*) /* catch stray IRAM_ATTR */
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
-
- /** CPU will try to prefetch up to 16 bytes of
- * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
- * safe access to up to 16 bytes after the last real instruction, add
- * dummy bytes to ensure this
- */
- . += 16;
-
- _text_end = ABSOLUTE(.);
- _etext = .;
- } > iram_seg
-
-}
-
-/**
- * Appendix: Memory Usage of ROM bootloader
- *
- * 0x4083ba78 ------------------> _dram0_0_start
- * | |
- * | |
- * | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h
- * | |
- * | |
- * 0x4084d380 ------------------> __stack_sentry
- * | |
- * | | 2. Startup pro cpu stack (freed when IDF app is running)
- * | |
- * 0x4084f380 ------------------> __stack (pro cpu)
- * | |
- * | |
- * | | 3. Shared memory only used in startup code or nonos/early boot*
- * | | (can be freed when IDF runs)
- * | |
- * | |
- * 0x4084fee0 ------------------> _dram0_rtos_reserved_start
- * | |
- * | |
- * | | 4. Shared memory used in startup code and when IDF runs
- * | |
- * | |
- * 0x4084ffc0 ------------------> _dram0_rtos_reserved_end
- * | |
- * 0x4084ffc8 ------------------> _data_start_interface
- * | |
- * | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
- * | |
- * 0x40850000 ------------------> _data_end_interface
- */
diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld
deleted file mode 100644
index e3e8edab1..000000000
--- a/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld
+++ /dev/null
@@ -1,201 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/* Simplified memory map for the bootloader.
- * Make sure the bootloader can load into main memory without overwriting itself.
- */
-
-
-MEMORY
-{
- iram_seg (RWX) : org = 0x4004B000, len = 0x4000 /* SRAM part of block 12 and 13 */
- iram_loader_seg (RWX) : org = 0x4004F000, len = 0x7000 /* SRAM part of block 13, Block 14 & part of 15 */
- dram_seg (RW) : org = 0x3FFE6000, len = 0x4B00 /* Part SRAM Blocks 15 & 16, ROM static buffer starts at end of this region (reclaimed after app runs) */
-}
-
-/* Default entry point: */
-ENTRY(call_start_cpu0);
-
-
-SECTIONS
-{
-
- .iram_loader.text :
- {
- . = ALIGN (16);
- _loader_text_start = ABSOLUTE(.);
- *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *liblog.a:(.literal .text .literal.* .text.*)
- *libgcc.a:(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random)
- *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
- *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
- *libefuse.a:*.*(.literal .text .literal.* .text.*)
- *libesp_rom.a:esp_rom_regi2c.*(.literal .text .literal.* .text.*)
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
- _loader_text_end = ABSOLUTE(.);
- } > iram_loader_seg
-
- .iram.text :
- {
- . = ALIGN (16);
- *(.entry.text)
- *(.init.literal)
- *(.init)
- } > iram_seg
-
-
- /* Shared RAM */
- .dram0.bss (NOLOAD) :
- {
- . = ALIGN (8);
- _dram_start = ABSOLUTE(.);
- _bss_start = ABSOLUTE(.);
- *(.dynsbss)
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- *(.dynbss)
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN (8);
- _bss_end = ABSOLUTE(.);
- } >dram_seg
-
- .dram0.data :
- {
- _data_start = ABSOLUTE(.);
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- *(.data1)
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- *(.gnu.linkonce.s2.*)
- *(.jcr)
- _data_end = ABSOLUTE(.);
- } >dram_seg
-
- .dram0.rodata :
- {
- _rodata_start = ABSOLUTE(.);
- *(.rodata)
- *(.rodata.*)
- *(.gnu.linkonce.r.*)
- *(.rodata1)
- *(.sdata2 .sdata2.*)
- __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
- *(.xt_except_table)
- *(.gcc_except_table)
- *(.gnu.linkonce.e.*)
- *(.gnu.version_r)
- *(.eh_frame)
- . = (. + 3) & ~ 3;
- /* C++ constructor and destructor tables, properly ordered: */
- __init_array_start = ABSOLUTE(.);
- KEEP (*crtbegin.*(.ctors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- __init_array_end = ABSOLUTE(.);
- KEEP (*crtbegin.*(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- /* C++ exception handlers table: */
- __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
- *(.xt_except_desc)
- *(.gnu.linkonce.h.*)
- __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
- *(.xt_except_desc_end)
- *(.dynamic)
- *(.gnu.version_d)
- _rodata_end = ABSOLUTE(.);
- /* Literals are also RO data. */
- _lit4_start = ABSOLUTE(.);
- *(*.lit4)
- *(.lit4.*)
- *(.gnu.linkonce.lit4.*)
- _lit4_end = ABSOLUTE(.);
- . = ALIGN(4);
- _dram_end = ABSOLUTE(.);
- } >dram_seg
-
- .iram.text :
- {
- _stext = .;
- _text_start = ABSOLUTE(.);
- *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram .iram.*) /* catch stray IRAM_ATTR */
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
-
- /** CPU will try to prefetch up to 16 bytes of
- * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
- * safe access to up to 16 bytes after the last real instruction, add
- * dummy bytes to ensure this
- */
- . += 16;
-
- _text_end = ABSOLUTE(.);
- _etext = .;
- } > iram_seg
-
- /** This section will be used by the debugger and disassembler to get more information
- * about raw data present in the code.
- * Indeed, it may be required to add some padding at some points in the code
- * in order to align a branch/jump destination on a particular bound.
- * Padding these instructions will generate null bytes that shall be
- * interpreted as data, and not code by the debugger or disassembler.
- * This section will only be present in the ELF file, not in the final binary
- * For more details, check GCC-212
- */
- .xt.prop 0 :
- {
- KEEP (*(.xt.prop .gnu.linkonce.prop.*))
- }
-
- .xt.lit 0 :
- {
- KEEP (*(.xt.lit .gnu.linkonce.p.*))
- }
-
-}
diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld
deleted file mode 100644
index e69de29bb..000000000
diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld
deleted file mode 100644
index 9f6e17b2b..000000000
--- a/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld
+++ /dev/null
@@ -1,274 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/** Simplified memory map for the bootloader.
- * Make sure the bootloader can load into main memory without overwriting itself.
- *
- * ESP32-S3 ROM static data usage is as follows:
- * - 0x3fcd7e00 - 0x3fce9704: Shared buffers, used in UART/USB/SPI download mode only
- * - 0x3fce9710 - 0x3fceb710: PRO CPU stack, can be reclaimed as heap after RTOS startup
- * - 0x3fceb710 - 0x3fced710: APP CPU stack, can be reclaimed as heap after RTOS startup
- * - 0x3fced710 - 0x3fcf0000: ROM .bss and .data (not easily reclaimable)
- *
- * The 2nd stage bootloader can take space up to the end of ROM shared
- * buffers area (0x3fce9704). For alignment purpose we shall use value (0x3fce9700).
- */
-
-/* The offset between Dbus and Ibus. Used to convert between 0x403xxxxx and 0x3fcxxxxx addresses. */
-iram_dram_offset = 0x6f0000;
-
-/* We consider 0x3fce9700 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
- * and work out iram_seg and iram_loader_seg addresses from there, backwards.
- */
-
-/* These lengths can be adjusted, if necessary: */
-bootloader_usable_dram_end = 0x3fce9700;
-bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
-bootloader_dram_seg_len = 0x4000;
-bootloader_iram_loader_seg_len = 0x7000;
-bootloader_iram_seg_len = 0x3000;
-
-/* Start of the lower region is determined by region size and the end of the higher region */
-bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
-bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len;
-bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len + iram_dram_offset;
-bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len;
-
-MEMORY
-{
- iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len
- iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len
- dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len
-}
-
-/* The app may use RAM for static allocations up to the start of iram_loader_seg.
- * If you have changed something above and this assert fails:
- * 1. Check what the new value of bootloader_iram_loader_seg start is.
- * 2. Update the value in this assert.
- * 3. Update SRAM_IRAM_END in components/esp_system/ld/esp32s3/memory.ld.in to the same value.
- */
-ASSERT(bootloader_iram_loader_seg_start == 0x403cc700, "bootloader_iram_loader_seg_start inconsistent with SRAM_IRAM_END");
-
-/* Default entry point: */
-ENTRY(call_start_cpu0);
-
-SECTIONS
-{
-
- .iram_loader.text :
- {
- . = ALIGN (16);
- _loader_text_start = ABSOLUTE(.);
- *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */
- *liblog.a:(.literal .text .literal.* .text.*)
- *libgcc.a:(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_common_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable)
- *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random)
- *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_panic.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*)
- *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*)
- *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*)
- *libspi_flash.a:*.*(.literal .text .literal.* .text.*)
- *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*)
- *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:cache_hal.*(.literal .text .literal.* .text.*)
- *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
- *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
- *libefuse.a:*.*(.literal .text .literal.* .text.*)
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
- _loader_text_end = ABSOLUTE(.);
- } > iram_loader_seg
-
- .iram.text :
- {
- . = ALIGN (16);
- *(.entry.text)
- *(.init.literal)
- *(.init)
- } > iram_seg
-
-
- /* Shared RAM */
- .dram0.bss (NOLOAD) :
- {
- . = ALIGN (8);
- _dram_start = ABSOLUTE(.);
- _bss_start = ABSOLUTE(.);
- *(.dynsbss)
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- *(.dynbss)
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- . = ALIGN (8);
- _bss_end = ABSOLUTE(.);
- } > dram_seg
-
- .dram0.data :
- {
- _data_start = ABSOLUTE(.);
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- *(.data1)
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- *(.gnu.linkonce.s2.*)
- *(.jcr)
- _data_end = ABSOLUTE(.);
- } > dram_seg
-
- .dram0.rodata :
- {
- _rodata_start = ABSOLUTE(.);
- *(.rodata)
- *(.rodata.*)
- *(.gnu.linkonce.r.*)
- *(.rodata1)
- *(.sdata2 .sdata2.*)
- __XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
- *(.xt_except_table)
- *(.gcc_except_table)
- *(.gnu.linkonce.e.*)
- *(.gnu.version_r)
- *(.eh_frame)
- . = (. + 3) & ~ 3;
- /* C++ constructor and destructor tables, properly ordered: */
- __init_array_start = ABSOLUTE(.);
- KEEP (*crtbegin.*(.ctors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
- __init_array_end = ABSOLUTE(.);
- KEEP (*crtbegin.*(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- /* C++ exception handlers table: */
- __XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
- *(.xt_except_desc)
- *(.gnu.linkonce.h.*)
- __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
- *(.xt_except_desc_end)
- *(.dynamic)
- *(.gnu.version_d)
- _rodata_end = ABSOLUTE(.);
- /* Literals are also RO data. */
- _lit4_start = ABSOLUTE(.);
- *(*.lit4)
- *(.lit4.*)
- *(.gnu.linkonce.lit4.*)
- _lit4_end = ABSOLUTE(.);
- . = ALIGN(4);
- _dram_end = ABSOLUTE(.);
- } > dram_seg
-
- .iram.text :
- {
- _stext = .;
- _text_start = ABSOLUTE(.);
- *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
- *(.iram .iram.*) /* catch stray IRAM_ATTR */
- *(.fini.literal)
- *(.fini)
- *(.gnu.version)
-
- /** CPU will try to prefetch up to 16 bytes of
- * of instructions. This means that any configuration (e.g. MMU, PMS) must allow
- * safe access to up to 16 bytes after the last real instruction, add
- * dummy bytes to ensure this
- */
- . += 16;
-
- _text_end = ABSOLUTE(.);
- _etext = .;
- } > iram_seg
-
- /** This section will be used by the debugger and disassembler to get more information
- * about raw data present in the code.
- * Indeed, it may be required to add some padding at some points in the code
- * in order to align a branch/jump destination on a particular bound.
- * Padding these instructions will generate null bytes that shall be
- * interpreted as data, and not code by the debugger or disassembler.
- * This section will only be present in the ELF file, not in the final binary
- * For more details, check GCC-212
- */
- .xt.prop 0 :
- {
- KEEP (*(.xt.prop .gnu.linkonce.prop.*))
- }
-
- .xt.lit 0 :
- {
- KEEP (*(.xt.lit .gnu.linkonce.p.*))
- }
-
-}
-
-/**
- * Appendix: Memory Usage of ROM bootloader
- *
- * 0x3fcd7e00 ------------------> _dram0_0_start
- * | |
- * | |
- * | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h
- * | |
- * | |
- * 0x3fce9710 ------------------> __stack_sentry
- * | |
- * | | 2. Startup pro cpu stack (freed when IDF app is running)
- * | |
- * 0x3fceb710 ------------------> __stack (pro cpu)
- * | |
- * | | Startup app cpu stack
- * | |
- * 0x3fced710 ------------------> __stack_app (app cpu)
- * | |
- * | |
- * | | 3. Shared memory only used in startup code or nonos/early boot*
- * | | (can be freed when IDF runs)
- * | |
- * | |
- * 0x3fceee34 ------------------> _dram0_rtos_reserved_start
- * | |
- * | |
- * | | 4. Shared memory used in startup code and when IDF runs
- * | |
- * | |
- * 0x3fcef770 ------------------> _dram0_rtos_reserved_end
- * | |
- * 0x3fcef81c ------------------> _data_start_interface
- * | |
- * | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
- * | |
- * 0x3fcf0000 ------------------> _data_end_interface
- */
diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.rom.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.rom.ld
deleted file mode 100644
index e69de29bb..000000000
diff --git a/ports/espressif/components/tinyusb_src/CMakeLists.txt b/ports/espressif/components/tinyusb_src/CMakeLists.txt
index 75b9a1776..faab43a62 100644
--- a/ports/espressif/components/tinyusb_src/CMakeLists.txt
+++ b/ports/espressif/components/tinyusb_src/CMakeLists.txt
@@ -30,12 +30,10 @@ list(APPEND srcs
${tusb_src}/device/usbd.c
${tusb_src}/device/usbd_control.c
${tusb_src}/class/cdc/cdc_device.c
-# ${tusb_src}/class/dfu/dfu_device.c
-# ${tusb_src}/class/dfu/dfu_rt_device.c
${tusb_src}/class/hid/hid_device.c
${tusb_src}/class/msc/msc_device.c
-# ${tusb_src}/class/vendor/vendor_device.c
${tusb_src}/portable/synopsys/dwc2/dcd_dwc2.c
+ ${tusb_src}/portable/synopsys/dwc2/dwc2_common.c
)
if (DEFINED LOG)
diff --git a/ports/mimxrt10xx/apps/esp32programmer/main.c b/ports/mimxrt10xx/apps/esp32programmer/main.c
index 3ae05d1ef..867028e82 100644
--- a/ports/mimxrt10xx/apps/esp32programmer/main.c
+++ b/ports/mimxrt10xx/apps/esp32programmer/main.c
@@ -59,22 +59,18 @@ static uint32_t baud_rate = 115200;
// Timer
//--------------------------------------------------------------------+
-TU_ATTR_ALWAYS_INLINE static inline uint32_t millis(void)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t millis(void) {
return _timer_count;
}
-static inline void delay_blocking(uint32_t ms)
-{
+static inline void delay_blocking(uint32_t ms) {
uint32_t start = _timer_count;
- while(_timer_count - start < ms)
- {
+ while (_timer_count - start < ms) {
tud_task();
}
}
-void board_timer_handler(void)
-{
+void board_timer_handler(void) {
_timer_count++;
}
@@ -82,18 +78,15 @@ void board_timer_handler(void)
// ESP32 Helper
//--------------------------------------------------------------------+
-static inline void esp32_set_io0(uint8_t state)
-{
+static inline void esp32_set_io0(uint8_t state) {
GPIO_PinWrite(ESP32_GPIO0_PORT, ESP32_GPIO0_PIN, state);
}
-static inline void esp32_set_en(uint8_t state)
-{
+static inline void esp32_set_en(uint8_t state) {
GPIO_PinWrite(ESP32_RESET_PORT, ESP32_RESET_PIN, state);
}
-void esp32_manual_enter_dfu(void)
-{
+void esp32_manual_enter_dfu(void) {
// Put ESP into upload mode
esp32_set_io0(1);
esp32_set_en(0);
@@ -109,8 +102,7 @@ void esp32_manual_enter_dfu(void)
//--------------------------------------------------------------------+
// Main
//--------------------------------------------------------------------+
-int main(void)
-{
+int main(void) {
board_init();
gpio_pin_config_t pin_config = { kGPIO_DigitalOutput, 1, kGPIO_NoIntmode };
@@ -127,7 +119,7 @@ int main(void)
board_uart_init(115200);
board_usb_init();
- tusb_init();
+ tud_init(BOARD_TUD_RHPORT);
board_timer_start(1);
@@ -135,15 +127,13 @@ int main(void)
esp32_manual_enter_dfu();
#endif
- while(1)
- {
+ while (1) {
uint8_t serial_buf[512];
uint32_t count;
// UART -> USB
- count = (uint32_t) board_uart_read(serial_buf, sizeof(serial_buf));
- if (count)
- {
+ count = (uint32_t)board_uart_read(serial_buf, sizeof(serial_buf));
+ if (count) {
board_led_write(0xff);
tud_cdc_write(serial_buf, count);
@@ -153,8 +143,7 @@ int main(void)
}
// USB -> UART
- while ( tud_cdc_available() )
- {
+ while (tud_cdc_available()) {
board_led_write(0xff);
count = tud_cdc_read(serial_buf, sizeof(serial_buf));
@@ -184,12 +173,10 @@ int main(void)
//}
// Invoked when line coding is change via SET_LINE_CODING
-void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* line_coding)
-{
- (void) itf;
+void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* line_coding) {
+ (void)itf;
- if ( baud_rate != line_coding->bit_rate )
- {
+ if (baud_rate != line_coding->bit_rate) {
baud_rate = line_coding->bit_rate;
// must be the same freq as board_init()
@@ -197,9 +184,7 @@ void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* line_coding)
if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */
{
freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
- }
- else
- {
+ } else {
freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
}
diff --git a/ports/mimxrt10xx/apps/factory_test/main.c b/ports/mimxrt10xx/apps/factory_test/main.c
index af9b44737..cea667087 100644
--- a/ports/mimxrt10xx/apps/factory_test/main.c
+++ b/ports/mimxrt10xx/apps/factory_test/main.c
@@ -61,7 +61,7 @@ int main(void) {
board_timer_start(1);
board_usb_init();
- tusb_init();
+ tud_init(BOARD_TUD_RHPORT);
setColor(0);
pinMode(13, OUTPUT);
diff --git a/ports/mimxrt10xx/apps/factory_test_metro_sd/main.c b/ports/mimxrt10xx/apps/factory_test_metro_sd/main.c
index 1a3ca8a34..4b4617b5d 100644
--- a/ports/mimxrt10xx/apps/factory_test_metro_sd/main.c
+++ b/ports/mimxrt10xx/apps/factory_test_metro_sd/main.c
@@ -78,7 +78,7 @@ int main(void) {
board_timer_start(1);
board_usb_init();
- tusb_init();
+ tud_init(BOARD_TUD_RHPORT);
setColor(0);
pinMode(13, OUTPUT);
diff --git a/ports/stm32f4/CMakeLists.txt b/ports/stm32f4/CMakeLists.txt
index 952bd1c7d..244994130 100644
--- a/ports/stm32f4/CMakeLists.txt
+++ b/ports/stm32f4/CMakeLists.txt
@@ -12,6 +12,7 @@ add_executable(tinyuf2
board_flash.c
boards.c
${TOP}/lib/tinyusb/src/portable/synopsys/dwc2/dcd_dwc2.c
+ ${TOP}/lib/tinyusb/src/portable/synopsys/dwc2/dwc2_common.c
)
target_link_options(tinyuf2 PUBLIC
"LINKER:--script=${CMAKE_CURRENT_LIST_DIR}/linker/stm32f4_boot.ld"
diff --git a/ports/stm32f4/port.mk b/ports/stm32f4/port.mk
index 32479417f..fc64c99b8 100644
--- a/ports/stm32f4/port.mk
+++ b/ports/stm32f4/port.mk
@@ -41,6 +41,7 @@ SRC_C += \
ifndef BUILD_NO_TINYUSB
SRC_C += lib/tinyusb/src/portable/synopsys/dwc2/dcd_dwc2.c
+SRC_C += lib/tinyusb/src/portable/synopsys/dwc2/dwc2_common.c
endif
# Port include
diff --git a/ports/stm32h5/port.mk b/ports/stm32h5/port.mk
index b233e34d4..f0c480914 100644
--- a/ports/stm32h5/port.mk
+++ b/ports/stm32h5/port.mk
@@ -56,6 +56,7 @@ SRC_C += \
ifndef BUILD_NO_TINYUSB
SRC_C += lib/tinyusb/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+ SRC_C += lib/tinyusb/src/portable/synopsys/dwc2/dwc2_common.c
endif
# Port include
diff --git a/ports/stm32h7/port.mk b/ports/stm32h7/port.mk
index 1192c9703..1f51fca86 100644
--- a/ports/stm32h7/port.mk
+++ b/ports/stm32h7/port.mk
@@ -68,6 +68,7 @@ SRC_C += \
ifndef BUILD_NO_TINYUSB
SRC_C += lib/tinyusb/src/portable/synopsys/dwc2/dcd_dwc2.c
+SRC_C += lib/tinyusb/src/portable/synopsys/dwc2/dwc2_common.c
endif
# Includes
diff --git a/ports/stm32l4/port.mk b/ports/stm32l4/port.mk
index b88655b33..c31a0cb39 100644
--- a/ports/stm32l4/port.mk
+++ b/ports/stm32l4/port.mk
@@ -40,6 +40,7 @@ SRC_C += \
ifndef BUILD_NO_TINYUSB
SRC_C += lib/tinyusb/src/portable/synopsys/dwc2/dcd_dwc2.c
+SRC_C += lib/tinyusb/src/portable/synopsys/dwc2/dwc2_common.c
endif
# Port include